LLVM API Documentation
00001 //===-- ARMHazardRecognizer.h - ARM Hazard Recognizers ----------*- C++ -*-===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file defines hazard recognizers for scheduling ARM functions. 00011 // 00012 //===----------------------------------------------------------------------===// 00013 00014 #ifndef LLVM_LIB_TARGET_ARM_ARMHAZARDRECOGNIZER_H 00015 #define LLVM_LIB_TARGET_ARM_ARMHAZARDRECOGNIZER_H 00016 00017 #include "llvm/CodeGen/ScoreboardHazardRecognizer.h" 00018 00019 namespace llvm { 00020 00021 class ARMBaseInstrInfo; 00022 class ARMBaseRegisterInfo; 00023 class ARMSubtarget; 00024 class MachineInstr; 00025 00026 /// ARMHazardRecognizer handles special constraints that are not expressed in 00027 /// the scheduling itinerary. This is only used during postRA scheduling. The 00028 /// ARM preRA scheduler uses an unspecialized instance of the 00029 /// ScoreboardHazardRecognizer. 00030 class ARMHazardRecognizer : public ScoreboardHazardRecognizer { 00031 MachineInstr *LastMI; 00032 unsigned FpMLxStalls; 00033 00034 public: 00035 ARMHazardRecognizer(const InstrItineraryData *ItinData, 00036 const ScheduleDAG *DAG) 00037 : ScoreboardHazardRecognizer(ItinData, DAG, "post-RA-sched"), 00038 LastMI(nullptr) {} 00039 00040 HazardType getHazardType(SUnit *SU, int Stalls) override; 00041 void Reset() override; 00042 void EmitInstruction(SUnit *SU) override; 00043 void AdvanceCycle() override; 00044 void RecedeCycle() override; 00045 }; 00046 00047 } // end namespace llvm 00048 00049 #endif