LLVM API Documentation

SIMachineFunctionInfo.h
Go to the documentation of this file.
00001 //===- SIMachineFunctionInfo.h - SIMachineFunctionInfo interface -*- C++ -*-==//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 /// \file
00011 //
00012 //===----------------------------------------------------------------------===//
00013 
00014 
00015 #ifndef LLVM_LIB_TARGET_R600_SIMACHINEFUNCTIONINFO_H
00016 #define LLVM_LIB_TARGET_R600_SIMACHINEFUNCTIONINFO_H
00017 
00018 #include "AMDGPUMachineFunction.h"
00019 #include <map>
00020 
00021 namespace llvm {
00022 
00023 class MachineRegisterInfo;
00024 
00025 /// This class keeps track of the SPI_SP_INPUT_ADDR config register, which
00026 /// tells the hardware which interpolation parameters to load.
00027 class SIMachineFunctionInfo : public AMDGPUMachineFunction {
00028   void anchor() override;
00029 public:
00030 
00031   struct SpilledReg {
00032     unsigned VGPR;
00033     int Lane;
00034     SpilledReg(unsigned R, int L) : VGPR (R), Lane (L) { }
00035     SpilledReg() : VGPR(0), Lane(-1) { }
00036     bool hasLane() { return Lane != -1;}
00037   };
00038 
00039   // SIMachineFunctionInfo definition
00040 
00041   SIMachineFunctionInfo(const MachineFunction &MF);
00042   SpilledReg getSpilledReg(MachineFunction *MF, unsigned FrameIndex,
00043                            unsigned SubIdx);
00044   unsigned PSInputAddr;
00045   unsigned NumUserSGPRs;
00046   std::map<unsigned, unsigned> LaneVGPRs;
00047 };
00048 
00049 } // End namespace llvm
00050 
00051 
00052 #endif