1.7.6.1Copyright © 2003-2014 University of Illinois at Urbana-Champaign. All Rights Reserved.
LLVM API Documentation
00001 //===-- X86DisassemblerDecoderCommon.h - Disassembler decoder ---*- C++ -*-===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file is part of the X86 Disassembler. 00011 // It contains common definitions used by both the disassembler and the table 00012 // generator. 00013 // Documentation for the disassembler can be found in X86Disassembler.h. 00014 // 00015 //===----------------------------------------------------------------------===// 00016 00017 #ifndef LLVM_LIB_TARGET_X86_DISASSEMBLER_X86DISASSEMBLERDECODERCOMMON_H 00018 #define LLVM_LIB_TARGET_X86_DISASSEMBLER_X86DISASSEMBLERDECODERCOMMON_H 00019 00020 #include "llvm/Support/DataTypes.h" 00021 00022 namespace llvm { 00023 namespace X86Disassembler { 00024 00025 #define INSTRUCTIONS_SYM x86DisassemblerInstrSpecifiers 00026 #define CONTEXTS_SYM x86DisassemblerContexts 00027 #define ONEBYTE_SYM x86DisassemblerOneByteOpcodes 00028 #define TWOBYTE_SYM x86DisassemblerTwoByteOpcodes 00029 #define THREEBYTE38_SYM x86DisassemblerThreeByte38Opcodes 00030 #define THREEBYTE3A_SYM x86DisassemblerThreeByte3AOpcodes 00031 #define XOP8_MAP_SYM x86DisassemblerXOP8Opcodes 00032 #define XOP9_MAP_SYM x86DisassemblerXOP9Opcodes 00033 #define XOPA_MAP_SYM x86DisassemblerXOPAOpcodes 00034 00035 #define INSTRUCTIONS_STR "x86DisassemblerInstrSpecifiers" 00036 #define CONTEXTS_STR "x86DisassemblerContexts" 00037 #define ONEBYTE_STR "x86DisassemblerOneByteOpcodes" 00038 #define TWOBYTE_STR "x86DisassemblerTwoByteOpcodes" 00039 #define THREEBYTE38_STR "x86DisassemblerThreeByte38Opcodes" 00040 #define THREEBYTE3A_STR "x86DisassemblerThreeByte3AOpcodes" 00041 #define XOP8_MAP_STR "x86DisassemblerXOP8Opcodes" 00042 #define XOP9_MAP_STR "x86DisassemblerXOP9Opcodes" 00043 #define XOPA_MAP_STR "x86DisassemblerXOPAOpcodes" 00044 00045 // Attributes of an instruction that must be known before the opcode can be 00046 // processed correctly. Most of these indicate the presence of particular 00047 // prefixes, but ATTR_64BIT is simply an attribute of the decoding context. 00048 #define ATTRIBUTE_BITS \ 00049 ENUM_ENTRY(ATTR_NONE, 0x00) \ 00050 ENUM_ENTRY(ATTR_64BIT, (0x1 << 0)) \ 00051 ENUM_ENTRY(ATTR_XS, (0x1 << 1)) \ 00052 ENUM_ENTRY(ATTR_XD, (0x1 << 2)) \ 00053 ENUM_ENTRY(ATTR_REXW, (0x1 << 3)) \ 00054 ENUM_ENTRY(ATTR_OPSIZE, (0x1 << 4)) \ 00055 ENUM_ENTRY(ATTR_ADSIZE, (0x1 << 5)) \ 00056 ENUM_ENTRY(ATTR_VEX, (0x1 << 6)) \ 00057 ENUM_ENTRY(ATTR_VEXL, (0x1 << 7)) \ 00058 ENUM_ENTRY(ATTR_EVEX, (0x1 << 8)) \ 00059 ENUM_ENTRY(ATTR_EVEXL, (0x1 << 9)) \ 00060 ENUM_ENTRY(ATTR_EVEXL2, (0x1 << 10)) \ 00061 ENUM_ENTRY(ATTR_EVEXK, (0x1 << 11)) \ 00062 ENUM_ENTRY(ATTR_EVEXKZ, (0x1 << 12)) \ 00063 ENUM_ENTRY(ATTR_EVEXB, (0x1 << 13)) 00064 00065 #define ENUM_ENTRY(n, v) n = v, 00066 enum attributeBits { 00067 ATTRIBUTE_BITS 00068 ATTR_max 00069 }; 00070 #undef ENUM_ENTRY 00071 00072 // Combinations of the above attributes that are relevant to instruction 00073 // decode. Although other combinations are possible, they can be reduced to 00074 // these without affecting the ultimately decoded instruction. 00075 00076 // Class name Rank Rationale for rank assignment 00077 #define INSTRUCTION_CONTEXTS \ 00078 ENUM_ENTRY(IC, 0, "says nothing about the instruction") \ 00079 ENUM_ENTRY(IC_64BIT, 1, "says the instruction applies in " \ 00080 "64-bit mode but no more") \ 00081 ENUM_ENTRY(IC_OPSIZE, 3, "requires an OPSIZE prefix, so " \ 00082 "operands change width") \ 00083 ENUM_ENTRY(IC_ADSIZE, 3, "requires an ADSIZE prefix, so " \ 00084 "operands change width") \ 00085 ENUM_ENTRY(IC_XD, 2, "may say something about the opcode " \ 00086 "but not the operands") \ 00087 ENUM_ENTRY(IC_XS, 2, "may say something about the opcode " \ 00088 "but not the operands") \ 00089 ENUM_ENTRY(IC_XD_OPSIZE, 3, "requires an OPSIZE prefix, so " \ 00090 "operands change width") \ 00091 ENUM_ENTRY(IC_XS_OPSIZE, 3, "requires an OPSIZE prefix, so " \ 00092 "operands change width") \ 00093 ENUM_ENTRY(IC_64BIT_REXW, 4, "requires a REX.W prefix, so operands "\ 00094 "change width; overrides IC_OPSIZE") \ 00095 ENUM_ENTRY(IC_64BIT_OPSIZE, 3, "Just as meaningful as IC_OPSIZE") \ 00096 ENUM_ENTRY(IC_64BIT_ADSIZE, 3, "Just as meaningful as IC_ADSIZE") \ 00097 ENUM_ENTRY(IC_64BIT_XD, 5, "XD instructions are SSE; REX.W is " \ 00098 "secondary") \ 00099 ENUM_ENTRY(IC_64BIT_XS, 5, "Just as meaningful as IC_64BIT_XD") \ 00100 ENUM_ENTRY(IC_64BIT_XD_OPSIZE, 3, "Just as meaningful as IC_XD_OPSIZE") \ 00101 ENUM_ENTRY(IC_64BIT_XS_OPSIZE, 3, "Just as meaningful as IC_XS_OPSIZE") \ 00102 ENUM_ENTRY(IC_64BIT_REXW_XS, 6, "OPSIZE could mean a different " \ 00103 "opcode") \ 00104 ENUM_ENTRY(IC_64BIT_REXW_XD, 6, "Just as meaningful as " \ 00105 "IC_64BIT_REXW_XS") \ 00106 ENUM_ENTRY(IC_64BIT_REXW_OPSIZE, 7, "The Dynamic Duo! Prefer over all " \ 00107 "else because this changes most " \ 00108 "operands' meaning") \ 00109 ENUM_ENTRY(IC_VEX, 1, "requires a VEX prefix") \ 00110 ENUM_ENTRY(IC_VEX_XS, 2, "requires VEX and the XS prefix") \ 00111 ENUM_ENTRY(IC_VEX_XD, 2, "requires VEX and the XD prefix") \ 00112 ENUM_ENTRY(IC_VEX_OPSIZE, 2, "requires VEX and the OpSize prefix") \ 00113 ENUM_ENTRY(IC_VEX_W, 3, "requires VEX and the W prefix") \ 00114 ENUM_ENTRY(IC_VEX_W_XS, 4, "requires VEX, W, and XS prefix") \ 00115 ENUM_ENTRY(IC_VEX_W_XD, 4, "requires VEX, W, and XD prefix") \ 00116 ENUM_ENTRY(IC_VEX_W_OPSIZE, 4, "requires VEX, W, and OpSize") \ 00117 ENUM_ENTRY(IC_VEX_L, 3, "requires VEX and the L prefix") \ 00118 ENUM_ENTRY(IC_VEX_L_XS, 4, "requires VEX and the L and XS prefix")\ 00119 ENUM_ENTRY(IC_VEX_L_XD, 4, "requires VEX and the L and XD prefix")\ 00120 ENUM_ENTRY(IC_VEX_L_OPSIZE, 4, "requires VEX, L, and OpSize") \ 00121 ENUM_ENTRY(IC_VEX_L_W, 4, "requires VEX, L and W") \ 00122 ENUM_ENTRY(IC_VEX_L_W_XS, 5, "requires VEX, L, W and XS prefix") \ 00123 ENUM_ENTRY(IC_VEX_L_W_XD, 5, "requires VEX, L, W and XD prefix") \ 00124 ENUM_ENTRY(IC_VEX_L_W_OPSIZE, 5, "requires VEX, L, W and OpSize") \ 00125 ENUM_ENTRY(IC_EVEX, 1, "requires an EVEX prefix") \ 00126 ENUM_ENTRY(IC_EVEX_XS, 2, "requires EVEX and the XS prefix") \ 00127 ENUM_ENTRY(IC_EVEX_XD, 2, "requires EVEX and the XD prefix") \ 00128 ENUM_ENTRY(IC_EVEX_OPSIZE, 2, "requires EVEX and the OpSize prefix") \ 00129 ENUM_ENTRY(IC_EVEX_W, 3, "requires EVEX and the W prefix") \ 00130 ENUM_ENTRY(IC_EVEX_W_XS, 4, "requires EVEX, W, and XS prefix") \ 00131 ENUM_ENTRY(IC_EVEX_W_XD, 4, "requires EVEX, W, and XD prefix") \ 00132 ENUM_ENTRY(IC_EVEX_W_OPSIZE, 4, "requires EVEX, W, and OpSize") \ 00133 ENUM_ENTRY(IC_EVEX_L, 3, "requires EVEX and the L prefix") \ 00134 ENUM_ENTRY(IC_EVEX_L_XS, 4, "requires EVEX and the L and XS prefix")\ 00135 ENUM_ENTRY(IC_EVEX_L_XD, 4, "requires EVEX and the L and XD prefix")\ 00136 ENUM_ENTRY(IC_EVEX_L_OPSIZE, 4, "requires EVEX, L, and OpSize") \ 00137 ENUM_ENTRY(IC_EVEX_L_W, 3, "requires EVEX, L and W") \ 00138 ENUM_ENTRY(IC_EVEX_L_W_XS, 4, "requires EVEX, L, W and XS prefix") \ 00139 ENUM_ENTRY(IC_EVEX_L_W_XD, 4, "requires EVEX, L, W and XD prefix") \ 00140 ENUM_ENTRY(IC_EVEX_L_W_OPSIZE, 4, "requires EVEX, L, W and OpSize") \ 00141 ENUM_ENTRY(IC_EVEX_L2, 3, "requires EVEX and the L2 prefix") \ 00142 ENUM_ENTRY(IC_EVEX_L2_XS, 4, "requires EVEX and the L2 and XS prefix")\ 00143 ENUM_ENTRY(IC_EVEX_L2_XD, 4, "requires EVEX and the L2 and XD prefix")\ 00144 ENUM_ENTRY(IC_EVEX_L2_OPSIZE, 4, "requires EVEX, L2, and OpSize") \ 00145 ENUM_ENTRY(IC_EVEX_L2_W, 3, "requires EVEX, L2 and W") \ 00146 ENUM_ENTRY(IC_EVEX_L2_W_XS, 4, "requires EVEX, L2, W and XS prefix") \ 00147 ENUM_ENTRY(IC_EVEX_L2_W_XD, 4, "requires EVEX, L2, W and XD prefix") \ 00148 ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE, 4, "requires EVEX, L2, W and OpSize") \ 00149 ENUM_ENTRY(IC_EVEX_K, 1, "requires an EVEX_K prefix") \ 00150 ENUM_ENTRY(IC_EVEX_XS_K, 2, "requires EVEX_K and the XS prefix") \ 00151 ENUM_ENTRY(IC_EVEX_XD_K, 2, "requires EVEX_K and the XD prefix") \ 00152 ENUM_ENTRY(IC_EVEX_OPSIZE_K, 2, "requires EVEX_K and the OpSize prefix") \ 00153 ENUM_ENTRY(IC_EVEX_W_K, 3, "requires EVEX_K and the W prefix") \ 00154 ENUM_ENTRY(IC_EVEX_W_XS_K, 4, "requires EVEX_K, W, and XS prefix") \ 00155 ENUM_ENTRY(IC_EVEX_W_XD_K, 4, "requires EVEX_K, W, and XD prefix") \ 00156 ENUM_ENTRY(IC_EVEX_W_OPSIZE_K, 4, "requires EVEX_K, W, and OpSize") \ 00157 ENUM_ENTRY(IC_EVEX_L_K, 3, "requires EVEX_K and the L prefix") \ 00158 ENUM_ENTRY(IC_EVEX_L_XS_K, 4, "requires EVEX_K and the L and XS prefix")\ 00159 ENUM_ENTRY(IC_EVEX_L_XD_K, 4, "requires EVEX_K and the L and XD prefix")\ 00160 ENUM_ENTRY(IC_EVEX_L_OPSIZE_K, 4, "requires EVEX_K, L, and OpSize") \ 00161 ENUM_ENTRY(IC_EVEX_L_W_K, 3, "requires EVEX_K, L and W") \ 00162 ENUM_ENTRY(IC_EVEX_L_W_XS_K, 4, "requires EVEX_K, L, W and XS prefix") \ 00163 ENUM_ENTRY(IC_EVEX_L_W_XD_K, 4, "requires EVEX_K, L, W and XD prefix") \ 00164 ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K, 4, "requires EVEX_K, L, W and OpSize") \ 00165 ENUM_ENTRY(IC_EVEX_L2_K, 3, "requires EVEX_K and the L2 prefix") \ 00166 ENUM_ENTRY(IC_EVEX_L2_XS_K, 4, "requires EVEX_K and the L2 and XS prefix")\ 00167 ENUM_ENTRY(IC_EVEX_L2_XD_K, 4, "requires EVEX_K and the L2 and XD prefix")\ 00168 ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K, 4, "requires EVEX_K, L2, and OpSize") \ 00169 ENUM_ENTRY(IC_EVEX_L2_W_K, 3, "requires EVEX_K, L2 and W") \ 00170 ENUM_ENTRY(IC_EVEX_L2_W_XS_K, 4, "requires EVEX_K, L2, W and XS prefix") \ 00171 ENUM_ENTRY(IC_EVEX_L2_W_XD_K, 4, "requires EVEX_K, L2, W and XD prefix") \ 00172 ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K, 4, "requires EVEX_K, L2, W and OpSize") \ 00173 ENUM_ENTRY(IC_EVEX_B, 1, "requires an EVEX_B prefix") \ 00174 ENUM_ENTRY(IC_EVEX_XS_B, 2, "requires EVEX_B and the XS prefix") \ 00175 ENUM_ENTRY(IC_EVEX_XD_B, 2, "requires EVEX_B and the XD prefix") \ 00176 ENUM_ENTRY(IC_EVEX_OPSIZE_B, 2, "requires EVEX_B and the OpSize prefix") \ 00177 ENUM_ENTRY(IC_EVEX_W_B, 3, "requires EVEX_B and the W prefix") \ 00178 ENUM_ENTRY(IC_EVEX_W_XS_B, 4, "requires EVEX_B, W, and XS prefix") \ 00179 ENUM_ENTRY(IC_EVEX_W_XD_B, 4, "requires EVEX_B, W, and XD prefix") \ 00180 ENUM_ENTRY(IC_EVEX_W_OPSIZE_B, 4, "requires EVEX_B, W, and OpSize") \ 00181 ENUM_ENTRY(IC_EVEX_L_B, 3, "requires EVEX_B and the L prefix") \ 00182 ENUM_ENTRY(IC_EVEX_L_XS_B, 4, "requires EVEX_B and the L and XS prefix")\ 00183 ENUM_ENTRY(IC_EVEX_L_XD_B, 4, "requires EVEX_B and the L and XD prefix")\ 00184 ENUM_ENTRY(IC_EVEX_L_OPSIZE_B, 4, "requires EVEX_B, L, and OpSize") \ 00185 ENUM_ENTRY(IC_EVEX_L_W_B, 3, "requires EVEX_B, L and W") \ 00186 ENUM_ENTRY(IC_EVEX_L_W_XS_B, 4, "requires EVEX_B, L, W and XS prefix") \ 00187 ENUM_ENTRY(IC_EVEX_L_W_XD_B, 4, "requires EVEX_B, L, W and XD prefix") \ 00188 ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_B, 4, "requires EVEX_B, L, W and OpSize") \ 00189 ENUM_ENTRY(IC_EVEX_L2_B, 3, "requires EVEX_B and the L2 prefix") \ 00190 ENUM_ENTRY(IC_EVEX_L2_XS_B, 4, "requires EVEX_B and the L2 and XS prefix")\ 00191 ENUM_ENTRY(IC_EVEX_L2_XD_B, 4, "requires EVEX_B and the L2 and XD prefix")\ 00192 ENUM_ENTRY(IC_EVEX_L2_OPSIZE_B, 4, "requires EVEX_B, L2, and OpSize") \ 00193 ENUM_ENTRY(IC_EVEX_L2_W_B, 3, "requires EVEX_B, L2 and W") \ 00194 ENUM_ENTRY(IC_EVEX_L2_W_XS_B, 4, "requires EVEX_B, L2, W and XS prefix") \ 00195 ENUM_ENTRY(IC_EVEX_L2_W_XD_B, 4, "requires EVEX_B, L2, W and XD prefix") \ 00196 ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_B, 4, "requires EVEX_B, L2, W and OpSize") \ 00197 ENUM_ENTRY(IC_EVEX_K_B, 1, "requires EVEX_B and EVEX_K prefix") \ 00198 ENUM_ENTRY(IC_EVEX_XS_K_B, 2, "requires EVEX_B, EVEX_K and the XS prefix") \ 00199 ENUM_ENTRY(IC_EVEX_XD_K_B, 2, "requires EVEX_B, EVEX_K and the XD prefix") \ 00200 ENUM_ENTRY(IC_EVEX_OPSIZE_K_B, 2, "requires EVEX_B, EVEX_K and the OpSize prefix") \ 00201 ENUM_ENTRY(IC_EVEX_W_K_B, 3, "requires EVEX_B, EVEX_K and the W prefix") \ 00202 ENUM_ENTRY(IC_EVEX_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, W, and XS prefix") \ 00203 ENUM_ENTRY(IC_EVEX_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, W, and XD prefix") \ 00204 ENUM_ENTRY(IC_EVEX_W_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, W, and OpSize") \ 00205 ENUM_ENTRY(IC_EVEX_L_K_B, 3, "requires EVEX_B, EVEX_K and the L prefix") \ 00206 ENUM_ENTRY(IC_EVEX_L_XS_K_B, 4, "requires EVEX_B, EVEX_K and the L and XS prefix")\ 00207 ENUM_ENTRY(IC_EVEX_L_XD_K_B, 4, "requires EVEX_B, EVEX_K and the L and XD prefix")\ 00208 ENUM_ENTRY(IC_EVEX_L_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, L, and OpSize") \ 00209 ENUM_ENTRY(IC_EVEX_L_W_K_B, 3, "requires EVEX_B, EVEX_K, L and W") \ 00210 ENUM_ENTRY(IC_EVEX_L_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, L, W and XS prefix") \ 00211 ENUM_ENTRY(IC_EVEX_L_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, L, W and XD prefix") \ 00212 ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K_B,4, "requires EVEX_B, EVEX_K, L, W and OpSize") \ 00213 ENUM_ENTRY(IC_EVEX_L2_K_B, 3, "requires EVEX_B, EVEX_K and the L2 prefix") \ 00214 ENUM_ENTRY(IC_EVEX_L2_XS_K_B, 4, "requires EVEX_B, EVEX_K and the L2 and XS prefix")\ 00215 ENUM_ENTRY(IC_EVEX_L2_XD_K_B, 4, "requires EVEX_B, EVEX_K and the L2 and XD prefix")\ 00216 ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, L2, and OpSize") \ 00217 ENUM_ENTRY(IC_EVEX_L2_W_K_B, 3, "requires EVEX_B, EVEX_K, L2 and W") \ 00218 ENUM_ENTRY(IC_EVEX_L2_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, L2, W and XS prefix") \ 00219 ENUM_ENTRY(IC_EVEX_L2_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, L2, W and XD prefix") \ 00220 ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K_B,4, "requires EVEX_B, EVEX_K, L2, W and OpSize") \ 00221 ENUM_ENTRY(IC_EVEX_KZ_B, 1, "requires EVEX_B and EVEX_KZ prefix") \ 00222 ENUM_ENTRY(IC_EVEX_XS_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the XS prefix") \ 00223 ENUM_ENTRY(IC_EVEX_XD_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the XD prefix") \ 00224 ENUM_ENTRY(IC_EVEX_OPSIZE_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the OpSize prefix") \ 00225 ENUM_ENTRY(IC_EVEX_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the W prefix") \ 00226 ENUM_ENTRY(IC_EVEX_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and XS prefix") \ 00227 ENUM_ENTRY(IC_EVEX_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and XD prefix") \ 00228 ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and OpSize") \ 00229 ENUM_ENTRY(IC_EVEX_L_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the L prefix") \ 00230 ENUM_ENTRY(IC_EVEX_L_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L and XS prefix")\ 00231 ENUM_ENTRY(IC_EVEX_L_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L and XD prefix")\ 00232 ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, and OpSize") \ 00233 ENUM_ENTRY(IC_EVEX_L_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ, L and W") \ 00234 ENUM_ENTRY(IC_EVEX_L_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and XS prefix") \ 00235 ENUM_ENTRY(IC_EVEX_L_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and XD prefix") \ 00236 ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and OpSize") \ 00237 ENUM_ENTRY(IC_EVEX_L2_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the L2 prefix") \ 00238 ENUM_ENTRY(IC_EVEX_L2_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L2 and XS prefix")\ 00239 ENUM_ENTRY(IC_EVEX_L2_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L2 and XD prefix")\ 00240 ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, and OpSize") \ 00241 ENUM_ENTRY(IC_EVEX_L2_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ, L2 and W") \ 00242 ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and XS prefix") \ 00243 ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and XD prefix") \ 00244 ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and OpSize") \ 00245 ENUM_ENTRY(IC_EVEX_KZ, 1, "requires an EVEX_KZ prefix") \ 00246 ENUM_ENTRY(IC_EVEX_XS_KZ, 2, "requires EVEX_KZ and the XS prefix") \ 00247 ENUM_ENTRY(IC_EVEX_XD_KZ, 2, "requires EVEX_KZ and the XD prefix") \ 00248 ENUM_ENTRY(IC_EVEX_OPSIZE_KZ, 2, "requires EVEX_KZ and the OpSize prefix") \ 00249 ENUM_ENTRY(IC_EVEX_W_KZ, 3, "requires EVEX_KZ and the W prefix") \ 00250 ENUM_ENTRY(IC_EVEX_W_XS_KZ, 4, "requires EVEX_KZ, W, and XS prefix") \ 00251 ENUM_ENTRY(IC_EVEX_W_XD_KZ, 4, "requires EVEX_KZ, W, and XD prefix") \ 00252 ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ, 4, "requires EVEX_KZ, W, and OpSize") \ 00253 ENUM_ENTRY(IC_EVEX_L_KZ, 3, "requires EVEX_KZ and the L prefix") \ 00254 ENUM_ENTRY(IC_EVEX_L_XS_KZ, 4, "requires EVEX_KZ and the L and XS prefix")\ 00255 ENUM_ENTRY(IC_EVEX_L_XD_KZ, 4, "requires EVEX_KZ and the L and XD prefix")\ 00256 ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ, 4, "requires EVEX_KZ, L, and OpSize") \ 00257 ENUM_ENTRY(IC_EVEX_L_W_KZ, 3, "requires EVEX_KZ, L and W") \ 00258 ENUM_ENTRY(IC_EVEX_L_W_XS_KZ, 4, "requires EVEX_KZ, L, W and XS prefix") \ 00259 ENUM_ENTRY(IC_EVEX_L_W_XD_KZ, 4, "requires EVEX_KZ, L, W and XD prefix") \ 00260 ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ, 4, "requires EVEX_KZ, L, W and OpSize") \ 00261 ENUM_ENTRY(IC_EVEX_L2_KZ, 3, "requires EVEX_KZ and the L2 prefix") \ 00262 ENUM_ENTRY(IC_EVEX_L2_XS_KZ, 4, "requires EVEX_KZ and the L2 and XS prefix")\ 00263 ENUM_ENTRY(IC_EVEX_L2_XD_KZ, 4, "requires EVEX_KZ and the L2 and XD prefix")\ 00264 ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ, 4, "requires EVEX_KZ, L2, and OpSize") \ 00265 ENUM_ENTRY(IC_EVEX_L2_W_KZ, 3, "requires EVEX_KZ, L2 and W") \ 00266 ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ, 4, "requires EVEX_KZ, L2, W and XS prefix") \ 00267 ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ, 4, "requires EVEX_KZ, L2, W and XD prefix") \ 00268 ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ, 4, "requires EVEX_KZ, L2, W and OpSize") 00269 00270 #define ENUM_ENTRY(n, r, d) n, 00271 enum InstructionContext { 00272 INSTRUCTION_CONTEXTS 00273 IC_max 00274 }; 00275 #undef ENUM_ENTRY 00276 00277 // Opcode types, which determine which decode table to use, both in the Intel 00278 // manual and also for the decoder. 00279 enum OpcodeType { 00280 ONEBYTE = 0, 00281 TWOBYTE = 1, 00282 THREEBYTE_38 = 2, 00283 THREEBYTE_3A = 3, 00284 XOP8_MAP = 4, 00285 XOP9_MAP = 5, 00286 XOPA_MAP = 6 00287 }; 00288 00289 // The following structs are used for the hierarchical decode table. After 00290 // determining the instruction's class (i.e., which IC_* constant applies to 00291 // it), the decoder reads the opcode. Some instructions require specific 00292 // values of the ModR/M byte, so the ModR/M byte indexes into the final table. 00293 // 00294 // If a ModR/M byte is not required, "required" is left unset, and the values 00295 // for each instructionID are identical. 00296 typedef uint16_t InstrUID; 00297 00298 // ModRMDecisionType - describes the type of ModR/M decision, allowing the 00299 // consumer to determine the number of entries in it. 00300 // 00301 // MODRM_ONEENTRY - No matter what the value of the ModR/M byte is, the decoded 00302 // instruction is the same. 00303 // MODRM_SPLITRM - If the ModR/M byte is between 0x00 and 0xbf, the opcode 00304 // corresponds to one instruction; otherwise, it corresponds to 00305 // a different instruction. 00306 // MODRM_SPLITMISC- If the ModR/M byte is between 0x00 and 0xbf, ModR/M byte 00307 // divided by 8 is used to select instruction; otherwise, each 00308 // value of the ModR/M byte could correspond to a different 00309 // instruction. 00310 // MODRM_SPLITREG - ModR/M byte divided by 8 is used to select instruction. This 00311 // corresponds to instructions that use reg field as opcode 00312 // MODRM_FULL - Potentially, each value of the ModR/M byte could correspond 00313 // to a different instruction. 00314 #define MODRMTYPES \ 00315 ENUM_ENTRY(MODRM_ONEENTRY) \ 00316 ENUM_ENTRY(MODRM_SPLITRM) \ 00317 ENUM_ENTRY(MODRM_SPLITMISC) \ 00318 ENUM_ENTRY(MODRM_SPLITREG) \ 00319 ENUM_ENTRY(MODRM_FULL) 00320 00321 #define ENUM_ENTRY(n) n, 00322 enum ModRMDecisionType { 00323 MODRMTYPES 00324 MODRM_max 00325 }; 00326 #undef ENUM_ENTRY 00327 00328 #define CASE_ENCODING_RM \ 00329 case ENCODING_RM: \ 00330 case ENCODING_RM_CD2: \ 00331 case ENCODING_RM_CD4: \ 00332 case ENCODING_RM_CD8: \ 00333 case ENCODING_RM_CD16: \ 00334 case ENCODING_RM_CD32: \ 00335 case ENCODING_RM_CD64 00336 00337 // Physical encodings of instruction operands. 00338 #define ENCODINGS \ 00339 ENUM_ENTRY(ENCODING_NONE, "") \ 00340 ENUM_ENTRY(ENCODING_REG, "Register operand in ModR/M byte.") \ 00341 ENUM_ENTRY(ENCODING_RM, "R/M operand in ModR/M byte.") \ 00342 ENUM_ENTRY(ENCODING_RM_CD2, "R/M operand with CDisp scaling of 2") \ 00343 ENUM_ENTRY(ENCODING_RM_CD4, "R/M operand with CDisp scaling of 4") \ 00344 ENUM_ENTRY(ENCODING_RM_CD8, "R/M operand with CDisp scaling of 8") \ 00345 ENUM_ENTRY(ENCODING_RM_CD16,"R/M operand with CDisp scaling of 16") \ 00346 ENUM_ENTRY(ENCODING_RM_CD32,"R/M operand with CDisp scaling of 32") \ 00347 ENUM_ENTRY(ENCODING_RM_CD64,"R/M operand with CDisp scaling of 64") \ 00348 ENUM_ENTRY(ENCODING_VVVV, "Register operand in VEX.vvvv byte.") \ 00349 ENUM_ENTRY(ENCODING_WRITEMASK, "Register operand in EVEX.aaa byte.") \ 00350 ENUM_ENTRY(ENCODING_CB, "1-byte code offset (possible new CS value)") \ 00351 ENUM_ENTRY(ENCODING_CW, "2-byte") \ 00352 ENUM_ENTRY(ENCODING_CD, "4-byte") \ 00353 ENUM_ENTRY(ENCODING_CP, "6-byte") \ 00354 ENUM_ENTRY(ENCODING_CO, "8-byte") \ 00355 ENUM_ENTRY(ENCODING_CT, "10-byte") \ 00356 ENUM_ENTRY(ENCODING_IB, "1-byte immediate") \ 00357 ENUM_ENTRY(ENCODING_IW, "2-byte") \ 00358 ENUM_ENTRY(ENCODING_ID, "4-byte") \ 00359 ENUM_ENTRY(ENCODING_IO, "8-byte") \ 00360 ENUM_ENTRY(ENCODING_RB, "(AL..DIL, R8L..R15L) Register code added to " \ 00361 "the opcode byte") \ 00362 ENUM_ENTRY(ENCODING_RW, "(AX..DI, R8W..R15W)") \ 00363 ENUM_ENTRY(ENCODING_RD, "(EAX..EDI, R8D..R15D)") \ 00364 ENUM_ENTRY(ENCODING_RO, "(RAX..RDI, R8..R15)") \ 00365 ENUM_ENTRY(ENCODING_FP, "Position on floating-point stack in ModR/M " \ 00366 "byte.") \ 00367 \ 00368 ENUM_ENTRY(ENCODING_Iv, "Immediate of operand size") \ 00369 ENUM_ENTRY(ENCODING_Ia, "Immediate of address size") \ 00370 ENUM_ENTRY(ENCODING_Rv, "Register code of operand size added to the " \ 00371 "opcode byte") \ 00372 ENUM_ENTRY(ENCODING_DUP, "Duplicate of another operand; ID is encoded " \ 00373 "in type") \ 00374 ENUM_ENTRY(ENCODING_SI, "Source index; encoded in OpSize/Adsize prefix") \ 00375 ENUM_ENTRY(ENCODING_DI, "Destination index; encoded in prefixes") 00376 00377 #define ENUM_ENTRY(n, d) n, 00378 enum OperandEncoding { 00379 ENCODINGS 00380 ENCODING_max 00381 }; 00382 #undef ENUM_ENTRY 00383 00384 // Semantic interpretations of instruction operands. 00385 #define TYPES \ 00386 ENUM_ENTRY(TYPE_NONE, "") \ 00387 ENUM_ENTRY(TYPE_REL8, "1-byte immediate address") \ 00388 ENUM_ENTRY(TYPE_REL16, "2-byte") \ 00389 ENUM_ENTRY(TYPE_REL32, "4-byte") \ 00390 ENUM_ENTRY(TYPE_REL64, "8-byte") \ 00391 ENUM_ENTRY(TYPE_PTR1616, "2+2-byte segment+offset address") \ 00392 ENUM_ENTRY(TYPE_PTR1632, "2+4-byte") \ 00393 ENUM_ENTRY(TYPE_PTR1664, "2+8-byte") \ 00394 ENUM_ENTRY(TYPE_R8, "1-byte register operand") \ 00395 ENUM_ENTRY(TYPE_R16, "2-byte") \ 00396 ENUM_ENTRY(TYPE_R32, "4-byte") \ 00397 ENUM_ENTRY(TYPE_R64, "8-byte") \ 00398 ENUM_ENTRY(TYPE_IMM8, "1-byte immediate operand") \ 00399 ENUM_ENTRY(TYPE_IMM16, "2-byte") \ 00400 ENUM_ENTRY(TYPE_IMM32, "4-byte") \ 00401 ENUM_ENTRY(TYPE_IMM64, "8-byte") \ 00402 ENUM_ENTRY(TYPE_IMM3, "1-byte immediate operand between 0 and 7") \ 00403 ENUM_ENTRY(TYPE_IMM5, "1-byte immediate operand between 0 and 31") \ 00404 ENUM_ENTRY(TYPE_RM8, "1-byte register or memory operand") \ 00405 ENUM_ENTRY(TYPE_RM16, "2-byte") \ 00406 ENUM_ENTRY(TYPE_RM32, "4-byte") \ 00407 ENUM_ENTRY(TYPE_RM64, "8-byte") \ 00408 ENUM_ENTRY(TYPE_M, "Memory operand") \ 00409 ENUM_ENTRY(TYPE_M8, "1-byte") \ 00410 ENUM_ENTRY(TYPE_M16, "2-byte") \ 00411 ENUM_ENTRY(TYPE_M32, "4-byte") \ 00412 ENUM_ENTRY(TYPE_M64, "8-byte") \ 00413 ENUM_ENTRY(TYPE_LEA, "Effective address") \ 00414 ENUM_ENTRY(TYPE_M128, "16-byte (SSE/SSE2)") \ 00415 ENUM_ENTRY(TYPE_M256, "256-byte (AVX)") \ 00416 ENUM_ENTRY(TYPE_M1616, "2+2-byte segment+offset address") \ 00417 ENUM_ENTRY(TYPE_M1632, "2+4-byte") \ 00418 ENUM_ENTRY(TYPE_M1664, "2+8-byte") \ 00419 ENUM_ENTRY(TYPE_M16_32, "2+4-byte two-part memory operand (LIDT, LGDT)") \ 00420 ENUM_ENTRY(TYPE_M16_16, "2+2-byte (BOUND)") \ 00421 ENUM_ENTRY(TYPE_M32_32, "4+4-byte (BOUND)") \ 00422 ENUM_ENTRY(TYPE_M16_64, "2+8-byte (LIDT, LGDT)") \ 00423 ENUM_ENTRY(TYPE_SRCIDX8, "1-byte memory at source index") \ 00424 ENUM_ENTRY(TYPE_SRCIDX16, "2-byte memory at source index") \ 00425 ENUM_ENTRY(TYPE_SRCIDX32, "4-byte memory at source index") \ 00426 ENUM_ENTRY(TYPE_SRCIDX64, "8-byte memory at source index") \ 00427 ENUM_ENTRY(TYPE_DSTIDX8, "1-byte memory at destination index") \ 00428 ENUM_ENTRY(TYPE_DSTIDX16, "2-byte memory at destination index") \ 00429 ENUM_ENTRY(TYPE_DSTIDX32, "4-byte memory at destination index") \ 00430 ENUM_ENTRY(TYPE_DSTIDX64, "8-byte memory at destination index") \ 00431 ENUM_ENTRY(TYPE_MOFFS8, "1-byte memory offset (relative to segment " \ 00432 "base)") \ 00433 ENUM_ENTRY(TYPE_MOFFS16, "2-byte") \ 00434 ENUM_ENTRY(TYPE_MOFFS32, "4-byte") \ 00435 ENUM_ENTRY(TYPE_MOFFS64, "8-byte") \ 00436 ENUM_ENTRY(TYPE_SREG, "Byte with single bit set: 0 = ES, 1 = CS, " \ 00437 "2 = SS, 3 = DS, 4 = FS, 5 = GS") \ 00438 ENUM_ENTRY(TYPE_M32FP, "32-bit IEE754 memory floating-point operand") \ 00439 ENUM_ENTRY(TYPE_M64FP, "64-bit") \ 00440 ENUM_ENTRY(TYPE_M80FP, "80-bit extended") \ 00441 ENUM_ENTRY(TYPE_M16INT, "2-byte memory integer operand for use in " \ 00442 "floating-point instructions") \ 00443 ENUM_ENTRY(TYPE_M32INT, "4-byte") \ 00444 ENUM_ENTRY(TYPE_M64INT, "8-byte") \ 00445 ENUM_ENTRY(TYPE_ST, "Position on the floating-point stack") \ 00446 ENUM_ENTRY(TYPE_MM, "MMX register operand") \ 00447 ENUM_ENTRY(TYPE_MM32, "4-byte MMX register or memory operand") \ 00448 ENUM_ENTRY(TYPE_MM64, "8-byte") \ 00449 ENUM_ENTRY(TYPE_XMM, "XMM register operand") \ 00450 ENUM_ENTRY(TYPE_XMM32, "4-byte XMM register or memory operand") \ 00451 ENUM_ENTRY(TYPE_XMM64, "8-byte") \ 00452 ENUM_ENTRY(TYPE_XMM128, "16-byte") \ 00453 ENUM_ENTRY(TYPE_XMM256, "32-byte") \ 00454 ENUM_ENTRY(TYPE_XMM512, "64-byte") \ 00455 ENUM_ENTRY(TYPE_VK1, "1-bit") \ 00456 ENUM_ENTRY(TYPE_VK2, "2-bit") \ 00457 ENUM_ENTRY(TYPE_VK4, "4-bit") \ 00458 ENUM_ENTRY(TYPE_VK8, "8-bit") \ 00459 ENUM_ENTRY(TYPE_VK16, "16-bit") \ 00460 ENUM_ENTRY(TYPE_VK32, "32-bit") \ 00461 ENUM_ENTRY(TYPE_VK64, "64-bit") \ 00462 ENUM_ENTRY(TYPE_XMM0, "Implicit use of XMM0") \ 00463 ENUM_ENTRY(TYPE_SEGMENTREG, "Segment register operand") \ 00464 ENUM_ENTRY(TYPE_DEBUGREG, "Debug register operand") \ 00465 ENUM_ENTRY(TYPE_CONTROLREG, "Control register operand") \ 00466 \ 00467 ENUM_ENTRY(TYPE_Mv, "Memory operand of operand size") \ 00468 ENUM_ENTRY(TYPE_Rv, "Register operand of operand size") \ 00469 ENUM_ENTRY(TYPE_IMMv, "Immediate operand of operand size") \ 00470 ENUM_ENTRY(TYPE_RELv, "Immediate address of operand size") \ 00471 ENUM_ENTRY(TYPE_DUP0, "Duplicate of operand 0") \ 00472 ENUM_ENTRY(TYPE_DUP1, "operand 1") \ 00473 ENUM_ENTRY(TYPE_DUP2, "operand 2") \ 00474 ENUM_ENTRY(TYPE_DUP3, "operand 3") \ 00475 ENUM_ENTRY(TYPE_DUP4, "operand 4") \ 00476 ENUM_ENTRY(TYPE_M512, "512-bit FPU/MMX/XMM/MXCSR state") 00477 00478 #define ENUM_ENTRY(n, d) n, 00479 enum OperandType { 00480 TYPES 00481 TYPE_max 00482 }; 00483 #undef ENUM_ENTRY 00484 00485 /// \brief The specification for how to extract and interpret one operand. 00486 struct OperandSpecifier { 00487 uint8_t encoding; 00488 uint8_t type; 00489 }; 00490 00491 // Indicates where the opcode modifier (if any) is to be found. Extended 00492 // opcodes with AddRegFrm have the opcode modifier in the ModR/M byte. 00493 #define MODIFIER_TYPES \ 00494 ENUM_ENTRY(MODIFIER_NONE) 00495 00496 #define ENUM_ENTRY(n) n, 00497 enum ModifierType { 00498 MODIFIER_TYPES 00499 MODIFIER_max 00500 }; 00501 #undef ENUM_ENTRY 00502 00503 static const unsigned X86_MAX_OPERANDS = 6; 00504 00505 /// Decoding mode for the Intel disassembler. 16-bit, 32-bit, and 64-bit mode 00506 /// are supported, and represent real mode, IA-32e, and IA-32e in 64-bit mode, 00507 /// respectively. 00508 enum DisassemblerMode { 00509 MODE_16BIT, 00510 MODE_32BIT, 00511 MODE_64BIT 00512 }; 00513 00514 } // namespace X86Disassembler 00515 } // namespace llvm 00516 00517 #endif
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