vlc-0.8.4a: /home/huihoo/src/vlc/vlc-0.8.4a/include/mmx.h Source File

00001 /*
00002  * mmx.h
00003  * Copyright (C) 1997-1999 H. Dietz and R. Fisher
00004  *
00005  * This file is part of mpeg2dec, a free MPEG-2 video stream decoder.
00006  *
00007  * mpeg2dec is free software; you can redistribute it and/or modify
00008  * it under the terms of the GNU General Public License as published by
00009  * the Free Software Foundation; either version 2 of the License, or
00010  * (at your option) any later version.
00011  *
00012  * mpeg2dec is distributed in the hope that it will be useful,
00013  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00014  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015  * GNU General Public License for more details.
00016  *
00017  * You should have received a copy of the GNU General Public License
00018  * along with this program; if not, write to the Free Software
00019  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
00020  */
00021 
00022 /*
00023  * The type of an value that fits in an MMX register (note that long
00024  * long constant values MUST be suffixed by LL and unsigned long long
00025  * values by ULL, lest they be truncated by the compiler)
00026  */
00027 
00028 typedef union {
00029         int64_t                 q;      /* Quadword (64-bit) value */
00030         uint64_t                uq;     /* Unsigned Quadword */
00031         int32_t                 d[2];   /* 2 Doubleword (32-bit) values */
00032         uint32_t                ud[2];  /* 2 Unsigned Doubleword */
00033         int16_t                 w[4];   /* 4 Word (16-bit) values */
00034         uint16_t                uw[4];  /* 4 Unsigned Word */
00035         int8_t                  b[8];   /* 8 Byte (8-bit) values */
00036         uint8_t                 ub[8];  /* 8 Unsigned Byte */
00037         float                   s[2];   /* Single-precision (32-bit) value */
00038 } ATTR_ALIGN(8) mmx_t;  /* On an 8-byte (64-bit) boundary */
00039 
00040 
00041 #define mmx_i2r(op,imm,reg) \
00042         __asm__ __volatile__ (#op " %0, %%" #reg \
00043                               : /* nothing */ \
00044                               : "i" (imm) )
00045 
00046 #define mmx_m2r(op,mem,reg) \
00047         __asm__ __volatile__ (#op " %0, %%" #reg \
00048                               : /* nothing */ \
00049                               : "m" (mem))
00050 
00051 #define mmx_r2m(op,reg,mem) \
00052         __asm__ __volatile__ (#op " %%" #reg ", %0" \
00053                               : "=m" (mem) \
00054                               : /* nothing */ )
00055 
00056 #define mmx_r2r(op,regs,regd) \
00057         __asm__ __volatile__ (#op " %" #regs ", %" #regd)
00058 
00059 
00060 #define emms() __asm__ __volatile__ ("emms")
00061 
00062 #define movd_m2r(var,reg)       mmx_m2r (movd, var, reg)
00063 #define movd_r2m(reg,var)       mmx_r2m (movd, reg, var)
00064 #define movd_r2r(regs,regd)     mmx_r2r (movd, regs, regd)
00065 
00066 #define movq_m2r(var,reg)       mmx_m2r (movq, var, reg)
00067 #define movq_r2m(reg,var)       mmx_r2m (movq, reg, var)
00068 #define movq_r2r(regs,regd)     mmx_r2r (movq, regs, regd)
00069 
00070 #define packssdw_m2r(var,reg)   mmx_m2r (packssdw, var, reg)
00071 #define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd)
00072 #define packsswb_m2r(var,reg)   mmx_m2r (packsswb, var, reg)
00073 #define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd)
00074 
00075 #define packuswb_m2r(var,reg)   mmx_m2r (packuswb, var, reg)
00076 #define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd)
00077 
00078 #define paddb_m2r(var,reg)      mmx_m2r (paddb, var, reg)
00079 #define paddb_r2r(regs,regd)    mmx_r2r (paddb, regs, regd)
00080 #define paddd_m2r(var,reg)      mmx_m2r (paddd, var, reg)
00081 #define paddd_r2r(regs,regd)    mmx_r2r (paddd, regs, regd)
00082 #define paddw_m2r(var,reg)      mmx_m2r (paddw, var, reg)
00083 #define paddw_r2r(regs,regd)    mmx_r2r (paddw, regs, regd)
00084 
00085 #define paddsb_m2r(var,reg)     mmx_m2r (paddsb, var, reg)
00086 #define paddsb_r2r(regs,regd)   mmx_r2r (paddsb, regs, regd)
00087 #define paddsw_m2r(var,reg)     mmx_m2r (paddsw, var, reg)
00088 #define paddsw_r2r(regs,regd)   mmx_r2r (paddsw, regs, regd)
00089 
00090 #define paddusb_m2r(var,reg)    mmx_m2r (paddusb, var, reg)
00091 #define paddusb_r2r(regs,regd)  mmx_r2r (paddusb, regs, regd)
00092 #define paddusw_m2r(var,reg)    mmx_m2r (paddusw, var, reg)
00093 #define paddusw_r2r(regs,regd)  mmx_r2r (paddusw, regs, regd)
00094 
00095 #define pand_m2r(var,reg)       mmx_m2r (pand, var, reg)
00096 #define pand_r2r(regs,regd)     mmx_r2r (pand, regs, regd)
00097 
00098 #define pandn_m2r(var,reg)      mmx_m2r (pandn, var, reg)
00099 #define pandn_r2r(regs,regd)    mmx_r2r (pandn, regs, regd)
00100 
00101 #define pcmpeqb_m2r(var,reg)    mmx_m2r (pcmpeqb, var, reg)
00102 #define pcmpeqb_r2r(regs,regd)  mmx_r2r (pcmpeqb, regs, regd)
00103 #define pcmpeqd_m2r(var,reg)    mmx_m2r (pcmpeqd, var, reg)
00104 #define pcmpeqd_r2r(regs,regd)  mmx_r2r (pcmpeqd, regs, regd)
00105 #define pcmpeqw_m2r(var,reg)    mmx_m2r (pcmpeqw, var, reg)
00106 #define pcmpeqw_r2r(regs,regd)  mmx_r2r (pcmpeqw, regs, regd)
00107 
00108 #define pcmpgtb_m2r(var,reg)    mmx_m2r (pcmpgtb, var, reg)
00109 #define pcmpgtb_r2r(regs,regd)  mmx_r2r (pcmpgtb, regs, regd)
00110 #define pcmpgtd_m2r(var,reg)    mmx_m2r (pcmpgtd, var, reg)
00111 #define pcmpgtd_r2r(regs,regd)  mmx_r2r (pcmpgtd, regs, regd)
00112 #define pcmpgtw_m2r(var,reg)    mmx_m2r (pcmpgtw, var, reg)
00113 #define pcmpgtw_r2r(regs,regd)  mmx_r2r (pcmpgtw, regs, regd)
00114 
00115 #define pmaddwd_m2r(var,reg)    mmx_m2r (pmaddwd, var, reg)
00116 #define pmaddwd_r2r(regs,regd)  mmx_r2r (pmaddwd, regs, regd)
00117 
00118 #define pmulhw_m2r(var,reg)     mmx_m2r (pmulhw, var, reg)
00119 #define pmulhw_r2r(regs,regd)   mmx_r2r (pmulhw, regs, regd)
00120 
00121 #define pmullw_m2r(var,reg)     mmx_m2r (pmullw, var, reg)
00122 #define pmullw_r2r(regs,regd)   mmx_r2r (pmullw, regs, regd)
00123 
00124 #define por_m2r(var,reg)        mmx_m2r (por, var, reg)
00125 #define por_r2r(regs,regd)      mmx_r2r (por, regs, regd)
00126 
00127 #define pslld_i2r(imm,reg)      mmx_i2r (pslld, imm, reg)
00128 #define pslld_m2r(var,reg)      mmx_m2r (pslld, var, reg)
00129 #define pslld_r2r(regs,regd)    mmx_r2r (pslld, regs, regd)
00130 #define psllq_i2r(imm,reg)      mmx_i2r (psllq, imm, reg)
00131 #define psllq_m2r(var,reg)      mmx_m2r (psllq, var, reg)
00132 #define psllq_r2r(regs,regd)    mmx_r2r (psllq, regs, regd)
00133 #define psllw_i2r(imm,reg)      mmx_i2r (psllw, imm, reg)
00134 #define psllw_m2r(var,reg)      mmx_m2r (psllw, var, reg)
00135 #define psllw_r2r(regs,regd)    mmx_r2r (psllw, regs, regd)
00136 
00137 #define psrad_i2r(imm,reg)      mmx_i2r (psrad, imm, reg)
00138 #define psrad_m2r(var,reg)      mmx_m2r (psrad, var, reg)
00139 #define psrad_r2r(regs,regd)    mmx_r2r (psrad, regs, regd)
00140 #define psraw_i2r(imm,reg)      mmx_i2r (psraw, imm, reg)
00141 #define psraw_m2r(var,reg)      mmx_m2r (psraw, var, reg)
00142 #define psraw_r2r(regs,regd)    mmx_r2r (psraw, regs, regd)
00143 
00144 #define psrld_i2r(imm,reg)      mmx_i2r (psrld, imm, reg)
00145 #define psrld_m2r(var,reg)      mmx_m2r (psrld, var, reg)
00146 #define psrld_r2r(regs,regd)    mmx_r2r (psrld, regs, regd)
00147 #define psrlq_i2r(imm,reg)      mmx_i2r (psrlq, imm, reg)
00148 #define psrlq_m2r(var,reg)      mmx_m2r (psrlq, var, reg)
00149 #define psrlq_r2r(regs,regd)    mmx_r2r (psrlq, regs, regd)
00150 #define psrlw_i2r(imm,reg)      mmx_i2r (psrlw, imm, reg)
00151 #define psrlw_m2r(var,reg)      mmx_m2r (psrlw, var, reg)
00152 #define psrlw_r2r(regs,regd)    mmx_r2r (psrlw, regs, regd)
00153 
00154 #define psubb_m2r(var,reg)      mmx_m2r (psubb, var, reg)
00155 #define psubb_r2r(regs,regd)    mmx_r2r (psubb, regs, regd)
00156 #define psubd_m2r(var,reg)      mmx_m2r (psubd, var, reg)
00157 #define psubd_r2r(regs,regd)    mmx_r2r (psubd, regs, regd)
00158 #define psubw_m2r(var,reg)      mmx_m2r (psubw, var, reg)
00159 #define psubw_r2r(regs,regd)    mmx_r2r (psubw, regs, regd)
00160 
00161 #define psubsb_m2r(var,reg)     mmx_m2r (psubsb, var, reg)
00162 #define psubsb_r2r(regs,regd)   mmx_r2r (psubsb, regs, regd)
00163 #define psubsw_m2r(var,reg)     mmx_m2r (psubsw, var, reg)
00164 #define psubsw_r2r(regs,regd)   mmx_r2r (psubsw, regs, regd)
00165 
00166 #define psubusb_m2r(var,reg)    mmx_m2r (psubusb, var, reg)
00167 #define psubusb_r2r(regs,regd)  mmx_r2r (psubusb, regs, regd)
00168 #define psubusw_m2r(var,reg)    mmx_m2r (psubusw, var, reg)
00169 #define psubusw_r2r(regs,regd)  mmx_r2r (psubusw, regs, regd)
00170 
00171 #define punpckhbw_m2r(var,reg)          mmx_m2r (punpckhbw, var, reg)
00172 #define punpckhbw_r2r(regs,regd)        mmx_r2r (punpckhbw, regs, regd)
00173 #define punpckhdq_m2r(var,reg)          mmx_m2r (punpckhdq, var, reg)
00174 #define punpckhdq_r2r(regs,regd)        mmx_r2r (punpckhdq, regs, regd)
00175 #define punpckhwd_m2r(var,reg)          mmx_m2r (punpckhwd, var, reg)
00176 #define punpckhwd_r2r(regs,regd)        mmx_r2r (punpckhwd, regs, regd)
00177 
00178 #define punpcklbw_m2r(var,reg)          mmx_m2r (punpcklbw, var, reg)
00179 #define punpcklbw_r2r(regs,regd)        mmx_r2r (punpcklbw, regs, regd)
00180 #define punpckldq_m2r(var,reg)          mmx_m2r (punpckldq, var, reg)
00181 #define punpckldq_r2r(regs,regd)        mmx_r2r (punpckldq, regs, regd)
00182 #define punpcklwd_m2r(var,reg)          mmx_m2r (punpcklwd, var, reg)
00183 #define punpcklwd_r2r(regs,regd)        mmx_r2r (punpcklwd, regs, regd)
00184 
00185 #define pxor_m2r(var,reg)       mmx_m2r (pxor, var, reg)
00186 #define pxor_r2r(regs,regd)     mmx_r2r (pxor, regs, regd)
00187 
00188 
00189 /* 3DNOW extensions */
00190 
00191 #define pavgusb_m2r(var,reg)    mmx_m2r (pavgusb, var, reg)
00192 #define pavgusb_r2r(regs,regd)  mmx_r2r (pavgusb, regs, regd)
00193 
00194 
00195 /* AMD MMX extensions - also available in intel SSE */
00196 
00197 
00198 #define mmx_m2ri(op,mem,reg,imm) \
00199         __asm__ __volatile__ (#op " %1, %0, %%" #reg \
00200                               : /* nothing */ \
00201                               : "X" (mem), "X" (imm))
00202 #define mmx_r2ri(op,regs,regd,imm) \
00203         __asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \
00204                               : /* nothing */ \
00205                               : "X" (imm) )
00206 
00207 #define mmx_fetch(mem,hint) \
00208         __asm__ __volatile__ ("prefetch" #hint " %0" \
00209                               : /* nothing */ \
00210                               : "X" (mem))
00211 
00212 
00213 #define maskmovq(regs,maskreg)          mmx_r2ri (maskmovq, regs, maskreg)
00214 
00215 #define movntq_r2m(mmreg,var)           mmx_r2m (movntq, mmreg, var)
00216 
00217 #define pavgb_m2r(var,reg)              mmx_m2r (pavgb, var, reg)
00218 #define pavgb_r2r(regs,regd)            mmx_r2r (pavgb, regs, regd)
00219 #define pavgw_m2r(var,reg)              mmx_m2r (pavgw, var, reg)
00220 #define pavgw_r2r(regs,regd)            mmx_r2r (pavgw, regs, regd)
00221 
00222 #define pextrw_r2r(mmreg,reg,imm)       mmx_r2ri (pextrw, mmreg, reg, imm)
00223 
00224 #define pinsrw_r2r(reg,mmreg,imm)       mmx_r2ri (pinsrw, reg, mmreg, imm)
00225 
00226 #define pmaxsw_m2r(var,reg)             mmx_m2r (pmaxsw, var, reg)
00227 #define pmaxsw_r2r(regs,regd)           mmx_r2r (pmaxsw, regs, regd)
00228 
00229 #define pmaxub_m2r(var,reg)             mmx_m2r (pmaxub, var, reg)
00230 #define pmaxub_r2r(regs,regd)           mmx_r2r (pmaxub, regs, regd)
00231 
00232 #define pminsw_m2r(var,reg)             mmx_m2r (pminsw, var, reg)
00233 #define pminsw_r2r(regs,regd)           mmx_r2r (pminsw, regs, regd)
00234 
00235 #define pminub_m2r(var,reg)             mmx_m2r (pminub, var, reg)
00236 #define pminub_r2r(regs,regd)           mmx_r2r (pminub, regs, regd)
00237 
00238 #define pmovmskb(mmreg,reg) \
00239         __asm__ __volatile__ ("movmskps %" #mmreg ", %" #reg)
00240 
00241 #define pmulhuw_m2r(var,reg)            mmx_m2r (pmulhuw, var, reg)
00242 #define pmulhuw_r2r(regs,regd)          mmx_r2r (pmulhuw, regs, regd)
00243 
00244 #define prefetcht0(mem)                 mmx_fetch (mem, t0)
00245 #define prefetcht1(mem)                 mmx_fetch (mem, t1)
00246 #define prefetcht2(mem)                 mmx_fetch (mem, t2)
00247 #define prefetchnta(mem)                mmx_fetch (mem, nta)
00248 
00249 #define psadbw_m2r(var,reg)             mmx_m2r (psadbw, var, reg)
00250 #define psadbw_r2r(regs,regd)           mmx_r2r (psadbw, regs, regd)
00251 
00252 #define pshufw_m2r(var,reg,imm)         mmx_m2ri(pshufw, var, reg, imm)
00253 #define pshufw_r2r(regs,regd,imm)       mmx_r2ri(pshufw, regs, regd, imm)
00254 
00255 #define sfence() __asm__ __volatile__ ("sfence\n\t")