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act2000_isa.h
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1 /* $Id: act2000_isa.h,v 1.4.6.1 2001/09/23 22:24:32 kai Exp $
2  *
3  * ISDN lowlevel-module for the IBM ISDN-S0 Active 2000 (ISA-Version).
4  *
5  * Author Fritz Elfert
6  * Copyright by Fritz Elfert <[email protected]>
7  *
8  * This software may be used and distributed according to the terms
9  * of the GNU General Public License, incorporated herein by reference.
10  *
11  * Thanks to Friedemann Baitinger and IBM Germany
12  *
13  */
14 
15 #ifndef act2000_isa_h
16 #define act2000_isa_h
17 
18 #define ISA_POLL_LOOP 40 /* Try to read-write before give up */
19 
20 typedef enum {
21  INT_NO_CHANGE = 0, /* Do not change the Mask */
22  INT_ON = 1, /* Set to Enable */
23  INT_OFF = 2, /* Set to Disable */
24 } ISA_INT_T;
25 
26 /**************************************************************************/
27 /* Configuration Register COR (RW) */
28 /**************************************************************************/
29 /* 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 */
30 /* Soft Res| IRQM | IRQ Select | N/A | WAIT |Proc err */
31 /**************************************************************************/
32 #define ISA_COR 0 /* Offset for ISA config register */
33 #define ISA_COR_PERR 0x01 /* Processor Error Enabled */
34 #define ISA_COR_WS 0x02 /* Insert Wait State if 1 */
35 #define ISA_COR_IRQOFF 0x38 /* No Interrupt */
36 #define ISA_COR_IRQ07 0x30 /* IRQ 7 Enable */
37 #define ISA_COR_IRQ05 0x28 /* IRQ 5 Enable */
38 #define ISA_COR_IRQ03 0x20 /* IRQ 3 Enable */
39 #define ISA_COR_IRQ10 0x18 /* IRQ 10 Enable */
40 #define ISA_COR_IRQ11 0x10 /* IRQ 11 Enable */
41 #define ISA_COR_IRQ12 0x08 /* IRQ 12 Enable */
42 #define ISA_COR_IRQ15 0x00 /* IRQ 15 Enable */
43 #define ISA_COR_IRQPULSE 0x40 /* 0 = Level 1 = Pulse Interrupt */
44 #define ISA_COR_RESET 0x80 /* Soft Reset for Transputer */
45 
46 /**************************************************************************/
47 /* Interrupt Source Register ISR (RO) */
48 /**************************************************************************/
49 /* 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 */
50 /* N/A | N/A | N/A |Err sig |Ser ID |IN Intr |Out Intr| Error */
51 /**************************************************************************/
52 #define ISA_ISR 1 /* Offset for Interrupt Register */
53 #define ISA_ISR_ERR 0x01 /* Error Interrupt */
54 #define ISA_ISR_OUT 0x02 /* Output Interrupt */
55 #define ISA_ISR_INP 0x04 /* Input Interrupt */
56 #define ISA_ISR_SERIAL 0x08 /* Read out Serial ID after Reset */
57 #define ISA_ISR_ERRSIG 0x10 /* Error Signal Input */
58 #define ISA_ISR_ERR_MASK 0xfe /* Mask Error Interrupt */
59 #define ISA_ISR_OUT_MASK 0xfd /* Mask Output Interrupt */
60 #define ISA_ISR_INP_MASK 0xfb /* Mask Input Interrupt */
61 
62 /* Signature delivered after Reset at ISA_ISR_SERIAL (LSB first) */
63 #define ISA_SER_ID 0x0201 /* ID for ISA Card */
64 
65 /**************************************************************************/
66 /* EEPROM Register EPR (RW) */
67 /**************************************************************************/
68 /* 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 */
69 /* N/A | N/A | N/A |ROM Hold| ROM CS |ROM CLK | ROM IN |ROM Out */
70 /**************************************************************************/
71 #define ISA_EPR 2 /* Offset for this Register */
72 #define ISA_EPR_OUT 0x01 /* Rome Register Out (RO) */
73 #define ISA_EPR_IN 0x02 /* Rom Register In (WR) */
74 #define ISA_EPR_CLK 0x04 /* Rom Clock (WR) */
75 #define ISA_EPR_CS 0x08 /* Rom Cip Select (WR) */
76 #define ISA_EPR_HOLD 0x10 /* Rom Hold Signal (WR) */
77 
78 /**************************************************************************/
79 /* EEPROM enable Register EER (unused) */
80 /**************************************************************************/
81 #define ISA_EER 3 /* Offset for this Register */
82 
83 /**************************************************************************/
84 /* SLC Data Input SDI (RO) */
85 /**************************************************************************/
86 #define ISA_SDI 4 /* Offset for this Register */
87 
88 /**************************************************************************/
89 /* SLC Data Output SDO (WO) */
90 /**************************************************************************/
91 #define ISA_SDO 5 /* Offset for this Register */
92 
93 /**************************************************************************/
94 /* IMS C011 Mode 2 Input Status Register for INMOS CPU SIS (RW) */
95 /**************************************************************************/
96 /* 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 */
97 /* N/A | N/A | N/A | N/A | N/A | N/A |Int Ena |Data Pre */
98 /**************************************************************************/
99 #define ISA_SIS 6 /* Offset for this Register */
100 #define ISA_SIS_READY 0x01 /* If 1 : data is available */
101 #define ISA_SIS_INT 0x02 /* Enable Interrupt for READ */
102 
103 /**************************************************************************/
104 /* IMS C011 Mode 2 Output Status Register from INMOS CPU SOS (RW) */
105 /**************************************************************************/
106 /* 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 */
107 /* N/A | N/A | N/A | N/A | N/A | N/A |Int Ena |Out Rdy */
108 /**************************************************************************/
109 #define ISA_SOS 7 /* Offset for this Register */
110 #define ISA_SOS_READY 0x01 /* If 1 : we can write Data */
111 #define ISA_SOS_INT 0x02 /* Enable Interrupt for WRITE */
112 
113 #define ISA_REGION 8 /* Number of Registers */
114 
115 
116 /* Macros for accessing ports */
117 #define ISA_PORT_COR (card->port + ISA_COR)
118 #define ISA_PORT_ISR (card->port + ISA_ISR)
119 #define ISA_PORT_EPR (card->port + ISA_EPR)
120 #define ISA_PORT_EER (card->port + ISA_EER)
121 #define ISA_PORT_SDI (card->port + ISA_SDI)
122 #define ISA_PORT_SDO (card->port + ISA_SDO)
123 #define ISA_PORT_SIS (card->port + ISA_SIS)
124 #define ISA_PORT_SOS (card->port + ISA_SOS)
125 
126 /* Prototypes */
127 
128 extern int act2000_isa_detect(unsigned short portbase);
129 extern int act2000_isa_config_irq(act2000_card *card, short irq);
130 extern int act2000_isa_config_port(act2000_card *card, unsigned short portbase);
131 extern int act2000_isa_download(act2000_card *card, act2000_ddef __user *cb);
132 extern void act2000_isa_release(act2000_card *card);
133 extern void act2000_isa_receive(act2000_card *card);
134 extern void act2000_isa_send(act2000_card *card);
135 
136 #endif /* act2000_isa_h */
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