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amd_nb.h
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1 #ifndef _ASM_X86_AMD_NB_H
2 #define _ASM_X86_AMD_NB_H
3 
4 #include <linux/ioport.h>
5 #include <linux/pci.h>
6 
7 struct amd_nb_bus_dev_range {
8  u8 bus;
9  u8 dev_base;
10  u8 dev_limit;
11 };
12 
13 extern const struct pci_device_id amd_nb_misc_ids[];
14 extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[];
15 
16 extern bool early_is_amd_nb(u32 value);
17 extern struct resource *amd_get_mmconfig_range(struct resource *res);
18 extern int amd_cache_northbridges(void);
19 extern void amd_flush_garts(void);
20 extern int amd_numa_init(void);
21 extern int amd_get_subcaches(int);
22 extern int amd_set_subcaches(int, int);
23 
24 struct amd_l3_cache {
25  unsigned indices;
26  u8 subcaches[4];
27 };
28 
29 struct threshold_block {
30  unsigned int block;
31  unsigned int bank;
32  unsigned int cpu;
33  u32 address;
34  u16 interrupt_enable;
35  bool interrupt_capable;
36  u16 threshold_limit;
37  struct kobject kobj;
38  struct list_head miscj;
39 };
40 
41 struct threshold_bank {
42  struct kobject *kobj;
43  struct threshold_block *blocks;
44 
45  /* initialized to the number of CPUs on the node sharing this bank */
46  atomic_t cpus;
47 };
48 
49 struct amd_northbridge {
50  struct pci_dev *misc;
51  struct pci_dev *link;
52  struct amd_l3_cache l3_cache;
53  struct threshold_bank *bank4;
54 };
55 
56 struct amd_northbridge_info {
57  u16 num;
58  u64 flags;
59  struct amd_northbridge *nb;
60 };
61 extern struct amd_northbridge_info amd_northbridges;
62 
63 #define AMD_NB_GART BIT(0)
64 #define AMD_NB_L3_INDEX_DISABLE BIT(1)
65 #define AMD_NB_L3_PARTITIONING BIT(2)
66 
67 #ifdef CONFIG_AMD_NB
68 
69 static inline u16 amd_nb_num(void)
70 {
71  return amd_northbridges.num;
72 }
73 
74 static inline bool amd_nb_has_feature(unsigned feature)
75 {
76  return ((amd_northbridges.flags & feature) == feature);
77 }
78 
79 static inline struct amd_northbridge *node_to_amd_nb(int node)
80 {
81  return (node < amd_northbridges.num) ? &amd_northbridges.nb[node] : NULL;
82 }
83 
84 #else
85 
86 #define amd_nb_num(x) 0
87 #define amd_nb_has_feature(x) false
88 #define node_to_amd_nb(x) NULL
89 
90 #endif
91 
92 
93 #endif /* _ASM_X86_AMD_NB_H */
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