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25 #define MSM_IOMMU_ATTR_NON_SH 0x0
26 #define MSM_IOMMU_ATTR_SH 0x4
29 #define MSM_IOMMU_ATTR_NONCACHED 0x0
30 #define MSM_IOMMU_ATTR_CACHED_WB_WA 0x1
31 #define MSM_IOMMU_ATTR_CACHED_WB_NWA 0x2
32 #define MSM_IOMMU_ATTR_CACHED_WT 0x3
35 #define MSM_IOMMU_CP_MASK 0x03
43 #define MAX_NUM_MIDS 32