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24 #ifndef __ASM_ARCH_TC_H
25 #define __ASM_ARCH_TC_H
27 #define TCMIF_BASE 0xfffecc00
28 #define OMAP_TC_OCPT1_PRIOR (TCMIF_BASE + 0x00)
29 #define OMAP_TC_EMIFS_PRIOR (TCMIF_BASE + 0x04)
30 #define OMAP_TC_EMIFF_PRIOR (TCMIF_BASE + 0x08)
31 #define EMIFS_CONFIG (TCMIF_BASE + 0x0c)
32 #define EMIFS_CS0_CONFIG (TCMIF_BASE + 0x10)
33 #define EMIFS_CS1_CONFIG (TCMIF_BASE + 0x14)
34 #define EMIFS_CS2_CONFIG (TCMIF_BASE + 0x18)
35 #define EMIFS_CS3_CONFIG (TCMIF_BASE + 0x1c)
36 #define EMIFF_SDRAM_CONFIG (TCMIF_BASE + 0x20)
37 #define EMIFF_MRS (TCMIF_BASE + 0x24)
38 #define TC_TIMEOUT1 (TCMIF_BASE + 0x28)
39 #define TC_TIMEOUT2 (TCMIF_BASE + 0x2c)
40 #define TC_TIMEOUT3 (TCMIF_BASE + 0x30)
41 #define TC_ENDIANISM (TCMIF_BASE + 0x34)
42 #define EMIFF_SDRAM_CONFIG_2 (TCMIF_BASE + 0x3c)
43 #define EMIF_CFG_DYNAMIC_WS (TCMIF_BASE + 0x40)
44 #define EMIFS_ACS0 (TCMIF_BASE + 0x50)
45 #define EMIFS_ACS1 (TCMIF_BASE + 0x54)
46 #define EMIFS_ACS2 (TCMIF_BASE + 0x58)
47 #define EMIFS_ACS3 (TCMIF_BASE + 0x5c)
48 #define OMAP_TC_OCPT2_PRIOR (TCMIF_BASE + 0xd0)
51 #define OMAP_CS0_PHYS 0x00000000
52 #define OMAP_CS0_SIZE SZ_64M
54 #define OMAP_CS1_PHYS 0x04000000
55 #define OMAP_CS1_SIZE SZ_64M
57 #define OMAP_CS1A_PHYS OMAP_CS1_PHYS
58 #define OMAP_CS1A_SIZE SZ_32M
60 #define OMAP_CS1B_PHYS (OMAP_CS1A_PHYS + OMAP_CS1A_SIZE)
61 #define OMAP_CS1B_SIZE SZ_32M
63 #define OMAP_CS2_PHYS 0x08000000
64 #define OMAP_CS2_SIZE SZ_64M
66 #define OMAP_CS2A_PHYS OMAP_CS2_PHYS
67 #define OMAP_CS2A_SIZE SZ_32M
69 #define OMAP_CS2B_PHYS (OMAP_CS2A_PHYS + OMAP_CS2A_SIZE)
70 #define OMAP_CS2B_SIZE SZ_32M
72 #define OMAP_CS3_PHYS 0x0c000000
73 #define OMAP_CS3_SIZE SZ_64M
78 #define OMAP_EMIFS_CONFIG_FR (1 << 4)
79 #define OMAP_EMIFS_CONFIG_PDE (1 << 3)
80 #define OMAP_EMIFS_CONFIG_PWD_EN (1 << 2)
81 #define OMAP_EMIFS_CONFIG_BM (1 << 1)
82 #define OMAP_EMIFS_CONFIG_WP (1 << 0)
84 #define EMIFS_CCS(n) (EMIFS_CS0_CONFIG + (4 * (n)))
85 #define EMIFS_ACS(n) (EMIFS_ACS0 + (4 * (n)))