Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
smc.h
Go to the documentation of this file.
1 /*
2  * Static Memory Controller for AT32 chips
3  *
4  * Copyright (C) 2006 Atmel Corporation
5  *
6  * Inspired by the OMAP2 General-Purpose Memory Controller interface
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 #ifndef __ARCH_AT32AP_SMC_H
13 #define __ARCH_AT32AP_SMC_H
14 
15 /*
16  * All timing parameters are in nanoseconds.
17  */
18 struct smc_timing {
19  /* Delay from address valid to assertion of given strobe */
20  int ncs_read_setup;
21  int nrd_setup;
22  int ncs_write_setup;
23  int nwe_setup;
24 
25  /* Pulse length of given strobe */
26  int ncs_read_pulse;
27  int nrd_pulse;
28  int ncs_write_pulse;
29  int nwe_pulse;
30 
31  /* Total cycle length of given operation */
32  int read_cycle;
33  int write_cycle;
34 
35  /* Minimal recovery times, will extend cycle if needed */
36  int ncs_read_recover;
37  int nrd_recover;
38  int ncs_write_recover;
39  int nwe_recover;
40 };
41 
42 /*
43  * All timing parameters are in clock cycles.
44  */
45 struct smc_config {
46 
47  /* Delay from address valid to assertion of given strobe */
48  u8 ncs_read_setup;
49  u8 nrd_setup;
50  u8 ncs_write_setup;
51  u8 nwe_setup;
52 
53  /* Pulse length of given strobe */
54  u8 ncs_read_pulse;
55  u8 nrd_pulse;
56  u8 ncs_write_pulse;
57  u8 nwe_pulse;
58 
59  /* Total cycle length of given operation */
60  u8 read_cycle;
61  u8 write_cycle;
62 
63  /* Bus width in bytes */
64  u8 bus_width;
65 
66  /*
67  * 0: Data is sampled on rising edge of NCS
68  * 1: Data is sampled on rising edge of NRD
69  */
70  unsigned int nrd_controlled:1;
71 
72  /*
73  * 0: Data is driven on falling edge of NCS
74  * 1: Data is driven on falling edge of NWR
75  */
76  unsigned int nwe_controlled:1;
77 
78  /*
79  * 0: NWAIT is disabled
80  * 1: Reserved
81  * 2: NWAIT is frozen mode
82  * 3: NWAIT in ready mode
83  */
84  unsigned int nwait_mode:2;
85 
86  /*
87  * 0: Byte select access type
88  * 1: Byte write access type
89  */
90  unsigned int byte_write:1;
91 
92  /*
93  * Number of clock cycles before data is released after
94  * the rising edge of the read controlling signal
95  *
96  * Total cycles from SMC is tdf_cycles + 1
97  */
98  unsigned int tdf_cycles:4;
99 
100  /*
101  * 0: TDF optimization disabled
102  * 1: TDF optimization enabled
103  */
104  unsigned int tdf_mode:1;
105 };
106 
107 extern void smc_set_timing(struct smc_config *config,
108  const struct smc_timing *timing);
109 
110 extern int smc_set_configuration(int cs, const struct smc_config *config);
111 extern struct smc_config *smc_get_configuration(int cs);
112 
113 #endif /* __ARCH_AT32AP_SMC_H */
Generated on Thu Jan 10 2013 13:03:51 for Linux Kernel by   doxygen 1.8.2