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11 #define MAX_DMA_CHANNELS 16
16 #define CH_SPORT0_RX 3
17 #define CH_SPORT0_TX 4
18 #define CH_SPORT1_RX 5
19 #define CH_SPORT1_TX 6
23 #define CH_UART1_RX 10
24 #define CH_UART1_TX 11
26 #define CH_MEM_STREAM0_DEST 12
27 #define CH_MEM_STREAM0_SRC 13
28 #define CH_MEM_STREAM1_DEST 14
29 #define CH_MEM_STREAM1_SRC 15