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12 #define CH_SPORT0_RX 1
13 #define CH_SPORT0_TX 2
14 #define CH_SPORT1_RX 3
15 #define CH_SPORT1_TX 4
19 #define CH_SPORT2_RX 8
20 #define CH_SPORT2_TX 9
21 #define CH_SPORT3_RX 10
22 #define CH_SPORT3_TX 11
25 #define CH_UART1_RX 16
26 #define CH_UART1_TX 17
27 #define CH_UART2_RX 18
28 #define CH_UART2_TX 19
30 #define CH_MEM_STREAM0_DEST 20
31 #define CH_MEM_STREAM0_SRC 21
32 #define CH_MEM_STREAM1_DEST 22
33 #define CH_MEM_STREAM1_SRC 23
34 #define CH_MEM_STREAM2_DEST 24
35 #define CH_MEM_STREAM2_SRC 25
36 #define CH_MEM_STREAM3_DEST 26
37 #define CH_MEM_STREAM3_SRC 27
39 #define MAX_DMA_CHANNELS 28