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35 #ifndef __NLM_HAL_USB_H__
36 #define __NLM_HAL_USB_H__
38 #define USB_CTL_0 0x01
39 #define USB_PHY_0 0x0A
40 #define USB_PHY_RESET 0x01
41 #define USB_PHY_PORT_RESET_0 0x10
42 #define USB_PHY_PORT_RESET_1 0x20
43 #define USB_CONTROLLER_RESET 0x01
44 #define USB_INT_STATUS 0x0E
45 #define USB_INT_EN 0x0F
46 #define USB_PHY_INTERRUPT_EN 0x01
47 #define USB_OHCI_INTERRUPT_EN 0x02
48 #define USB_OHCI_INTERRUPT1_EN 0x04
49 #define USB_OHCI_INTERRUPT2_EN 0x08
50 #define USB_CTRL_INTERRUPT_EN 0x10
54 #define nlm_read_usb_reg(b, r) nlm_read_reg(b, r)
55 #define nlm_write_usb_reg(b, r, v) nlm_write_reg(b, r, v)
56 #define nlm_get_usb_pcibase(node, inst) \
57 nlm_pcicfg_base(XLP_IO_USB_OFFSET(node, inst))
58 #define nlm_get_usb_hcd_base(node, inst) \
59 nlm_xkphys_map_pcibar0(nlm_get_usb_pcibase(node, inst))
60 #define nlm_get_usb_regbase(node, inst) \
61 (nlm_get_usb_pcibase(node, inst) + XLP_IO_PCI_HDRSZ)