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arch
mips
pmc-sierra
yosemite
setup.c
Go to the documentation of this file.
1
/*
2
* Copyright (C) 2003 PMC-Sierra Inc.
3
* Author: Manish Lachwani (
[email protected]
)
4
*
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* Copyright (C) 2004 by Ralf Baechle (
[email protected]
)
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*
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* This program is free software; you can redistribute it and/or modify it
8
* under the terms of the GNU General Public License as published by the
9
* Free Software Foundation; either version 2 of the License, or (at your
10
* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
18
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22
*
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* You should have received a copy of the GNU General Public License along
24
* with this program; if not, write to the Free Software Foundation, Inc.,
25
* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <
linux/bcd.h
>
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#include <
linux/init.h
>
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#include <linux/kernel.h>
30
#include <linux/export.h>
31
#include <linux/types.h>
32
#include <
linux/mm.h
>
33
#include <
linux/bootmem.h
>
34
#include <
linux/swap.h
>
35
#include <
linux/ioport.h
>
36
#include <linux/sched.h>
37
#include <
linux/interrupt.h
>
38
#include <linux/timex.h>
39
#include <
linux/termios.h
>
40
#include <linux/tty.h>
41
#include <linux/serial.h>
42
#include <linux/serial_core.h>
43
#include <
linux/serial_8250.h
>
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#include <asm/time.h>
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#include <asm/bootinfo.h>
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#include <asm/page.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/processor.h>
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#include <asm/reboot.h>
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#include <asm/serial.h>
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#include <
asm/titan_dep.h
>
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#include <
asm/m48t37.h
>
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#include "
setup.h
"
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unsigned
char
titan_ge_mac_addr_base
[6] = {
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// 0x00, 0x03, 0xcc, 0x1d, 0x22, 0x00
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0x00, 0xe0, 0x04, 0x00, 0x00, 0x21
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};
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unsigned
long
cpu_clock_freq
;
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unsigned
long
yosemite_base
;
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static
struct
m48t37_rtc
*m48t37_base;
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void
__init
bus_error_init
(
void
)
69
{
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/* Do nothing */
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}
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73
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void
read_persistent_clock
(
struct
timespec
*
ts
)
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{
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unsigned
int
year
,
month
,
day
,
hour
,
min
,
sec
;
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unsigned
long
flags
;
78
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spin_lock_irqsave
(&
rtc_lock
, flags);
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/* Stop the update to the time */
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m48t37_base->
control
= 0x40;
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year =
bcd2bin
(m48t37_base->
year
);
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year +=
bcd2bin
(m48t37_base->
century
) * 100;
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month =
bcd2bin
(m48t37_base->
month
);
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day =
bcd2bin
(m48t37_base->
date
);
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hour =
bcd2bin
(m48t37_base->
hour
);
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min =
bcd2bin
(m48t37_base->
min
);
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sec =
bcd2bin
(m48t37_base->
sec
);
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/* Start the update to the time again */
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m48t37_base->
control
= 0x00;
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spin_unlock_irqrestore(&
rtc_lock
, flags);
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ts->
tv_sec
=
mktime
(year, month, day, hour, min, sec);
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ts->
tv_nsec
= 0;
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}
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int
rtc_mips_set_time
(
unsigned
long
tim)
101
{
102
struct
rtc_time
tm;
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unsigned
long
flags
;
104
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/*
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* Convert to a more useful format -- note months count from 0
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* and years from 1900
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*/
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rtc_time_to_tm
(tim, &tm);
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tm.
tm_year
+= 1900;
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tm.
tm_mon
+= 1;
112
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spin_lock_irqsave
(&
rtc_lock
, flags);
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/* enable writing */
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m48t37_base->
control
= 0x80;
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/* year */
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m48t37_base->
year
=
bin2bcd
(tm.
tm_year
% 100);
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m48t37_base->
century
=
bin2bcd
(tm.
tm_year
/ 100);
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/* month */
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m48t37_base->
month
=
bin2bcd
(tm.
tm_mon
);
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/* day */
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m48t37_base->
date
=
bin2bcd
(tm.
tm_mday
);
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/* hour/min/sec */
128
m48t37_base->
hour
=
bin2bcd
(tm.
tm_hour
);
129
m48t37_base->
min
=
bin2bcd
(tm.
tm_min
);
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m48t37_base->
sec
=
bin2bcd
(tm.
tm_sec
);
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/* day of week -- not really used, but let's keep it up-to-date */
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m48t37_base->
day
=
bin2bcd
(tm.
tm_wday
+ 1);
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/* disable writing */
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m48t37_base->
control
= 0x00;
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spin_unlock_irqrestore(&
rtc_lock
, flags);
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return
0;
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}
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void
__init
plat_time_init
(
void
)
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{
144
mips_hpt_frequency
=
cpu_clock_freq
/ 2;
145
mips_hpt_frequency
= 33000000 * 3 * 5;
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}
147
148
unsigned
long
ocd_base
;
149
150
EXPORT_SYMBOL
(
ocd_base
);
151
152
/*
153
* Common setup before any secondaries are started
154
*/
155
156
#define TITAN_UART_CLK 3686400
157
#define TITAN_SERIAL_BASE_BAUD (TITAN_UART_CLK / 16)
158
#define TITAN_SERIAL_IRQ 4
159
#define TITAN_SERIAL_BASE 0xfd000008UL
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161
static
void
__init
py_map_ocd(
void
)
162
{
163
ocd_base
= (
unsigned
long
)
ioremap
(
OCD_BASE
,
OCD_SIZE
);
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if
(!
ocd_base
)
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panic
(
"Mapping OCD failed - game over. Your score is 0."
);
166
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/* Kludge for PMON bug ... */
168
OCD_WRITE
(0x0710, 0x0ffff029);
169
}
170
171
static
void
__init
py_uart_setup(
void
)
172
{
173
#ifdef CONFIG_SERIAL_8250
174
struct
uart_port
up
;
175
176
/*
177
* Register to interrupt zero because we share the interrupt with
178
* the serial driver which we don't properly support yet.
179
*/
180
memset
(&
up
, 0,
sizeof
(
up
));
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up
.membase = (
unsigned
char
*)
ioremap
(
TITAN_SERIAL_BASE
, 8);
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up
.irq =
TITAN_SERIAL_IRQ
;
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up
.uartclk =
TITAN_UART_CLK
;
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up
.regshift = 0;
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up
.iotype =
UPIO_MEM
;
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up
.flags =
UPF_BOOT_AUTOCONF
|
UPF_SKIP_TEST
;
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up
.line = 0;
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if
(
early_serial_setup
(&
up
))
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printk
(
KERN_ERR
"Early serial init of port 0 failed\n"
);
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#endif
/* CONFIG_SERIAL_8250 */
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}
193
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static
void
__init
py_rtc_setup(
void
)
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{
196
m48t37_base =
ioremap
(
YOSEMITE_RTC_BASE
,
YOSEMITE_RTC_SIZE
);
197
if
(!m48t37_base)
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printk
(
KERN_ERR
"Mapping the RTC failed\n"
);
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}
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/* Not only time init but that's what the hook it's called through is named */
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static
void
__init
py_late_time_init(
void
)
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{
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py_map_ocd();
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py_uart_setup();
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py_rtc_setup();
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}
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void
__init
plat_mem_setup
(
void
)
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{
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late_time_init
= py_late_time_init;
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/* Add memory regions */
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add_memory_region
(0x00000000, 0x10000000,
BOOT_MEM_RAM
);
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#if 0
/* XXX Crash ... */
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OCD_WRITE
(
RM9000x2_OCD_HTSC
,
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OCD_READ
(
RM9000x2_OCD_HTSC
) |
HYPERTRANSPORT_ENABLE
);
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/* Set the BAR. Shifted mode */
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OCD_WRITE
(
RM9000x2_OCD_HTBAR0
,
HYPERTRANSPORT_BAR0_ADDR
);
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OCD_WRITE
(
RM9000x2_OCD_HTMASK0
,
HYPERTRANSPORT_SIZE0
);
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#endif
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}
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