Linux Kernel  3.7.1
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setup.c
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1 /*
2  * linux/arch/sh/boards/renesas/sh7763rdp/setup.c
3  *
4  * Renesas Solutions sh7763rdp board
5  *
6  * Copyright (C) 2008 Renesas Solutions Corp.
7  * Copyright (C) 2008 Nobuhiro Iwamatsu <[email protected]>
8  *
9  * This file is subject to the terms and conditions of the GNU General Public
10  * License. See the file "COPYING" in the main directory of this archive
11  * for more details.
12  */
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/interrupt.h>
16 #include <linux/input.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/fb.h>
19 #include <linux/io.h>
20 #include <linux/sh_eth.h>
21 #include <linux/sh_intc.h>
22 #include <mach/sh7763rdp.h>
23 #include <asm/sh7760fb.h>
24 
25 /* NOR Flash */
26 static struct mtd_partition sh7763rdp_nor_flash_partitions[] = {
27  {
28  .name = "U-Boot",
29  .offset = 0,
30  .size = (2 * 128 * 1024),
31  .mask_flags = MTD_WRITEABLE, /* Read-only */
32  }, {
33  .name = "Linux-Kernel",
34  .offset = MTDPART_OFS_APPEND,
35  .size = (20 * 128 * 1024),
36  }, {
37  .name = "Root Filesystem",
38  .offset = MTDPART_OFS_APPEND,
39  .size = MTDPART_SIZ_FULL,
40  },
41 };
42 
43 static struct physmap_flash_data sh7763rdp_nor_flash_data = {
44  .width = 2,
45  .parts = sh7763rdp_nor_flash_partitions,
46  .nr_parts = ARRAY_SIZE(sh7763rdp_nor_flash_partitions),
47 };
48 
49 static struct resource sh7763rdp_nor_flash_resources[] = {
50  [0] = {
51  .name = "NOR Flash",
52  .start = 0,
53  .end = (64 * 1024 * 1024),
55  },
56 };
57 
58 static struct platform_device sh7763rdp_nor_flash_device = {
59  .name = "physmap-flash",
60  .resource = sh7763rdp_nor_flash_resources,
61  .num_resources = ARRAY_SIZE(sh7763rdp_nor_flash_resources),
62  .dev = {
63  .platform_data = &sh7763rdp_nor_flash_data,
64  },
65 };
66 
67 /*
68  * SH-Ether
69  *
70  * SH Ether of SH7763 has multi IRQ handling.
71  * (0x920,0x940,0x960 -> 0x920)
72  */
73 static struct resource sh_eth_resources[] = {
74  {
75  .start = 0xFEE00800, /* use eth1 */
76  .end = 0xFEE00F7C - 1,
77  .flags = IORESOURCE_MEM,
78  }, {
79  .start = 0xFEE01800, /* TSU */
80  .end = 0xFEE01FFF,
81  .flags = IORESOURCE_MEM,
82  }, {
83  .start = evt2irq(0x920), /* irq number */
84  .flags = IORESOURCE_IRQ,
85  },
86 };
87 
88 static struct sh_eth_plat_data sh7763_eth_pdata = {
89  .phy = 1,
90  .edmac_endian = EDMAC_LITTLE_ENDIAN,
91  .register_type = SH_ETH_REG_GIGABIT,
92  .phy_interface = PHY_INTERFACE_MODE_MII,
93 };
94 
95 static struct platform_device sh7763rdp_eth_device = {
96  .name = "sh-eth",
97  .resource = sh_eth_resources,
98  .num_resources = ARRAY_SIZE(sh_eth_resources),
99  .dev = {
100  .platform_data = &sh7763_eth_pdata,
101  },
102 };
103 
104 /* SH7763 LCDC */
105 static struct resource sh7763rdp_fb_resources[] = {
106  {
107  .start = 0xFFE80000,
108  .end = 0xFFE80442 - 1,
109  .flags = IORESOURCE_MEM,
110  },
111 };
112 
113 static struct fb_videomode sh7763fb_videomode = {
114  .refresh = 60,
115  .name = "VGA Monitor",
116  .xres = 640,
117  .yres = 480,
118  .pixclock = 10000,
119  .left_margin = 80,
120  .right_margin = 24,
121  .upper_margin = 30,
122  .lower_margin = 1,
123  .hsync_len = 96,
124  .vsync_len = 1,
125  .sync = 0,
126  .vmode = FB_VMODE_NONINTERLACED,
127  .flag = FBINFO_FLAG_DEFAULT,
128 };
129 
130 static struct sh7760fb_platdata sh7763fb_def_pdata = {
131  .def_mode = &sh7763fb_videomode,
132  .ldmtr = (LDMTR_TFT_COLOR_16|LDMTR_MCNT),
134  .ldpmmr = 0x0000,
135  .ldpspr = 0xFFFF,
136  .ldaclnr = 0x0001,
137  .ldickr = 0x1102,
138  .rotate = 0,
139  .novsync = 0,
140  .blank = NULL,
141 };
142 
143 static struct platform_device sh7763rdp_fb_device = {
144  .name = "sh7760-lcdc",
145  .resource = sh7763rdp_fb_resources,
146  .num_resources = ARRAY_SIZE(sh7763rdp_fb_resources),
147  .dev = {
148  .platform_data = &sh7763fb_def_pdata,
149  },
150 };
151 
152 static struct platform_device *sh7763rdp_devices[] __initdata = {
153  &sh7763rdp_nor_flash_device,
154  &sh7763rdp_eth_device,
155  &sh7763rdp_fb_device,
156 };
157 
158 static int __init sh7763rdp_devices_setup(void)
159 {
160  return platform_add_devices(sh7763rdp_devices,
161  ARRAY_SIZE(sh7763rdp_devices));
162 }
163 device_initcall(sh7763rdp_devices_setup);
164 
165 static void __init sh7763rdp_setup(char **cmdline_p)
166 {
167  /* Board version check */
168  if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
169  printk(KERN_INFO "RTE Standard Configuration\n");
170  else
171  printk(KERN_INFO "RTA Standard Configuration\n");
172 
173  /* USB pin select bits (clear bit 5-2 to 0) */
175  /* USBH setup port I controls to other (clear bits 4-9 to 0) */
177 
178  /* Select USB Host controller */
179  __raw_writew(0x00, USB_USBHSC);
180 
181  /* For LCD */
182  /* set PTJ7-1, bits 15-2 of PJCR to 0 */
184  /* set PTI5, bits 11-10 of PICR to 0 */
188  /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */
190  /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */
192 
193  /* For HAC */
194  /* bit3-0 0100:HAC & SSI1 enable */
195  __raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
196  /* bit14 1:SSI_HAC_CLK enable */
198 
199  /* SH-Ether */
200  __raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
201  __raw_writew(0x0, PORT_PFCR);
202  __raw_writew(0x0, PORT_PFCR);
203  __raw_writew(0x0, PORT_PFCR);
204 
205  /* MMC */
206  /*selects SCIF and MMC other functions */
207  __raw_writew(0x0001, PORT_PSEL0);
208  /* MMC clock operates */
212 }
213 
214 static struct sh_machine_vector mv_sh7763rdp __initmv = {
215  .mv_name = "sh7763drp",
216  .mv_setup = sh7763rdp_setup,
217  .mv_init_irq = init_sh7763rdp_IRQ,
218 };