Go to the documentation of this file. 1 #ifndef __ASM_CPU_SH4_DMA_H
2 #define __ASM_CPU_SH4_DMA_H
9 #define DMTE0_IRQ evt2irq(0x640)
10 #define DMTE4_IRQ evt2irq(0x780)
11 #define DMTE6_IRQ evt2irq(0x7c0)
12 #define DMAE0_IRQ evt2irq(0x6c0)
14 #define SH_DMAC_BASE0 0xffa00000
15 #define SH_DMAC_BASE1 0xffa00070