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irq.h
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1 /*
2  * Copyright 2010 Tilera Corporation. All Rights Reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation, version 2.
7  *
8  * This program is distributed in the hope that it will be useful, but
9  * WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11  * NON INFRINGEMENT. See the GNU General Public License for
12  * more details.
13  */
14 
15 #ifndef _ASM_TILE_IRQ_H
16 #define _ASM_TILE_IRQ_H
17 
18 #include <linux/hardirq.h>
19 
20 /* The hypervisor interface provides 32 IRQs. */
21 #define NR_IRQS 32
22 
23 /* IRQ numbers used for linux IPIs. */
24 #define IRQ_RESCHEDULE 0
25 
26 #define irq_canonicalize(irq) (irq)
27 
28 void ack_bad_irq(unsigned int irq);
29 
30 /*
31  * Different ways of handling interrupts. Tile interrupts are always
32  * per-cpu; there is no global interrupt controller to implement
33  * enable/disable. Most onboard devices can send their interrupts to
34  * many tiles at the same time, and Tile-specific drivers know how to
35  * deal with this.
36  *
37  * However, generic devices (usually PCIE based, sometimes GPIO)
38  * expect that interrupts will fire on a single core at a time and
39  * that the irq can be enabled or disabled from any core at any time.
40  * We implement this by directing such interrupts to a single core.
41  *
42  * One added wrinkle is that PCI interrupts can be either
43  * hardware-cleared (legacy interrupts) or software cleared (MSI).
44  * Other generic device systems (GPIO) are always software-cleared.
45  *
46  * The enums below are used by drivers for onboard devices, including
47  * the internals of PCI root complex and GPIO. They allow the driver
48  * to tell the generic irq code what kind of interrupt is mapped to a
49  * particular IRQ number.
50  */
51 enum {
52  /* per-cpu interrupt; use enable/disable_percpu_irq() to mask */
54  /* global interrupt, hardware responsible for clearing. */
56  /* global interrupt, software responsible for clearing. */
58 };
59 
60 
61 /*
62  * Paravirtualized drivers should call this when they dynamically
63  * allocate a new IRQ or discover an IRQ that was pre-allocated by the
64  * hypervisor for use with their particular device. This gives the
65  * IRQ subsystem an opportunity to do interrupt-type-specific
66  * initialization.
67  *
68  * ISSUE: We should modify this API so that registering anything
69  * except percpu interrupts also requires providing callback methods
70  * for enabling and disabling the interrupt. This would allow the
71  * generic IRQ code to proxy enable/disable_irq() calls back into the
72  * PCI subsystem, which in turn could enable or disable the interrupt
73  * at the PCI shim.
74  */
75 void tile_irq_activate(unsigned int irq, int tile_irq_type);
76 
77 void setup_irq_regs(void);
78 
79 #endif /* _ASM_TILE_IRQ_H */