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interface.h
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1 /******************************************************************************
2  * arch-x86_32.h
3  *
4  * Guest OS interface to x86 Xen.
5  *
6  * Copyright (c) 2004, K A Fraser
7  */
8 
9 #ifndef _ASM_X86_XEN_INTERFACE_H
10 #define _ASM_X86_XEN_INTERFACE_H
11 
12 #ifdef __XEN__
13 #define __DEFINE_GUEST_HANDLE(name, type) \
14  typedef struct { type *p; } __guest_handle_ ## name
15 #else
16 #define __DEFINE_GUEST_HANDLE(name, type) \
17  typedef type * __guest_handle_ ## name
18 #endif
19 
20 #define DEFINE_GUEST_HANDLE_STRUCT(name) \
21  __DEFINE_GUEST_HANDLE(name, struct name)
22 #define DEFINE_GUEST_HANDLE(name) __DEFINE_GUEST_HANDLE(name, name)
23 #define GUEST_HANDLE(name) __guest_handle_ ## name
24 
25 #ifdef __XEN__
26 #if defined(__i386__)
27 #define set_xen_guest_handle(hnd, val) \
28  do { \
29  if (sizeof(hnd) == 8) \
30  *(uint64_t *)&(hnd) = 0; \
31  (hnd).p = val; \
32  } while (0)
33 #elif defined(__x86_64__)
34 #define set_xen_guest_handle(hnd, val) do { (hnd).p = val; } while (0)
35 #endif
36 #else
37 #if defined(__i386__)
38 #define set_xen_guest_handle(hnd, val) \
39  do { \
40  if (sizeof(hnd) == 8) \
41  *(uint64_t *)&(hnd) = 0; \
42  (hnd) = val; \
43  } while (0)
44 #elif defined(__x86_64__)
45 #define set_xen_guest_handle(hnd, val) do { (hnd) = val; } while (0)
46 #endif
47 #endif
48 
49 #ifndef __ASSEMBLY__
50 /* Explicitly size integers that represent pfns in the public interface
51  * with Xen so that on ARM we can have one ABI that works for 32 and 64
52  * bit guests. */
53 typedef unsigned long xen_pfn_t;
54 #define PRI_xen_pfn "lx"
55 typedef unsigned long xen_ulong_t;
56 #define PRI_xen_ulong "lx"
57 /* Guest handles for primitive C types. */
58 __DEFINE_GUEST_HANDLE(uchar, unsigned char);
59 __DEFINE_GUEST_HANDLE(uint, unsigned int);
60 DEFINE_GUEST_HANDLE(char);
61 DEFINE_GUEST_HANDLE(int);
62 DEFINE_GUEST_HANDLE(void);
63 DEFINE_GUEST_HANDLE(uint64_t);
64 DEFINE_GUEST_HANDLE(uint32_t);
65 DEFINE_GUEST_HANDLE(xen_pfn_t);
66 #endif
67 
68 #ifndef HYPERVISOR_VIRT_START
69 #define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START)
70 #endif
71 
72 #define MACH2PHYS_VIRT_START mk_unsigned_long(__MACH2PHYS_VIRT_START)
73 #define MACH2PHYS_VIRT_END mk_unsigned_long(__MACH2PHYS_VIRT_END)
74 #define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>__MACH2PHYS_SHIFT)
75 
76 /* Maximum number of virtual CPUs in multi-processor guests. */
77 #define MAX_VIRT_CPUS 32
78 
79 /*
80  * SEGMENT DESCRIPTOR TABLES
81  */
82 /*
83  * A number of GDT entries are reserved by Xen. These are not situated at the
84  * start of the GDT because some stupid OSes export hard-coded selector values
85  * in their ABI. These hard-coded values are always near the start of the GDT,
86  * so Xen places itself out of the way, at the far end of the GDT.
87  */
88 #define FIRST_RESERVED_GDT_PAGE 14
89 #define FIRST_RESERVED_GDT_BYTE (FIRST_RESERVED_GDT_PAGE * 4096)
90 #define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8)
91 
92 /*
93  * Send an array of these to HYPERVISOR_set_trap_table()
94  * The privilege level specifies which modes may enter a trap via a software
95  * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate
96  * privilege levels as follows:
97  * Level == 0: No one may enter
98  * Level == 1: Kernel may enter
99  * Level == 2: Kernel may enter
100  * Level == 3: Everyone may enter
101  */
102 #define TI_GET_DPL(_ti) ((_ti)->flags & 3)
103 #define TI_GET_IF(_ti) ((_ti)->flags & 4)
104 #define TI_SET_DPL(_ti, _dpl) ((_ti)->flags |= (_dpl))
105 #define TI_SET_IF(_ti, _if) ((_ti)->flags |= ((!!(_if))<<2))
106 
107 #ifndef __ASSEMBLY__
108 struct trap_info {
109  uint8_t vector; /* exception vector */
110  uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */
111  uint16_t cs; /* code selector */
112  unsigned long address; /* code offset */
113 };
114 DEFINE_GUEST_HANDLE_STRUCT(trap_info);
115 
116 struct arch_shared_info {
117  unsigned long max_pfn; /* max pfn that appears in table */
118  /* Frame containing list of mfns containing list of mfns containing p2m. */
119  unsigned long pfn_to_mfn_frame_list_list;
120  unsigned long nmi_reason;
121 };
122 #endif /* !__ASSEMBLY__ */
123 
124 #ifdef CONFIG_X86_32
125 #include <asm/xen/interface_32.h>
126 #else
127 #include <asm/xen/interface_64.h>
128 #endif
129 
130 #include <asm/pvclock-abi.h>
131 
132 #ifndef __ASSEMBLY__
133 /*
134  * The following is all CPU context. Note that the fpu_ctxt block is filled
135  * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
136  */
137 struct vcpu_guest_context {
138  /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */
139  struct { char x[512]; } fpu_ctxt; /* User-level FPU registers */
140 #define VGCF_I387_VALID (1<<0)
141 #define VGCF_HVM_GUEST (1<<1)
142 #define VGCF_IN_KERNEL (1<<2)
143  unsigned long flags; /* VGCF_* flags */
144  struct cpu_user_regs user_regs; /* User-level CPU registers */
145  struct trap_info trap_ctxt[256]; /* Virtual IDT */
146  unsigned long ldt_base, ldt_ents; /* LDT (linear address, # ents) */
147  unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */
148  unsigned long kernel_ss, kernel_sp; /* Virtual TSS (only SS1/SP1) */
149  /* NB. User pagetable on x86/64 is placed in ctrlreg[1]. */
150  unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */
151  unsigned long debugreg[8]; /* DB0-DB7 (debug registers) */
152 #ifdef __i386__
153  unsigned long event_callback_cs; /* CS:EIP of event callback */
154  unsigned long event_callback_eip;
155  unsigned long failsafe_callback_cs; /* CS:EIP of failsafe callback */
156  unsigned long failsafe_callback_eip;
157 #else
158  unsigned long event_callback_eip;
159  unsigned long failsafe_callback_eip;
160  unsigned long syscall_callback_eip;
161 #endif
162  unsigned long vm_assist; /* VMASST_TYPE_* bitmap */
163 #ifdef __x86_64__
164  /* Segment base addresses. */
165  uint64_t fs_base;
166  uint64_t gs_base_kernel;
167  uint64_t gs_base_user;
168 #endif
169 };
170 DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context);
171 #endif /* !__ASSEMBLY__ */
172 
173 /*
174  * Prefix forces emulation of some non-trapping instructions.
175  * Currently only CPUID.
176  */
177 #ifdef __ASSEMBLY__
178 #define XEN_EMULATE_PREFIX .byte 0x0f,0x0b,0x78,0x65,0x6e ;
179 #define XEN_CPUID XEN_EMULATE_PREFIX cpuid
180 #else
181 #define XEN_EMULATE_PREFIX ".byte 0x0f,0x0b,0x78,0x65,0x6e ; "
182 #define XEN_CPUID XEN_EMULATE_PREFIX "cpuid"
183 #endif
184 
185 #endif /* _ASM_X86_XEN_INTERFACE_H */
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