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uncompress.h
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1 /*
2  * arch/arm/plat-mxc/include/mach/uncompress.h
3  *
4  * Copyright (C) 1999 ARM Limited
5  * Copyright (C) Shane Nay (shane@minirl.com)
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15  * GNU General Public License for more details.
16  */
17 #ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__
18 #define __ASM_ARCH_MXC_UNCOMPRESS_H__
19 
20 #define __MXC_BOOT_UNCOMPRESS
21 
22 #include <asm/mach-types.h>
23 
24 unsigned long uart_base;
25 
26 #define UART(x) (*(volatile unsigned long *)(uart_base + (x)))
27 
28 #define USR2 0x98
29 #define USR2_TXFE (1<<14)
30 #define TXR 0x40
31 #define UCR1 0x80
32 #define UCR1_UARTEN 1
33 
34 /*
35  * The following code assumes the serial port has already been
36  * initialized by the bootloader. We search for the first enabled
37  * port in the most probable order. If you didn't setup a port in
38  * your bootloader then nothing will appear (which might be desired).
39  *
40  * This does not append a newline
41  */
42 
43 static void putc(int ch)
44 {
45  if (!uart_base)
46  return;
47  if (!(UART(UCR1) & UCR1_UARTEN))
48  return;
49 
50  while (!(UART(USR2) & USR2_TXFE))
51  barrier();
52 
53  UART(TXR) = ch;
54 }
55 
56 static inline void flush(void)
57 {
58 }
59 
60 #define MX1_UART1_BASE_ADDR 0x00206000
61 #define MX25_UART1_BASE_ADDR 0x43f90000
62 #define MX2X_UART1_BASE_ADDR 0x1000a000
63 #define MX3X_UART1_BASE_ADDR 0x43F90000
64 #define MX3X_UART2_BASE_ADDR 0x43F94000
65 #define MX3X_UART5_BASE_ADDR 0x43FB4000
66 #define MX51_UART1_BASE_ADDR 0x73fbc000
67 #define MX50_UART1_BASE_ADDR 0x53fbc000
68 #define MX53_UART1_BASE_ADDR 0x53fbc000
69 
70 static __inline__ void __arch_decomp_setup(unsigned long arch_id)
71 {
72  switch (arch_id) {
73  case MACH_TYPE_MX1ADS:
74  case MACH_TYPE_SCB9328:
75  uart_base = MX1_UART1_BASE_ADDR;
76  break;
77  case MACH_TYPE_MX25_3DS:
78  uart_base = MX25_UART1_BASE_ADDR;
79  break;
80  case MACH_TYPE_IMX27LITE:
81  case MACH_TYPE_MX27_3DS:
82  case MACH_TYPE_MX27ADS:
83  case MACH_TYPE_PCM038:
84  case MACH_TYPE_MX21ADS:
85  case MACH_TYPE_PCA100:
86  case MACH_TYPE_MXT_TD60:
87  case MACH_TYPE_IMX27IPCAM:
88  uart_base = MX2X_UART1_BASE_ADDR;
89  break;
90  case MACH_TYPE_MX31LITE:
91  case MACH_TYPE_ARMADILLO5X0:
92  case MACH_TYPE_MX31MOBOARD:
93  case MACH_TYPE_QONG:
94  case MACH_TYPE_MX31_3DS:
95  case MACH_TYPE_PCM037:
96  case MACH_TYPE_MX31ADS:
97  case MACH_TYPE_MX35_3DS:
98  case MACH_TYPE_PCM043:
99  case MACH_TYPE_LILLY1131:
100  case MACH_TYPE_VPR200:
101  case MACH_TYPE_EUKREA_CPUIMX35SD:
102  uart_base = MX3X_UART1_BASE_ADDR;
103  break;
104  case MACH_TYPE_MAGX_ZN5:
105  uart_base = MX3X_UART2_BASE_ADDR;
106  break;
107  case MACH_TYPE_BUG:
108  uart_base = MX3X_UART5_BASE_ADDR;
109  break;
110  case MACH_TYPE_MX51_BABBAGE:
111  case MACH_TYPE_EUKREA_CPUIMX51SD:
112  case MACH_TYPE_MX51_3DS:
113  uart_base = MX51_UART1_BASE_ADDR;
114  break;
115  case MACH_TYPE_MX50_RDP:
116  uart_base = MX50_UART1_BASE_ADDR;
117  break;
118  case MACH_TYPE_MX53_EVK:
119  case MACH_TYPE_MX53_LOCO:
120  case MACH_TYPE_MX53_SMD:
121  case MACH_TYPE_MX53_ARD:
122  uart_base = MX53_UART1_BASE_ADDR;
123  break;
124  default:
125  break;
126  }
127 }
128 
129 #define arch_decomp_setup() __arch_decomp_setup(arch_id)
130 #define arch_decomp_wdog()
131 
132 #endif /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */
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