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14 #define CARD_NAME "Aureal Vortex 2"
15 #define CARD_NAME_SHORT "au8830"
21 #define NR_MIXOUT 0x10
25 #define VORTEX_ADBDMA_STAT 0x27e00
26 #define POS_MASK 0x00000fff
28 #define ADB_SUBBUF_MASK 0x00003000
29 #define ADB_SUBBUF_SHIFT 0xc
30 #define VORTEX_ADBDMA_CTRL 0x27a00
31 #define OFFSET_MASK 0x00000fff
32 #define OFFSET_SHIFT 0x0
33 #define IE_MASK 0x00001000
35 #define DIR_MASK 0x00002000
37 #define FMT_MASK 0x0003c000
39 #define ADB_FIFO_EN_SHIFT 0x15
40 #define ADB_FIFO_EN (1 << 0x15)
42 #define VORTEX_ADBDMA_BUFCFG0 0x27800
43 #define VORTEX_ADBDMA_BUFCFG1 0x27804
44 #define VORTEX_ADBDMA_BUFBASE 0x27400
45 #define VORTEX_ADBDMA_START 0x27c00
47 #define VORTEX_ADBDMA_STATUS 0x27A90
52 #define VORTEX_ENGINE_CTRL 0x27ae8
53 #define ENGINE_INIT 0x1380000
56 #define VORTEX_WTDMA_CTRL 0x27900
57 #define VORTEX_WTDMA_STAT 0x27d00
58 #define WT_SUBBUF_MASK 0x3
59 #define WT_SUBBUF_SHIFT 0xc
60 #define VORTEX_WTDMA_BUFBASE 0x27000
61 #define VORTEX_WTDMA_BUFCFG0 0x27600
62 #define VORTEX_WTDMA_BUFCFG1 0x27604
63 #define VORTEX_WTDMA_START 0x27b00
66 #define VORTEX_ADB_SR 0x28400
67 #define VORTEX_ADB_RTBASE 0x28000
68 #define VORTEX_ADB_RTBASE_COUNT 173
69 #define VORTEX_ADB_CHNBASE 0x282b4
70 #define VORTEX_ADB_CHNBASE_COUNT 24
71 #define ROUTE_MASK 0xffff
72 #define SOURCE_MASK 0xff00
76 #define OFFSET_ADBDMA 0x00
77 #define OFFSET_ADBDMAB 0x20
78 #define OFFSET_SRCIN 0x40
79 #define OFFSET_SRCOUT 0x20
80 #define OFFSET_MIXIN 0x50
81 #define OFFSET_MIXOUT 0x30
82 #define OFFSET_CODECIN 0x70
83 #define OFFSET_CODECOUT 0x88
84 #define OFFSET_SPORTIN 0x78
85 #define OFFSET_SPORTOUT 0x90
86 #define OFFSET_SPDIFIN 0x7A
87 #define OFFSET_SPDIFOUT 0x92
88 #define OFFSET_AC98IN 0x7c
89 #define OFFSET_AC98OUT 0x94
90 #define OFFSET_EQIN 0xa0
91 #define OFFSET_EQOUT 0x7e
92 #define OFFSET_A3DIN 0x70
93 #define OFFSET_A3DOUT 0xA6
94 #define OFFSET_WT0 0x40
95 #define OFFSET_WT1 0x80
98 #define OFFSET_XTALKOUT 0x66
99 #define OFFSET_XTALKIN 0x96
100 #define OFFSET_EFXOUT 0x68
101 #define OFFSET_EFXIN 0x80
104 #define ADB_DMA(x) (x)
105 #define ADB_SRCOUT(x) (x + OFFSET_SRCOUT)
106 #define ADB_SRCIN(x) (x + OFFSET_SRCIN)
107 #define ADB_MIXOUT(x) (x + OFFSET_MIXOUT)
108 #define ADB_MIXIN(x) (x + OFFSET_MIXIN)
109 #define ADB_CODECIN(x) (x + OFFSET_CODECIN)
110 #define ADB_CODECOUT(x) (x + OFFSET_CODECOUT)
111 #define ADB_SPORTIN(x) (x + OFFSET_SPORTIN)
112 #define ADB_SPORTOUT(x) (x + OFFSET_SPORTOUT)
113 #define ADB_SPDIFIN(x) (x + OFFSET_SPDIFIN)
114 #define ADB_SPDIFOUT(x) (x + OFFSET_SPDIFOUT)
115 #define ADB_EQIN(x) (x + OFFSET_EQIN)
116 #define ADB_EQOUT(x) (x + OFFSET_EQOUT)
117 #define ADB_A3DOUT(x) (x + OFFSET_A3DOUT)
118 #define ADB_A3DIN(x) (x + OFFSET_A3DIN)
120 #define ADB_WTOUT(x,y) (((x)==0)?((y) + OFFSET_WT0):((y) + OFFSET_WT1))
121 #define ADB_XTALKIN(x) ((x) + OFFSET_XTALKIN)
122 #define ADB_XTALKOUT(x) ((x) + OFFSET_XTALKOUT)
124 #define MIX_DEFIGAIN 0x08
125 #define MIX_DEFOGAIN 0x08
128 #define VORTEX_MIXER_SR 0x21f00
129 #define VORTEX_MIXER_CLIP 0x21f80
130 #define VORTEX_MIXER_CHNBASE 0x21e40
131 #define VORTEX_MIXER_RTBASE 0x21e00
132 #define MIXER_RTBASE_SIZE 0x38
133 #define VORTEX_MIX_ENIN 0x21a00
134 #define VORTEX_MIX_SMP 0x21c00
137 #define VORTEX_MIX_INVOL_B 0x20000
138 #define VORTEX_MIX_VOL_B 0x20800
139 #define VORTEX_MIX_INVOL_A 0x21000
140 #define VORTEX_MIX_VOL_A 0x21800
146 #define VORTEX_SRC_CHNBASE 0x26c40
147 #define VORTEX_SRC_RTBASE 0x26c00
148 #define VORTEX_SRCBLOCK_SR 0x26cc0
149 #define VORTEX_SRC_SOURCE 0x26cc4
150 #define VORTEX_SRC_SOURCESIZE 0x26cc8
161 #define VORTEX_SRC_CONVRATIO 0x26e40
162 #define VORTEX_SRC_DRIFT0 0x26e80
163 #define VORTEX_SRC_DRIFT1 0x26ec0
164 #define VORTEX_SRC_DRIFT2 0x26f40
165 #define VORTEX_SRC_U0 0x26e00
166 #define U0_SLOWLOCK 0x200
167 #define VORTEX_SRC_U1 0x26f00
168 #define VORTEX_SRC_U2 0x26f80
169 #define VORTEX_SRC_DATA 0x26800
170 #define VORTEX_SRC_DATA0 0x26000
173 #define VORTEX_FIFO_ADBCTRL 0x16100
174 #define VORTEX_FIFO_WTCTRL 0x16000
175 #define FIFO_RDONLY 0x00000001
176 #define FIFO_CTRL 0x00000002
177 #define FIFO_VALID 0x00000010
178 #define FIFO_EMPTY 0x00000020
179 #define FIFO_U0 0x00002000
180 #define FIFO_U1 0x00040000
181 #define FIFO_SIZE_BITS 6
182 #define FIFO_SIZE (1<<(FIFO_SIZE_BITS)) // 0x40
183 #define FIFO_MASK (FIFO_SIZE-1) //0x3f
184 #define FIFO_BITS 0x1c400000
185 #define VORTEX_FIFO_ADBDATA 0x14000
186 #define VORTEX_FIFO_WTDATA 0x10000
188 #define VORTEX_FIFO_GIRT 0x17000
193 #define VORTEX_CODEC_CHN 0x29080
195 #define VORTEX_CODEC_CTRL 0x29184
196 #define VORTEX_CODEC_IO 0x29188
198 #define VORTEX_CODEC_SPORTCTRL 0x2918c
200 #define VORTEX_CODEC_EN 0x29190
201 #define EN_AUDIO0 0x00000300
202 #define EN_MODEM 0x00000c00
203 #define EN_AUDIO1 0x00003000
204 #define EN_SPORT 0x00030000
205 #define EN_SPDIF 0x000c0000
206 #define EN_CODEC (EN_AUDIO1 | EN_AUDIO0)
208 #define VORTEX_SPDIF_SMPRATE 0x29194
210 #define VORTEX_SPDIF_FLAGS 0x2205c
211 #define VORTEX_SPDIF_CFG0 0x291D0
212 #define VORTEX_SPDIF_CFG1 0x291D4
214 #define VORTEX_SMP_TIME 0x29198
215 #define VORTEX_SMP_TIMER 0x2919c
216 #define VORTEX_CODEC2_CTRL 0x291a0
218 #define VORTEX_MODEM_CTRL 0x291ac
221 #define VORTEX_IRQ_SOURCE 0x2a000
222 #define VORTEX_IRQ_CTRL 0x2a004
225 #define VORTEX_STAT 0x2a008
226 #define STAT_IRQ 0x00000001
228 #define VORTEX_CTRL 0x2a00c
229 #define CTRL_MIDI_EN 0x00000001
230 #define CTRL_MIDI_PORT 0x00000060
231 #define CTRL_GAME_EN 0x00000008
232 #define CTRL_GAME_PORT 0x00000e00
233 #define CTRL_IRQ_ENABLE 0x00004000
234 #define CTRL_SPDIF 0x00000000
235 #define CTRL_SPORT 0x00200000
236 #define CTRL_RST 0x00800000
237 #define CTRL_UNKNOWN 0x01000000
240 #define VORTEX_IRQ_STAT 0x2919c
243 #define VORTEX_MIDI_DATA 0x28800
244 #define VORTEX_MIDI_CMD 0x28804
246 #define VORTEX_GAME_LEGACY 0x28808
247 #define VORTEX_CTRL2 0x2880c
248 #define CTRL2_GAME_ADCMODE 0x40
249 #define VORTEX_GAME_AXIS 0x28810
251 #define AXIS_RANGE 0x1fff