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auxadc.h
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1 /*
2  * include/linux/mfd/wm831x/auxadc.h -- Auxiliary ADC interface for WM831x
3  *
4  * Copyright 2009 Wolfson Microelectronics PLC.
5  *
6  * Author: Mark Brown <[email protected]>
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of the GNU General Public License as published by the
10  * Free Software Foundation; either version 2 of the License, or (at your
11  * option) any later version.
12  *
13  */
14 
15 #ifndef __MFD_WM831X_AUXADC_H__
16 #define __MFD_WM831X_AUXADC_H__
17 
18 /*
19  * R16429 (0x402D) - AuxADC Data
20  */
21 #define WM831X_AUX_DATA_SRC_MASK 0xF000 /* AUX_DATA_SRC - [15:12] */
22 #define WM831X_AUX_DATA_SRC_SHIFT 12 /* AUX_DATA_SRC - [15:12] */
23 #define WM831X_AUX_DATA_SRC_WIDTH 4 /* AUX_DATA_SRC - [15:12] */
24 #define WM831X_AUX_DATA_MASK 0x0FFF /* AUX_DATA - [11:0] */
25 #define WM831X_AUX_DATA_SHIFT 0 /* AUX_DATA - [11:0] */
26 #define WM831X_AUX_DATA_WIDTH 12 /* AUX_DATA - [11:0] */
27 
28 /*
29  * R16430 (0x402E) - AuxADC Control
30  */
31 #define WM831X_AUX_ENA 0x8000 /* AUX_ENA */
32 #define WM831X_AUX_ENA_MASK 0x8000 /* AUX_ENA */
33 #define WM831X_AUX_ENA_SHIFT 15 /* AUX_ENA */
34 #define WM831X_AUX_ENA_WIDTH 1 /* AUX_ENA */
35 #define WM831X_AUX_CVT_ENA 0x4000 /* AUX_CVT_ENA */
36 #define WM831X_AUX_CVT_ENA_MASK 0x4000 /* AUX_CVT_ENA */
37 #define WM831X_AUX_CVT_ENA_SHIFT 14 /* AUX_CVT_ENA */
38 #define WM831X_AUX_CVT_ENA_WIDTH 1 /* AUX_CVT_ENA */
39 #define WM831X_AUX_SLPENA 0x1000 /* AUX_SLPENA */
40 #define WM831X_AUX_SLPENA_MASK 0x1000 /* AUX_SLPENA */
41 #define WM831X_AUX_SLPENA_SHIFT 12 /* AUX_SLPENA */
42 #define WM831X_AUX_SLPENA_WIDTH 1 /* AUX_SLPENA */
43 #define WM831X_AUX_FRC_ENA 0x0800 /* AUX_FRC_ENA */
44 #define WM831X_AUX_FRC_ENA_MASK 0x0800 /* AUX_FRC_ENA */
45 #define WM831X_AUX_FRC_ENA_SHIFT 11 /* AUX_FRC_ENA */
46 #define WM831X_AUX_FRC_ENA_WIDTH 1 /* AUX_FRC_ENA */
47 #define WM831X_AUX_RATE_MASK 0x003F /* AUX_RATE - [5:0] */
48 #define WM831X_AUX_RATE_SHIFT 0 /* AUX_RATE - [5:0] */
49 #define WM831X_AUX_RATE_WIDTH 6 /* AUX_RATE - [5:0] */
50 
51 /*
52  * R16431 (0x402F) - AuxADC Source
53  */
54 #define WM831X_AUX_CAL_SEL 0x8000 /* AUX_CAL_SEL */
55 #define WM831X_AUX_CAL_SEL_MASK 0x8000 /* AUX_CAL_SEL */
56 #define WM831X_AUX_CAL_SEL_SHIFT 15 /* AUX_CAL_SEL */
57 #define WM831X_AUX_CAL_SEL_WIDTH 1 /* AUX_CAL_SEL */
58 #define WM831X_AUX_BKUP_BATT_SEL 0x0400 /* AUX_BKUP_BATT_SEL */
59 #define WM831X_AUX_BKUP_BATT_SEL_MASK 0x0400 /* AUX_BKUP_BATT_SEL */
60 #define WM831X_AUX_BKUP_BATT_SEL_SHIFT 10 /* AUX_BKUP_BATT_SEL */
61 #define WM831X_AUX_BKUP_BATT_SEL_WIDTH 1 /* AUX_BKUP_BATT_SEL */
62 #define WM831X_AUX_WALL_SEL 0x0200 /* AUX_WALL_SEL */
63 #define WM831X_AUX_WALL_SEL_MASK 0x0200 /* AUX_WALL_SEL */
64 #define WM831X_AUX_WALL_SEL_SHIFT 9 /* AUX_WALL_SEL */
65 #define WM831X_AUX_WALL_SEL_WIDTH 1 /* AUX_WALL_SEL */
66 #define WM831X_AUX_BATT_SEL 0x0100 /* AUX_BATT_SEL */
67 #define WM831X_AUX_BATT_SEL_MASK 0x0100 /* AUX_BATT_SEL */
68 #define WM831X_AUX_BATT_SEL_SHIFT 8 /* AUX_BATT_SEL */
69 #define WM831X_AUX_BATT_SEL_WIDTH 1 /* AUX_BATT_SEL */
70 #define WM831X_AUX_USB_SEL 0x0080 /* AUX_USB_SEL */
71 #define WM831X_AUX_USB_SEL_MASK 0x0080 /* AUX_USB_SEL */
72 #define WM831X_AUX_USB_SEL_SHIFT 7 /* AUX_USB_SEL */
73 #define WM831X_AUX_USB_SEL_WIDTH 1 /* AUX_USB_SEL */
74 #define WM831X_AUX_SYSVDD_SEL 0x0040 /* AUX_SYSVDD_SEL */
75 #define WM831X_AUX_SYSVDD_SEL_MASK 0x0040 /* AUX_SYSVDD_SEL */
76 #define WM831X_AUX_SYSVDD_SEL_SHIFT 6 /* AUX_SYSVDD_SEL */
77 #define WM831X_AUX_SYSVDD_SEL_WIDTH 1 /* AUX_SYSVDD_SEL */
78 #define WM831X_AUX_BATT_TEMP_SEL 0x0020 /* AUX_BATT_TEMP_SEL */
79 #define WM831X_AUX_BATT_TEMP_SEL_MASK 0x0020 /* AUX_BATT_TEMP_SEL */
80 #define WM831X_AUX_BATT_TEMP_SEL_SHIFT 5 /* AUX_BATT_TEMP_SEL */
81 #define WM831X_AUX_BATT_TEMP_SEL_WIDTH 1 /* AUX_BATT_TEMP_SEL */
82 #define WM831X_AUX_CHIP_TEMP_SEL 0x0010 /* AUX_CHIP_TEMP_SEL */
83 #define WM831X_AUX_CHIP_TEMP_SEL_MASK 0x0010 /* AUX_CHIP_TEMP_SEL */
84 #define WM831X_AUX_CHIP_TEMP_SEL_SHIFT 4 /* AUX_CHIP_TEMP_SEL */
85 #define WM831X_AUX_CHIP_TEMP_SEL_WIDTH 1 /* AUX_CHIP_TEMP_SEL */
86 #define WM831X_AUX_AUX4_SEL 0x0008 /* AUX_AUX4_SEL */
87 #define WM831X_AUX_AUX4_SEL_MASK 0x0008 /* AUX_AUX4_SEL */
88 #define WM831X_AUX_AUX4_SEL_SHIFT 3 /* AUX_AUX4_SEL */
89 #define WM831X_AUX_AUX4_SEL_WIDTH 1 /* AUX_AUX4_SEL */
90 #define WM831X_AUX_AUX3_SEL 0x0004 /* AUX_AUX3_SEL */
91 #define WM831X_AUX_AUX3_SEL_MASK 0x0004 /* AUX_AUX3_SEL */
92 #define WM831X_AUX_AUX3_SEL_SHIFT 2 /* AUX_AUX3_SEL */
93 #define WM831X_AUX_AUX3_SEL_WIDTH 1 /* AUX_AUX3_SEL */
94 #define WM831X_AUX_AUX2_SEL 0x0002 /* AUX_AUX2_SEL */
95 #define WM831X_AUX_AUX2_SEL_MASK 0x0002 /* AUX_AUX2_SEL */
96 #define WM831X_AUX_AUX2_SEL_SHIFT 1 /* AUX_AUX2_SEL */
97 #define WM831X_AUX_AUX2_SEL_WIDTH 1 /* AUX_AUX2_SEL */
98 #define WM831X_AUX_AUX1_SEL 0x0001 /* AUX_AUX1_SEL */
99 #define WM831X_AUX_AUX1_SEL_MASK 0x0001 /* AUX_AUX1_SEL */
100 #define WM831X_AUX_AUX1_SEL_SHIFT 0 /* AUX_AUX1_SEL */
101 #define WM831X_AUX_AUX1_SEL_WIDTH 1 /* AUX_AUX1_SEL */
102 
103 /*
104  * R16432 (0x4030) - Comparator Control
105  */
106 #define WM831X_DCOMP4_STS 0x0800 /* DCOMP4_STS */
107 #define WM831X_DCOMP4_STS_MASK 0x0800 /* DCOMP4_STS */
108 #define WM831X_DCOMP4_STS_SHIFT 11 /* DCOMP4_STS */
109 #define WM831X_DCOMP4_STS_WIDTH 1 /* DCOMP4_STS */
110 #define WM831X_DCOMP3_STS 0x0400 /* DCOMP3_STS */
111 #define WM831X_DCOMP3_STS_MASK 0x0400 /* DCOMP3_STS */
112 #define WM831X_DCOMP3_STS_SHIFT 10 /* DCOMP3_STS */
113 #define WM831X_DCOMP3_STS_WIDTH 1 /* DCOMP3_STS */
114 #define WM831X_DCOMP2_STS 0x0200 /* DCOMP2_STS */
115 #define WM831X_DCOMP2_STS_MASK 0x0200 /* DCOMP2_STS */
116 #define WM831X_DCOMP2_STS_SHIFT 9 /* DCOMP2_STS */
117 #define WM831X_DCOMP2_STS_WIDTH 1 /* DCOMP2_STS */
118 #define WM831X_DCOMP1_STS 0x0100 /* DCOMP1_STS */
119 #define WM831X_DCOMP1_STS_MASK 0x0100 /* DCOMP1_STS */
120 #define WM831X_DCOMP1_STS_SHIFT 8 /* DCOMP1_STS */
121 #define WM831X_DCOMP1_STS_WIDTH 1 /* DCOMP1_STS */
122 #define WM831X_DCMP4_ENA 0x0008 /* DCMP4_ENA */
123 #define WM831X_DCMP4_ENA_MASK 0x0008 /* DCMP4_ENA */
124 #define WM831X_DCMP4_ENA_SHIFT 3 /* DCMP4_ENA */
125 #define WM831X_DCMP4_ENA_WIDTH 1 /* DCMP4_ENA */
126 #define WM831X_DCMP3_ENA 0x0004 /* DCMP3_ENA */
127 #define WM831X_DCMP3_ENA_MASK 0x0004 /* DCMP3_ENA */
128 #define WM831X_DCMP3_ENA_SHIFT 2 /* DCMP3_ENA */
129 #define WM831X_DCMP3_ENA_WIDTH 1 /* DCMP3_ENA */
130 #define WM831X_DCMP2_ENA 0x0002 /* DCMP2_ENA */
131 #define WM831X_DCMP2_ENA_MASK 0x0002 /* DCMP2_ENA */
132 #define WM831X_DCMP2_ENA_SHIFT 1 /* DCMP2_ENA */
133 #define WM831X_DCMP2_ENA_WIDTH 1 /* DCMP2_ENA */
134 #define WM831X_DCMP1_ENA 0x0001 /* DCMP1_ENA */
135 #define WM831X_DCMP1_ENA_MASK 0x0001 /* DCMP1_ENA */
136 #define WM831X_DCMP1_ENA_SHIFT 0 /* DCMP1_ENA */
137 #define WM831X_DCMP1_ENA_WIDTH 1 /* DCMP1_ENA */
138 
139 /*
140  * R16433 (0x4031) - Comparator 1
141  */
142 #define WM831X_DCMP1_SRC_MASK 0xE000 /* DCMP1_SRC - [15:13] */
143 #define WM831X_DCMP1_SRC_SHIFT 13 /* DCMP1_SRC - [15:13] */
144 #define WM831X_DCMP1_SRC_WIDTH 3 /* DCMP1_SRC - [15:13] */
145 #define WM831X_DCMP1_GT 0x1000 /* DCMP1_GT */
146 #define WM831X_DCMP1_GT_MASK 0x1000 /* DCMP1_GT */
147 #define WM831X_DCMP1_GT_SHIFT 12 /* DCMP1_GT */
148 #define WM831X_DCMP1_GT_WIDTH 1 /* DCMP1_GT */
149 #define WM831X_DCMP1_THR_MASK 0x0FFF /* DCMP1_THR - [11:0] */
150 #define WM831X_DCMP1_THR_SHIFT 0 /* DCMP1_THR - [11:0] */
151 #define WM831X_DCMP1_THR_WIDTH 12 /* DCMP1_THR - [11:0] */
152 
153 /*
154  * R16434 (0x4032) - Comparator 2
155  */
156 #define WM831X_DCMP2_SRC_MASK 0xE000 /* DCMP2_SRC - [15:13] */
157 #define WM831X_DCMP2_SRC_SHIFT 13 /* DCMP2_SRC - [15:13] */
158 #define WM831X_DCMP2_SRC_WIDTH 3 /* DCMP2_SRC - [15:13] */
159 #define WM831X_DCMP2_GT 0x1000 /* DCMP2_GT */
160 #define WM831X_DCMP2_GT_MASK 0x1000 /* DCMP2_GT */
161 #define WM831X_DCMP2_GT_SHIFT 12 /* DCMP2_GT */
162 #define WM831X_DCMP2_GT_WIDTH 1 /* DCMP2_GT */
163 #define WM831X_DCMP2_THR_MASK 0x0FFF /* DCMP2_THR - [11:0] */
164 #define WM831X_DCMP2_THR_SHIFT 0 /* DCMP2_THR - [11:0] */
165 #define WM831X_DCMP2_THR_WIDTH 12 /* DCMP2_THR - [11:0] */
166 
167 /*
168  * R16435 (0x4033) - Comparator 3
169  */
170 #define WM831X_DCMP3_SRC_MASK 0xE000 /* DCMP3_SRC - [15:13] */
171 #define WM831X_DCMP3_SRC_SHIFT 13 /* DCMP3_SRC - [15:13] */
172 #define WM831X_DCMP3_SRC_WIDTH 3 /* DCMP3_SRC - [15:13] */
173 #define WM831X_DCMP3_GT 0x1000 /* DCMP3_GT */
174 #define WM831X_DCMP3_GT_MASK 0x1000 /* DCMP3_GT */
175 #define WM831X_DCMP3_GT_SHIFT 12 /* DCMP3_GT */
176 #define WM831X_DCMP3_GT_WIDTH 1 /* DCMP3_GT */
177 #define WM831X_DCMP3_THR_MASK 0x0FFF /* DCMP3_THR - [11:0] */
178 #define WM831X_DCMP3_THR_SHIFT 0 /* DCMP3_THR - [11:0] */
179 #define WM831X_DCMP3_THR_WIDTH 12 /* DCMP3_THR - [11:0] */
180 
181 /*
182  * R16436 (0x4034) - Comparator 4
183  */
184 #define WM831X_DCMP4_SRC_MASK 0xE000 /* DCMP4_SRC - [15:13] */
185 #define WM831X_DCMP4_SRC_SHIFT 13 /* DCMP4_SRC - [15:13] */
186 #define WM831X_DCMP4_SRC_WIDTH 3 /* DCMP4_SRC - [15:13] */
187 #define WM831X_DCMP4_GT 0x1000 /* DCMP4_GT */
188 #define WM831X_DCMP4_GT_MASK 0x1000 /* DCMP4_GT */
189 #define WM831X_DCMP4_GT_SHIFT 12 /* DCMP4_GT */
190 #define WM831X_DCMP4_GT_WIDTH 1 /* DCMP4_GT */
191 #define WM831X_DCMP4_THR_MASK 0x0FFF /* DCMP4_THR - [11:0] */
192 #define WM831X_DCMP4_THR_SHIFT 0 /* DCMP4_THR - [11:0] */
193 #define WM831X_DCMP4_THR_WIDTH 12 /* DCMP4_THR - [11:0] */
194 
195 #define WM831X_AUX_CAL_FACTOR 0xfff
196 #define WM831X_AUX_CAL_NOMINAL 0x222
197 
198 enum wm831x_auxadc {
199  WM831X_AUX_CAL = 15,
200  WM831X_AUX_BKUP_BATT = 10,
201  WM831X_AUX_WALL = 9,
202  WM831X_AUX_BATT = 8,
203  WM831X_AUX_USB = 7,
204  WM831X_AUX_SYSVDD = 6,
205  WM831X_AUX_BATT_TEMP = 5,
206  WM831X_AUX_CHIP_TEMP = 4,
207  WM831X_AUX_AUX4 = 3,
208  WM831X_AUX_AUX3 = 2,
209  WM831X_AUX_AUX2 = 1,
210  WM831X_AUX_AUX1 = 0,
211 };
212 
213 int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input);
214 int wm831x_auxadc_read_uv(struct wm831x *wm831x, enum wm831x_auxadc input);
215 
216 #endif
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