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13 #ifndef __ASM_ARCH_BASTCPLD_H
14 #define __ASM_ARCH_BASTCPLD_H
18 #define BAST_CPLD_CTRL1_LRCOFF (0x00)
19 #define BAST_CPLD_CTRL1_LRCADC (0x01)
20 #define BAST_CPLD_CTRL1_LRCDAC (0x02)
21 #define BAST_CPLD_CTRL1_LRCARM (0x03)
22 #define BAST_CPLD_CTRL1_LRMASK (0x03)
26 #define BAST_CPLD_CTRL2_WNAND (0x04)
27 #define BAST_CPLD_CTLR2_IDERST (0x08)
31 #define BAST_CPLD_CTRL3_IDMASK (0x0e)
32 #define BAST_CPLD_CTRL3_ROMWEN (0x01)
36 #define BAST_CPLD_CTRL4_LLAT (0x01)
37 #define BAST_CPLD_CTRL4_LCDRW (0x02)
38 #define BAST_CPLD_CTRL4_LCDCMD (0x04)
39 #define BAST_CPLD_CTRL4_LCDE2 (0x01)
43 #define BAST_CPLD_DMA0_PRIIDE (0<<0)
44 #define BAST_CPLD_DMA0_SECIDE (1<<0)
45 #define BAST_CPLD_DMA0_ISA15 (2<<0)
46 #define BAST_CPLD_DMA0_ISA36 (3<<0)
48 #define BAST_CPLD_DMA1_PRIIDE (0<<2)
49 #define BAST_CPLD_DMA1_SECIDE (1<<2)
50 #define BAST_CPLD_DMA1_ISA15 (2<<2)
51 #define BAST_CPLD_DMA1_ISA36 (3<<2)