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bcma_driver_gmac_cmn.h
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1 #ifndef LINUX_BCMA_DRIVER_GMAC_CMN_H_
2 #define LINUX_BCMA_DRIVER_GMAC_CMN_H_
3 
4 #include <linux/types.h>
5 
6 #define BCMA_GMAC_CMN_STAG0 0x000
7 #define BCMA_GMAC_CMN_STAG1 0x004
8 #define BCMA_GMAC_CMN_STAG2 0x008
9 #define BCMA_GMAC_CMN_STAG3 0x00C
10 #define BCMA_GMAC_CMN_PARSER_CTL 0x020
11 #define BCMA_GMAC_CMN_MIB_MAX_LEN 0x024
12 #define BCMA_GMAC_CMN_PHY_ACCESS 0x100
13 #define BCMA_GMAC_CMN_PA_DATA_MASK 0x0000ffff
14 #define BCMA_GMAC_CMN_PA_ADDR_MASK 0x001f0000
15 #define BCMA_GMAC_CMN_PA_ADDR_SHIFT 16
16 #define BCMA_GMAC_CMN_PA_REG_MASK 0x1f000000
17 #define BCMA_GMAC_CMN_PA_REG_SHIFT 24
18 #define BCMA_GMAC_CMN_PA_WRITE 0x20000000
19 #define BCMA_GMAC_CMN_PA_START 0x40000000
20 #define BCMA_GMAC_CMN_PHY_CTL 0x104
21 #define BCMA_GMAC_CMN_PC_EPA_MASK 0x0000001f
22 #define BCMA_GMAC_CMN_PC_MCT_MASK 0x007f0000
23 #define BCMA_GMAC_CMN_PC_MCT_SHIFT 16
24 #define BCMA_GMAC_CMN_PC_MTE 0x00800000
25 #define BCMA_GMAC_CMN_GMAC0_RGMII_CTL 0x110
26 #define BCMA_GMAC_CMN_CFP_ACCESS 0x200
27 #define BCMA_GMAC_CMN_CFP_TCAM_DATA0 0x210
28 #define BCMA_GMAC_CMN_CFP_TCAM_DATA1 0x214
29 #define BCMA_GMAC_CMN_CFP_TCAM_DATA2 0x218
30 #define BCMA_GMAC_CMN_CFP_TCAM_DATA3 0x21C
31 #define BCMA_GMAC_CMN_CFP_TCAM_DATA4 0x220
32 #define BCMA_GMAC_CMN_CFP_TCAM_DATA5 0x224
33 #define BCMA_GMAC_CMN_CFP_TCAM_DATA6 0x228
34 #define BCMA_GMAC_CMN_CFP_TCAM_DATA7 0x22C
35 #define BCMA_GMAC_CMN_CFP_TCAM_MASK0 0x230
36 #define BCMA_GMAC_CMN_CFP_TCAM_MASK1 0x234
37 #define BCMA_GMAC_CMN_CFP_TCAM_MASK2 0x238
38 #define BCMA_GMAC_CMN_CFP_TCAM_MASK3 0x23C
39 #define BCMA_GMAC_CMN_CFP_TCAM_MASK4 0x240
40 #define BCMA_GMAC_CMN_CFP_TCAM_MASK5 0x244
41 #define BCMA_GMAC_CMN_CFP_TCAM_MASK6 0x248
42 #define BCMA_GMAC_CMN_CFP_TCAM_MASK7 0x24C
43 #define BCMA_GMAC_CMN_CFP_ACTION_DATA 0x250
44 #define BCMA_GMAC_CMN_TCAM_BIST_CTL 0x2A0
45 #define BCMA_GMAC_CMN_TCAM_BIST_STATUS 0x2A4
46 #define BCMA_GMAC_CMN_TCAM_CMP_STATUS 0x2A8
47 #define BCMA_GMAC_CMN_TCAM_DISABLE 0x2AC
48 #define BCMA_GMAC_CMN_TCAM_TEST_CTL 0x2F0
49 #define BCMA_GMAC_CMN_UDF_0_A3_A0 0x300
50 #define BCMA_GMAC_CMN_UDF_0_A7_A4 0x304
51 #define BCMA_GMAC_CMN_UDF_0_A8 0x308
52 #define BCMA_GMAC_CMN_UDF_1_A3_A0 0x310
53 #define BCMA_GMAC_CMN_UDF_1_A7_A4 0x314
54 #define BCMA_GMAC_CMN_UDF_1_A8 0x318
55 #define BCMA_GMAC_CMN_UDF_2_A3_A0 0x320
56 #define BCMA_GMAC_CMN_UDF_2_A7_A4 0x324
57 #define BCMA_GMAC_CMN_UDF_2_A8 0x328
58 #define BCMA_GMAC_CMN_UDF_0_B3_B0 0x330
59 #define BCMA_GMAC_CMN_UDF_0_B7_B4 0x334
60 #define BCMA_GMAC_CMN_UDF_0_B8 0x338
61 #define BCMA_GMAC_CMN_UDF_1_B3_B0 0x340
62 #define BCMA_GMAC_CMN_UDF_1_B7_B4 0x344
63 #define BCMA_GMAC_CMN_UDF_1_B8 0x348
64 #define BCMA_GMAC_CMN_UDF_2_B3_B0 0x350
65 #define BCMA_GMAC_CMN_UDF_2_B7_B4 0x354
66 #define BCMA_GMAC_CMN_UDF_2_B8 0x358
67 #define BCMA_GMAC_CMN_UDF_0_C3_C0 0x360
68 #define BCMA_GMAC_CMN_UDF_0_C7_C4 0x364
69 #define BCMA_GMAC_CMN_UDF_0_C8 0x368
70 #define BCMA_GMAC_CMN_UDF_1_C3_C0 0x370
71 #define BCMA_GMAC_CMN_UDF_1_C7_C4 0x374
72 #define BCMA_GMAC_CMN_UDF_1_C8 0x378
73 #define BCMA_GMAC_CMN_UDF_2_C3_C0 0x380
74 #define BCMA_GMAC_CMN_UDF_2_C7_C4 0x384
75 #define BCMA_GMAC_CMN_UDF_2_C8 0x388
76 #define BCMA_GMAC_CMN_UDF_0_D3_D0 0x390
77 #define BCMA_GMAC_CMN_UDF_0_D7_D4 0x394
78 #define BCMA_GMAC_CMN_UDF_0_D11_D8 0x394
79 
81  struct bcma_device *core;
82 
83  /* Drivers accessing BCMA_GMAC_CMN_PHY_ACCESS and
84  * BCMA_GMAC_CMN_PHY_CTL need to take that mutex first. */
85  struct mutex phy_mutex;
86 };
87 
88 /* Register access */
89 #define gmac_cmn_read16(gc, offset) bcma_read16((gc)->core, offset)
90 #define gmac_cmn_read32(gc, offset) bcma_read32((gc)->core, offset)
91 #define gmac_cmn_write16(gc, offset, val) bcma_write16((gc)->core, offset, val)
92 #define gmac_cmn_write32(gc, offset, val) bcma_write32((gc)->core, offset, val)
93 
94 #ifdef CONFIG_BCMA_DRIVER_GMAC_CMN
96 #else
97 static inline void bcma_core_gmac_cmn_init(struct bcma_drv_gmac_cmn *gc) { }
98 #endif
99 
100 #endif /* LINUX_BCMA_DRIVER_GMAC_CMN_H_ */