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portmux.h
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1 /*
2  * Copyright 2011 Analog Devices Inc.
3  *
4  * Licensed under the GPL-2 or later
5  */
6 
7 #ifndef _MACH_PORTMUX_H_
8 #define _MACH_PORTMUX_H_
9 
10 #define MAX_RESOURCES MAX_BLACKFIN_GPIOS
11 
12 /* EMAC RMII Port Mux */
13 #define P_MII0_MDC (P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(0))
14 #define P_MII0_MDIO (P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(0))
15 #define P_MII0_ETxD0 (P_DEFINED | P_IDENT(GPIO_PC2) | P_FUNCT(0))
16 #define P_MII0_ERxD0 (P_DEFINED | P_IDENT(GPIO_PC0) | P_FUNCT(0))
17 #define P_MII0_ETxD1 (P_DEFINED | P_IDENT(GPIO_PC3) | P_FUNCT(0))
18 #define P_MII0_ERxD1 (P_DEFINED | P_IDENT(GPIO_PC1) | P_FUNCT(0))
19 #define P_MII0_ETxEN (P_DEFINED | P_IDENT(GPIO_PB13) | P_FUNCT(0))
20 #define P_MII0_PHYINT (P_DEFINED | P_IDENT(GPIO_PD6) | P_FUNCT(0))
21 #define P_MII0_CRS (P_DEFINED | P_IDENT(GPIO_PC5) | P_FUNCT(0))
22 #define P_MII0_ERxER (P_DEFINED | P_IDENT(GPIO_PC4) | P_FUNCT(0))
23 #define P_MII0_TxCLK (P_DEFINED | P_IDENT(GPIO_PB14) | P_FUNCT(0))
24 
25 #define P_RMII0 {\
26  P_MII0_ETxD0, \
27  P_MII0_ETxD1, \
28  P_MII0_ETxEN, \
29  P_MII0_ERxD0, \
30  P_MII0_ERxD1, \
31  P_MII0_ERxER, \
32  P_MII0_TxCLK, \
33  P_MII0_PHYINT, \
34  P_MII0_CRS, \
35  P_MII0_MDC, \
36  P_MII0_MDIO, 0}
37 
38 #define P_MII1_MDC (P_DEFINED | P_IDENT(GPIO_PE10) | P_FUNCT(0))
39 #define P_MII1_MDIO (P_DEFINED | P_IDENT(GPIO_PE11) | P_FUNCT(0))
40 #define P_MII1_ETxD0 (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0))
41 #define P_MII1_ERxD0 (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0))
42 #define P_MII1_ETxD1 (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(0))
43 #define P_MII1_ERxD1 (P_DEFINED | P_IDENT(GPIO_PE15) | P_FUNCT(0))
44 #define P_MII1_ETxEN (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(0))
45 #define P_MII1_PHYINT (P_DEFINED | P_IDENT(GPIO_PE12) | P_FUNCT(0))
46 #define P_MII1_CRS (P_DEFINED | P_IDENT(GPIO_PE13) | P_FUNCT(0))
47 #define P_MII1_ERxER (P_DEFINED | P_IDENT(GPIO_PE14) | P_FUNCT(0))
48 #define P_MII1_TxCLK (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(0))
49 
50 #define P_RMII1 {\
51  P_MII1_ETxD0, \
52  P_MII1_ETxD1, \
53  P_MII1_ETxEN, \
54  P_MII1_ERxD0, \
55  P_MII1_ERxD1, \
56  P_MII1_ERxER, \
57  P_MII1_TxCLK, \
58  P_MII1_PHYINT, \
59  P_MII1_CRS, \
60  P_MII1_MDC, \
61  P_MII1_MDIO, 0}
62 
63 /* PPI Port Mux */
64 #define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(1))
65 #define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(1))
66 #define P_PPI0_D2 (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(1))
67 #define P_PPI0_D3 (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(1))
68 #define P_PPI0_D4 (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(1))
69 #define P_PPI0_D5 (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(1))
70 #define P_PPI0_D6 (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(1))
71 #define P_PPI0_D7 (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(1))
72 #define P_PPI0_D8 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(1))
73 #define P_PPI0_D9 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1))
74 #define P_PPI0_D10 (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(1))
75 #define P_PPI0_D11 (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(1))
76 #define P_PPI0_D12 (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(1))
77 #define P_PPI0_D13 (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(1))
78 #define P_PPI0_D14 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1))
79 #define P_PPI0_D15 (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1))
80 #define P_PPI0_D16 (P_DEFINED | P_IDENT(GPIO_PE3) | P_FUNCT(1))
81 #define P_PPI0_D17 (P_DEFINED | P_IDENT(GPIO_PE4) | P_FUNCT(1))
82 #define P_PPI0_D18 (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(1))
83 #define P_PPI0_D19 (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(1))
84 #define P_PPI0_D20 (P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(1))
85 #define P_PPI0_D21 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(1))
86 #define P_PPI0_D22 (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(1))
87 #define P_PPI0_D23 (P_DEFINED | P_IDENT(GPIO_PE5) | P_FUNCT(1))
88 #define P_PPI0_CLK (P_DEFINED | P_IDENT(GPIO_PE9) | P_FUNCT(1))
89 #define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PE8) | P_FUNCT(1))
90 #define P_PPI0_FS2 (P_DEFINED | P_IDENT(GPIO_PE7) | P_FUNCT(1))
91 #define P_PPI0_FS3 (P_DEFINED | P_IDENT(GPIO_PE6) | P_FUNCT(1))
92 
93 #define P_PPI1_D0 (P_DEFINED | P_IDENT(GPIO_PC0) | P_FUNCT(1))
94 #define P_PPI1_D1 (P_DEFINED | P_IDENT(GPIO_PC1) | P_FUNCT(1))
95 #define P_PPI1_D2 (P_DEFINED | P_IDENT(GPIO_PC2) | P_FUNCT(1))
96 #define P_PPI1_D3 (P_DEFINED | P_IDENT(GPIO_PC3) | P_FUNCT(1))
97 #define P_PPI1_D4 (P_DEFINED | P_IDENT(GPIO_PC4) | P_FUNCT(1))
98 #define P_PPI1_D5 (P_DEFINED | P_IDENT(GPIO_PC5) | P_FUNCT(1))
99 #define P_PPI1_D6 (P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(1))
100 #define P_PPI1_D7 (P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(1))
101 #define P_PPI1_D8 (P_DEFINED | P_IDENT(GPIO_PC8) | P_FUNCT(1))
102 #define P_PPI1_D9 (P_DEFINED | P_IDENT(GPIO_PC9) | P_FUNCT(1))
103 #define P_PPI1_D10 (P_DEFINED | P_IDENT(GPIO_PC10) | P_FUNCT(1))
104 #define P_PPI1_D11 (P_DEFINED | P_IDENT(GPIO_PC11) | P_FUNCT(1))
105 #define P_PPI1_D12 (P_DEFINED | P_IDENT(GPIO_PC12) | P_FUNCT(1))
106 #define P_PPI1_D13 (P_DEFINED | P_IDENT(GPIO_PC13) | P_FUNCT(1))
107 #define P_PPI1_D14 (P_DEFINED | P_IDENT(GPIO_PC14) | P_FUNCT(1))
108 #define P_PPI1_D15 (P_DEFINED | P_IDENT(GPIO_PC15) | P_FUNCT(1))
109 #define P_PPI1_D16 (P_DEFINED | P_IDENT(GPIO_PD0) | P_FUNCT(1))
110 #define P_PPI1_D17 (P_DEFINED | P_IDENT(GPIO_PD1) | P_FUNCT(1))
111 #define P_PPI1_CLK (P_DEFINED | P_IDENT(GPIO_PB14) | P_FUNCT(1))
112 #define P_PPI1_FS1 (P_DEFINED | P_IDENT(GPIO_PB13) | P_FUNCT(1))
113 #define P_PPI1_FS2 (P_DEFINED | P_IDENT(GPIO_PD6) | P_FUNCT(1))
114 #define P_PPI1_FS3 (P_DEFINED | P_IDENT(GPIO_PB15) | P_FUNCT(1))
115 
116 #define P_PPI2_D0 (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(1))
117 #define P_PPI2_D1 (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(1))
118 #define P_PPI2_D2 (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(1))
119 #define P_PPI2_D3 (P_DEFINED | P_IDENT(GPIO_PA3) | P_FUNCT(1))
120 #define P_PPI2_D4 (P_DEFINED | P_IDENT(GPIO_PA4) | P_FUNCT(1))
121 #define P_PPI2_D5 (P_DEFINED | P_IDENT(GPIO_PA5) | P_FUNCT(1))
122 #define P_PPI2_D6 (P_DEFINED | P_IDENT(GPIO_PA6) | P_FUNCT(1))
123 #define P_PPI2_D7 (P_DEFINED | P_IDENT(GPIO_PA7) | P_FUNCT(1))
124 #define P_PPI2_D8 (P_DEFINED | P_IDENT(GPIO_PA8) | P_FUNCT(1))
125 #define P_PPI2_D9 (P_DEFINED | P_IDENT(GPIO_PA9) | P_FUNCT(1))
126 #define P_PPI2_D10 (P_DEFINED | P_IDENT(GPIO_PA10) | P_FUNCT(1))
127 #define P_PPI2_D11 (P_DEFINED | P_IDENT(GPIO_PA11) | P_FUNCT(1))
128 #define P_PPI2_D12 (P_DEFINED | P_IDENT(GPIO_PA12) | P_FUNCT(1))
129 #define P_PPI2_D13 (P_DEFINED | P_IDENT(GPIO_PA13) | P_FUNCT(1))
130 #define P_PPI2_D14 (P_DEFINED | P_IDENT(GPIO_PA14) | P_FUNCT(1))
131 #define P_PPI2_D15 (P_DEFINED | P_IDENT(GPIO_PA15) | P_FUNCT(1))
132 #define P_PPI2_D16 (P_DEFINED | P_IDENT(GPIO_PB7) | P_FUNCT(1))
133 #define P_PPI2_D17 (P_DEFINED | P_IDENT(GPIO_PB8) | P_FUNCT(1))
134 #define P_PPI2_CLK (P_DEFINED | P_IDENT(GPIO_PB0) | P_FUNCT(1))
135 #define P_PPI2_FS1 (P_DEFINED | P_IDENT(GPIO_PB1) | P_FUNCT(1))
136 #define P_PPI2_FS2 (P_DEFINED | P_IDENT(GPIO_PB2) | P_FUNCT(1))
137 #define P_PPI2_FS3 (P_DEFINED | P_IDENT(GPIO_PB3) | P_FUNCT(1))
138 
139 /* SPI Port Mux */
140 #define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PD11) | P_FUNCT(3))
141 #define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PD4) | P_FUNCT(0))
142 #define P_SPI0_MISO (P_DEFINED | P_IDENT(GPIO_PD2) | P_FUNCT(0))
143 #define P_SPI0_MOSI (P_DEFINED | P_IDENT(GPIO_PD3) | P_FUNCT(0))
144 #define P_SPI0_RDY (P_DEFINED | P_IDENT(GPIO_PD10) | P_FUNCT(0))
145 #define P_SPI0_D2 (P_DEFINED | P_IDENT(GPIO_PD0) | P_FUNCT(0))
146 #define P_SPI0_D3 (P_DEFINED | P_IDENT(GPIO_PD1) | P_FUNCT(0))
147 
148 #define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PD11) | P_FUNCT(0))
149 #define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PD1) | P_FUNCT(2))
150 #define P_SPI0_SSEL3 (P_DEFINED | P_IDENT(GPIO_PD0) | P_FUNCT(2))
151 #define P_SPI0_SSEL4 (P_DEFINED | P_IDENT(GPIO_PC15) | P_FUNCT(0))
152 #define P_SPI0_SSEL5 (P_DEFINED | P_IDENT(GPIO_PD9) | P_FUNCT(0))
153 #define P_SPI0_SSEL6 (P_DEFINED | P_IDENT(GPIO_PC13) | P_FUNCT(0))
154 #define P_SPI0_SSEL7 (P_DEFINED | P_IDENT(GPIO_PC12) | P_FUNCT(0))
155 
156 #define P_SPI1_SS (P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(3))
157 #define P_SPI1_SCK (P_DEFINED | P_IDENT(GPIO_PD5) | P_FUNCT(0))
158 #define P_SPI1_MISO (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(0))
159 #define P_SPI1_MOSI (P_DEFINED | P_IDENT(GPIO_PD13) | P_FUNCT(0))
160 #define P_SPI1_RDY (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(0))
161 #define P_SPI1_D2 (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(0))
162 #define P_SPI1_D3 (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(0))
163 
164 #define P_SPI1_SSEL1 (P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(0))
165 #define P_SPI1_SSEL2 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(2))
166 #define P_SPI1_SSEL3 (P_DEFINED | P_IDENT(GPIO_PD10) | P_FUNCT(2))
167 #define P_SPI1_SSEL4 (P_DEFINED | P_IDENT(GPIO_PD9) | P_FUNCT(2))
168 #define P_SPI1_SSEL5 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(0))
169 #define P_SPI1_SSEL6 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(0))
170 #define P_SPI1_SSEL7 (P_DEFINED | P_IDENT(GPIO_PC14) | P_FUNCT(0))
171 
172 #define GPIO_DEFAULT_BOOT_SPI_CS
173 #define P_DEFAULT_BOOT_SPI_CS
174 
175 /* CORE IDLE */
176 #define P_IDLEA (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(1))
177 #define P_IDLEB (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(1))
178 #define P_SLEEP (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(2))
179 
180 /* UART Port Mux */
181 #define P_UART0_TX (P_DEFINED | P_IDENT(GPIO_PD7) | P_FUNCT(1))
182 #define P_UART0_RX (P_DEFINED | P_IDENT(GPIO_PD8) | P_FUNCT(1))
183 #define P_UART0_RTS (P_DEFINED | P_IDENT(GPIO_PD9) | P_FUNCT(1))
184 #define P_UART0_CTS (P_DEFINED | P_IDENT(GPIO_PD10) | P_FUNCT(1))
185 
186 #define P_UART1_TX (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(0))
187 #define P_UART1_RX (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(0))
188 #define P_UART1_RTS (P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(0))
189 #define P_UART1_CTS (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(0))
190 
191 /* Timer */
192 #define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(3))
193 #define P_TMR0 (P_DEFINED | P_IDENT(GPIO_PE14) | P_FUNCT(2))
194 #define P_TMR1 (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(1))
195 #define P_TMR2 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(1))
196 #define P_TMR3 (P_DEFINED | P_IDENT(GPIO_PG8) | P_FUNCT(1))
197 #define P_TMR4 (P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(1))
198 #define P_TMR5 (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(1))
199 #define P_TMR6 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(1))
200 #define P_TMR7 (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(1))
201 
202 /* RSI */
203 #define P_RSI_DATA0 (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(2))
204 #define P_RSI_DATA1 (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2))
205 #define P_RSI_DATA2 (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(2))
206 #define P_RSI_DATA3 (P_DEFINED | P_IDENT(GPIO_PE15) | P_FUNCT(2))
207 #define P_RSI_DATA4 (P_DEFINED | P_IDENT(GPIO_PE13) | P_FUNCT(2))
208 #define P_RSI_DATA5 (P_DEFINED | P_IDENT(GPIO_PE12) | P_FUNCT(2))
209 #define P_RSI_DATA6 (P_DEFINED | P_IDENT(GPIO_PE10) | P_FUNCT(2))
210 #define P_RSI_DATA7 (P_DEFINED | P_IDENT(GPIO_PE11) | P_FUNCT(2))
211 #define P_RSI_CMD (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(1))
212 #define P_RSI_CLK (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(1))
213 
214 /* PTP */
215 #define P_PTP0_PPS (P_DEFINED | P_IDENT(GPIO_PB15) | P_FUNCT(0))
216 #define P_PTP0_CLKIN (P_DEFINED | P_IDENT(GPIO_PC13) | P_FUNCT(2))
217 #define P_PTP0_AUXIN (P_DEFINED | P_IDENT(GPIO_PC11) | P_FUNCT(2))
218 
219 #define P_PTP1_PPS (P_DEFINED | P_IDENT(GPIO_PC9) | P_FUNCT(0))
220 #define P_PTP1_CLKIN (P_DEFINED | P_IDENT(GPIO_PC13) | P_FUNCT(2))
221 #define P_PTP1_AUXIN (P_DEFINED | P_IDENT(GPIO_PC11) | P_FUNCT(2))
222 
223 /* SMC Port Mux */
224 #define P_A3 (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0))
225 #define P_A4 (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0))
226 #define P_A5 (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0))
227 #define P_A6 (P_DEFINED | P_IDENT(GPIO_PA3) | P_FUNCT(0))
228 #define P_A7 (P_DEFINED | P_IDENT(GPIO_PA4) | P_FUNCT(0))
229 #define P_A8 (P_DEFINED | P_IDENT(GPIO_PA5) | P_FUNCT(0))
230 #define P_A9 (P_DEFINED | P_IDENT(GPIO_PA6) | P_FUNCT(0))
231 #define P_A10 (P_DEFINED | P_IDENT(GPIO_PA7) | P_FUNCT(0))
232 #define P_A11 (P_DEFINED | P_IDENT(GPIO_PA8) | P_FUNCT(0))
233 #define P_A12 (P_DEFINED | P_IDENT(GPIO_PA9) | P_FUNCT(0))
234 #define P_A13 (P_DEFINED | P_IDENT(GPIO_PB2) | P_FUNCT(0))
235 #define P_A14 (P_DEFINED | P_IDENT(GPIO_PA10) | P_FUNCT(0))
236 #define P_A15 (P_DEFINED | P_IDENT(GPIO_PA11) | P_FUNCT(0))
237 #define P_A16 (P_DEFINED | P_IDENT(GPIO_PB3) | P_FUNCT(0))
238 #define P_A17 (P_DEFINED | P_IDENT(GPIO_PA12) | P_FUNCT(0))
239 #define P_A18 (P_DEFINED | P_IDENT(GPIO_PA13) | P_FUNCT(0))
240 #define P_A19 (P_DEFINED | P_IDENT(GPIO_PA14) | P_FUNCT(0))
241 #define P_A20 (P_DEFINED | P_IDENT(GPIO_PA15) | P_FUNCT(0))
242 #define P_A21 (P_DEFINED | P_IDENT(GPIO_PB6) | P_FUNCT(0))
243 #define P_A22 (P_DEFINED | P_IDENT(GPIO_PB7) | P_FUNCT(0))
244 #define P_A23 (P_DEFINED | P_IDENT(GPIO_PB8) | P_FUNCT(0))
245 #define P_A24 (P_DEFINED | P_IDENT(GPIO_PB10) | P_FUNCT(0))
246 #define P_A25 (P_DEFINED | P_IDENT(GPIO_PB11) | P_FUNCT(0))
247 #define P_NORCK (P_DEFINED | P_IDENT(GPIO_PB0) | P_FUNCT(0))
248 
249 #define P_AMS1 (P_DEFINED | P_IDENT(GPIO_PB1) | P_FUNCT(0))
250 #define P_AMS2 (P_DEFINED | P_IDENT(GPIO_PB4) | P_FUNCT(0))
251 #define P_AMS3 (P_DEFINED | P_IDENT(GPIO_PB5) | P_FUNCT(0))
252 
253 /* CAN */
254 #define P_CAN0_TX (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2))
255 #define P_CAN0_RX (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(2))
256 
257 /* SPORT */
258 #define P_SPORT0_ACLK (P_DEFINED | P_IDENT(GPIO_PB5) | P_FUNCT(2))
259 #define P_SPORT0_AFS (P_DEFINED | P_IDENT(GPIO_PB4) | P_FUNCT(2))
260 #define P_SPORT0_AD0 (P_DEFINED | P_IDENT(GPIO_PB9) | P_FUNCT(2))
261 #define P_SPORT0_AD1 (P_DEFINED | P_IDENT(GPIO_PB12) | P_FUNCT(2))
262 #define P_SPORT0_ATDV (P_DEFINED | P_IDENT(GPIO_PB6) | P_FUNCT(1))
263 #define P_SPORT0_BCLK (P_DEFINED | P_IDENT(GPIO_PB8) | P_FUNCT(2))
264 #define P_SPORT0_BFS (P_DEFINED | P_IDENT(GPIO_PB7) | P_FUNCT(2))
265 #define P_SPORT0_BD0 (P_DEFINED | P_IDENT(GPIO_PB11) | P_FUNCT(2))
266 #define P_SPORT0_BD1 (P_DEFINED | P_IDENT(GPIO_PB10) | P_FUNCT(2))
267 #define P_SPORT0_BTDV (P_DEFINED | P_IDENT(GPIO_PB12) | P_FUNCT(1))
268 
269 #define P_SPORT1_ACLK (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(2))
270 #define P_SPORT1_AFS (P_DEFINED | P_IDENT(GPIO_PE5) | P_FUNCT(2))
271 #define P_SPORT1_AD0 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(2))
272 #define P_SPORT1_AD1 (P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(2))
273 #define P_SPORT1_ATDV (P_DEFINED | P_IDENT(GPIO_PE6) | P_FUNCT(0))
274 #define P_SPORT1_BCLK (P_DEFINED | P_IDENT(GPIO_PE4) | P_FUNCT(2))
275 #define P_SPORT1_BFS (P_DEFINED | P_IDENT(GPIO_PE3) | P_FUNCT(2))
276 #define P_SPORT1_BD0 (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(2))
277 #define P_SPORT1_BD1 (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(2))
278 #define P_SPORT1_BTDV (P_DEFINED | P_IDENT(GPIO_PE7) | P_FUNCT(0))
279 
280 #define P_SPORT2_ACLK (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0))
281 #define P_SPORT2_AFS (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
282 #define P_SPORT2_AD0 (P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(0))
283 #define P_SPORT2_AD1 (P_DEFINED | P_IDENT(GPIO_PG8) | P_FUNCT(0))
284 #define P_SPORT2_ATDV (P_DEFINED | P_IDENT(GPIO_PE14) | P_FUNCT(1))
285 #define P_SPORT2_BCLK (P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(1))
286 #define P_SPORT2_BFS (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(0))
287 #define P_SPORT2_BD0 (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(0))
288 #define P_SPORT2_BD1 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(0))
289 #define P_SPORT2_BTDV (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(2))
290 
291 /* LINK PORT */
292 #define P_LP0_CLK (P_DEFINED | P_IDENT(GPIO_PB0) | P_FUNCT(2))
293 #define P_LP0_ACK (P_DEFINED | P_IDENT(GPIO_PB1) | P_FUNCT(2))
294 #define P_LP0_D0 (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(2))
295 #define P_LP0_D1 (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(2))
296 #define P_LP0_D2 (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(2))
297 #define P_LP0_D3 (P_DEFINED | P_IDENT(GPIO_PA3) | P_FUNCT(2))
298 #define P_LP0_D4 (P_DEFINED | P_IDENT(GPIO_PA4) | P_FUNCT(2))
299 #define P_LP0_D5 (P_DEFINED | P_IDENT(GPIO_PA5) | P_FUNCT(2))
300 #define P_LP0_D6 (P_DEFINED | P_IDENT(GPIO_PA6) | P_FUNCT(2))
301 #define P_LP0_D7 (P_DEFINED | P_IDENT(GPIO_PA7) | P_FUNCT(2))
302 
303 #define P_LP1_CLK (P_DEFINED | P_IDENT(GPIO_PB3) | P_FUNCT(2))
304 #define P_LP1_ACK (P_DEFINED | P_IDENT(GPIO_PB2) | P_FUNCT(2))
305 #define P_LP1_D0 (P_DEFINED | P_IDENT(GPIO_PA8) | P_FUNCT(2))
306 #define P_LP1_D1 (P_DEFINED | P_IDENT(GPIO_PA9) | P_FUNCT(2))
307 #define P_LP1_D2 (P_DEFINED | P_IDENT(GPIO_PA10) | P_FUNCT(2))
308 #define P_LP1_D3 (P_DEFINED | P_IDENT(GPIO_PA11) | P_FUNCT(2))
309 #define P_LP1_D4 (P_DEFINED | P_IDENT(GPIO_PA12) | P_FUNCT(2))
310 #define P_LP1_D5 (P_DEFINED | P_IDENT(GPIO_PA13) | P_FUNCT(2))
311 #define P_LP1_D6 (P_DEFINED | P_IDENT(GPIO_PA14) | P_FUNCT(2))
312 #define P_LP1_D7 (P_DEFINED | P_IDENT(GPIO_PA15) | P_FUNCT(2))
313 
314 #define P_LP2_CLK (P_DEFINED | P_IDENT(GPIO_PE6) | P_FUNCT(2))
315 #define P_LP2_ACK (P_DEFINED | P_IDENT(GPIO_PE7) | P_FUNCT(2))
316 #define P_LP2_D0 (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(2))
317 #define P_LP2_D1 (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(2))
318 #define P_LP2_D2 (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(2))
319 #define P_LP2_D3 (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(2))
320 #define P_LP2_D4 (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(2))
321 #define P_LP2_D5 (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(2))
322 #define P_LP2_D6 (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(2))
323 #define P_LP2_D7 (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(2))
324 
325 #define P_LP3_CLK (P_DEFINED | P_IDENT(GPIO_PE9) | P_FUNCT(2))
326 #define P_LP3_ACK (P_DEFINED | P_IDENT(GPIO_PE8) | P_FUNCT(2))
327 #define P_LP3_D0 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(2))
328 #define P_LP3_D1 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(2))
329 #define P_LP3_D2 (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(2))
330 #define P_LP3_D3 (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(2))
331 #define P_LP3_D4 (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(2))
332 #define P_LP3_D5 (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(2))
333 #define P_LP3_D6 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(2))
334 #define P_LP3_D7 (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(2))
335 
336 /* TWI */
337 #define P_TWI0_SCL (P_DONTCARE)
338 #define P_TWI0_SDA (P_DONTCARE)
339 #define P_TWI1_SCL (P_DONTCARE)
340 #define P_TWI1_SDA (P_DONTCARE)
341 
342 /* Rotary Encoder */
343 #define P_CNT_CZM (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(3))
344 #define P_CNT_CUD (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(3))
345 #define P_CNT_CDG (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(3))
346 
347 #endif /* _MACH_PORTMUX_H_ */
Generated on Thu Jan 10 2013 13:03:51 for Linux Kernel by   doxygen 1.8.2