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22 #define SDIO_HEADER_LEN 4
26 #define SDIO_BLOCK_SIZE 64
29 #define FIRMWARE_TRANSFER_NBLOCK 2
32 #define FW_EXTRA_LEN 36
34 #define MRVDRV_SIZE_OF_CMD_BUFFER (2 * 1024)
36 #define MRVDRV_BT_RX_PACKET_BUFFER_SIZE \
37 (HCI_MAX_FRAME_SIZE + FW_EXTRA_LEN)
39 #define ALLOC_BUF_SIZE (((max_t (int, MRVDRV_BT_RX_PACKET_BUFFER_SIZE, \
40 MRVDRV_SIZE_OF_CMD_BUFFER) + SDIO_HEADER_LEN \
41 + SDIO_BLOCK_SIZE - 1) / SDIO_BLOCK_SIZE) \
45 #define MAX_POLL_TRIES 100
48 #define MAX_WRITE_IOMEM_RETRY 2
51 #define HOST_POWER_UP BIT(1)
52 #define HOST_CMD53_FIN BIT(2)
54 #define HIM_DISABLE 0xff
55 #define HIM_ENABLE (BIT(0) | BIT(1))
57 #define UP_LD_HOST_INT_STATUS BIT(0)
58 #define DN_LD_HOST_INT_STATUS BIT(1)
60 #define DN_LD_CARD_RDY BIT(0)
61 #define CARD_IO_READY BIT(3)
63 #define FIRMWARE_READY 0xfedc
103 #define BTSDIO_DMA_ALIGN 8
106 #define ALIGN_SZ(p, a) \
107 (((p) + ((a) - 1)) & ~((a) - 1))
110 #define ALIGN_ADDR(p, a) \
111 ((((unsigned long)(p)) + (((unsigned long)(a)) - 1)) & \
112 ~(((unsigned long)(a)) - 1))