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24 #include <linux/uuid.h>
27 #define CPER_SIG_RECORD "CPER"
28 #define CPER_SIG_SIZE 4
30 #define CPER_SIG_END 0xffffffff
36 #define CPER_RECORD_REV 0x0100
56 #define CPER_VALID_PLATFORM_ID 0x0001
58 #define CPER_VALID_TIMESTAMP 0x0002
60 #define CPER_VALID_PARTITION_ID 0x0004
68 #define CPER_NOTIFY_CMC \
69 UUID_LE(0x2DCE8BB1, 0xBDD7, 0x450e, 0xB9, 0xAD, 0x9C, 0xF4, \
70 0xEB, 0xD4, 0xF8, 0x90)
72 #define CPER_NOTIFY_CPE \
73 UUID_LE(0x4E292F96, 0xD843, 0x4a55, 0xA8, 0xC2, 0xD4, 0x81, \
74 0xF2, 0x7E, 0xBE, 0xEE)
76 #define CPER_NOTIFY_MCE \
77 UUID_LE(0xE8F56FFE, 0x919C, 0x4cc5, 0xBA, 0x88, 0x65, 0xAB, \
78 0xE1, 0x49, 0x13, 0xBB)
80 #define CPER_NOTIFY_PCIE \
81 UUID_LE(0xCF93C01F, 0x1A16, 0x4dfc, 0xB8, 0xBC, 0x9C, 0x4D, \
82 0xAF, 0x67, 0xC1, 0x04)
84 #define CPER_NOTIFY_INIT \
85 UUID_LE(0xCC5263E8, 0x9308, 0x454a, 0x89, 0xD0, 0x34, 0x0B, \
86 0xD3, 0x9B, 0xC9, 0x8E)
88 #define CPER_NOTIFY_NMI \
89 UUID_LE(0x5BAD89FF, 0xB7E6, 0x42c9, 0x81, 0x4A, 0xCF, 0x24, \
90 0x85, 0xD6, 0xE9, 0x8A)
92 #define CPER_NOTIFY_BOOT \
93 UUID_LE(0x3D61A466, 0xAB40, 0x409a, 0xA6, 0x98, 0xF3, 0x62, \
94 0xD4, 0x64, 0xB3, 0x8F)
96 #define CPER_NOTIFY_DMAR \
97 UUID_LE(0x667DD791, 0xC6B3, 0x4c27, 0x8A, 0x6B, 0x0F, 0x8E, \
98 0x72, 0x2D, 0xEB, 0x41)
104 #define CPER_HW_ERROR_FLAGS_RECOVERED 0x1
106 #define CPER_HW_ERROR_FLAGS_PREVERR 0x2
108 #define CPER_HW_ERROR_FLAGS_SIMULATED 0x4
114 #define CPER_SEC_REV 0x0100
123 #define CPER_SEC_VALID_FRU_ID 0x1
125 #define CPER_SEC_VALID_FRU_TEXT 0x2
133 #define CPER_SEC_PRIMARY 0x0001
139 #define CPER_SEC_CONTAINMENT_WARNING 0x0002
141 #define CPER_SEC_RESET 0x0004
143 #define CPER_SEC_ERROR_THRESHOLD_EXCEEDED 0x0008
149 #define CPER_SEC_RESOURCE_NOT_ACCESSIBLE 0x0010
156 #define CPER_SEC_LATENT_ERROR 0x0020
164 #define CPER_SEC_PROC_GENERIC \
165 UUID_LE(0x9876CCAD, 0x47B4, 0x4bdb, 0xB6, 0x5E, 0x16, 0xF1, \
166 0x93, 0xC4, 0xF3, 0xDB)
168 #define CPER_SEC_PROC_IA \
169 UUID_LE(0xDC3EA0B0, 0xA144, 0x4797, 0xB9, 0x5B, 0x53, 0xFA, \
170 0x24, 0x2B, 0x6E, 0x1D)
172 #define CPER_SEC_PROC_IPF \
173 UUID_LE(0xE429FAF1, 0x3CB7, 0x11D4, 0x0B, 0xCA, 0x07, 0x00, \
174 0x80, 0xC7, 0x3C, 0x88, 0x81)
176 #define CPER_SEC_PLATFORM_MEM \
177 UUID_LE(0xA5BC1114, 0x6F64, 0x4EDE, 0xB8, 0x63, 0x3E, 0x83, \
178 0xED, 0x7C, 0x83, 0xB1)
179 #define CPER_SEC_PCIE \
180 UUID_LE(0xD995E954, 0xBBC1, 0x430F, 0xAD, 0x91, 0xB4, 0x4D, \
181 0xCB, 0x3C, 0x6F, 0x35)
183 #define CPER_SEC_FW_ERR_REC_REF \
184 UUID_LE(0x81212A96, 0x09ED, 0x4996, 0x94, 0x71, 0x8D, 0x72, \
185 0x9C, 0x8E, 0x69, 0xED)
187 #define CPER_SEC_PCI_X_BUS \
188 UUID_LE(0xC5753963, 0x3B84, 0x4095, 0xBF, 0x78, 0xED, 0xDA, \
189 0xD3, 0xF9, 0xC9, 0xDD)
191 #define CPER_SEC_PCI_DEV \
192 UUID_LE(0xEB5E4685, 0xCA66, 0x4769, 0xB6, 0xA2, 0x26, 0x06, \
193 0x8B, 0x00, 0x13, 0x26)
194 #define CPER_SEC_DMAR_GENERIC \
195 UUID_LE(0x5B51FEF7, 0xC79D, 0x4434, 0x8F, 0x1B, 0xAA, 0x62, \
196 0xDE, 0x3E, 0x2C, 0x64)
198 #define CPER_SEC_DMAR_VT \
199 UUID_LE(0x71761D37, 0x32B2, 0x45cd, 0xA7, 0xD0, 0xB0, 0xFE, \
200 0xDD, 0x93, 0xE8, 0xCF)
202 #define CPER_SEC_DMAR_IOMMU \
203 UUID_LE(0x036F84E1, 0x7F37, 0x428c, 0xA7, 0x9E, 0x57, 0x5F, \
204 0xDF, 0xAA, 0x84, 0xEC)
206 #define CPER_PROC_VALID_TYPE 0x0001
207 #define CPER_PROC_VALID_ISA 0x0002
208 #define CPER_PROC_VALID_ERROR_TYPE 0x0004
209 #define CPER_PROC_VALID_OPERATION 0x0008
210 #define CPER_PROC_VALID_FLAGS 0x0010
211 #define CPER_PROC_VALID_LEVEL 0x0020
212 #define CPER_PROC_VALID_VERSION 0x0040
213 #define CPER_PROC_VALID_BRAND_INFO 0x0080
214 #define CPER_PROC_VALID_ID 0x0100
215 #define CPER_PROC_VALID_TARGET_ADDRESS 0x0200
216 #define CPER_PROC_VALID_REQUESTOR_ID 0x0400
217 #define CPER_PROC_VALID_RESPONDER_ID 0x0800
218 #define CPER_PROC_VALID_IP 0x1000
220 #define CPER_MEM_VALID_ERROR_STATUS 0x0001
221 #define CPER_MEM_VALID_PHYSICAL_ADDRESS 0x0002
222 #define CPER_MEM_VALID_PHYSICAL_ADDRESS_MASK 0x0004
223 #define CPER_MEM_VALID_NODE 0x0008
224 #define CPER_MEM_VALID_CARD 0x0010
225 #define CPER_MEM_VALID_MODULE 0x0020
226 #define CPER_MEM_VALID_BANK 0x0040
227 #define CPER_MEM_VALID_DEVICE 0x0080
228 #define CPER_MEM_VALID_ROW 0x0100
229 #define CPER_MEM_VALID_COLUMN 0x0200
230 #define CPER_MEM_VALID_BIT_POSITION 0x0400
231 #define CPER_MEM_VALID_REQUESTOR_ID 0x0800
232 #define CPER_MEM_VALID_RESPONDER_ID 0x1000
233 #define CPER_MEM_VALID_TARGET_ID 0x2000
234 #define CPER_MEM_VALID_ERROR_TYPE 0x4000
236 #define CPER_PCIE_VALID_PORT_TYPE 0x0001
237 #define CPER_PCIE_VALID_VERSION 0x0002
238 #define CPER_PCIE_VALID_COMMAND_STATUS 0x0004
239 #define CPER_PCIE_VALID_DEVICE_ID 0x0008
240 #define CPER_PCIE_VALID_SERIAL_NUMBER 0x0010
241 #define CPER_PCIE_VALID_BRIDGE_CONTROL_STATUS 0x0020
242 #define CPER_PCIE_VALID_CAPABILITY 0x0040
243 #define CPER_PCIE_VALID_AER_INFO 0x0080
245 #define CPER_PCIE_SLOT_SHIFT 3
392 const char *strs[],
unsigned int strs_size);