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arch
mips
cavium-octeon
executive
cvmx-helper-jtag.c
Go to the documentation of this file.
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/***********************license start***************
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* Author: Cavium Networks
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*
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* Contact:
[email protected]
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* This file is part of the OCTEON SDK
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*
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* Copyright (c) 2003-2008 Cavium Networks
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful, but
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* AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
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* NONINFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this file; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* or visit http://www.gnu.org/licenses/.
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*
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* This file may also be available under a different license from Cavium.
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* Contact Cavium Networks for more information
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***********************license end**************************************/
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#include <
asm/octeon/octeon.h
>
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#include <
asm/octeon/cvmx-helper-jtag.h
>
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void
cvmx_helper_qlm_jtag_init
(
void
)
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{
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union
cvmx_ciu_qlm_jtgc
jtgc;
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uint32_t
clock_div = 0;
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uint32_t
divisor
=
cvmx_sysinfo_get
()->cpu_clock_hz / (25 * 1000000);
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divisor = (divisor - 1) >> 2;
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/* Convert the divisor into a power of 2 shift */
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while
(divisor) {
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clock_div++;
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divisor = divisor >> 1;
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}
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/*
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* Clock divider for QLM JTAG operations. eclk is divided by
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* 2^(CLK_DIV + 2)
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*/
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jtgc.
u64
= 0;
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jtgc.
s
.clk_div = clock_div;
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jtgc.
s
.mux_sel = 0;
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if
(
OCTEON_IS_MODEL
(
OCTEON_CN52XX
))
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jtgc.
s
.bypass = 0x3;
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else
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jtgc.
s
.bypass = 0xf;
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cvmx_write_csr(
CVMX_CIU_QLM_JTGC
, jtgc.
u64
);
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cvmx_read_csr(
CVMX_CIU_QLM_JTGC
);
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}
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uint32_t
cvmx_helper_qlm_jtag_shift
(
int
qlm,
int
bits
,
uint32_t
data
)
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{
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union
cvmx_ciu_qlm_jtgd
jtgd;
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jtgd.
u64
= 0;
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jtgd.
s
.shift = 1;
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jtgd.
s
.shft_cnt = bits - 1;
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jtgd.
s
.shft_reg =
data
;
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if
(!
OCTEON_IS_MODEL
(
OCTEON_CN56XX_PASS1_X
))
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jtgd.
s
.select = 1 << qlm;
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cvmx_write_csr(
CVMX_CIU_QLM_JTGD
, jtgd.
u64
);
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do
{
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jtgd.
u64
= cvmx_read_csr(
CVMX_CIU_QLM_JTGD
);
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}
while
(jtgd.
s
.shift);
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return
jtgd.
s
.shft_reg >> (32 -
bits
);
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}
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void
cvmx_helper_qlm_jtag_shift_zeros
(
int
qlm,
int
bits
)
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{
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while
(bits > 0) {
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int
n
=
bits
;
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if
(n > 32)
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n = 32;
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cvmx_helper_qlm_jtag_shift
(qlm, n, 0);
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bits -=
n
;
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}
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}
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void
cvmx_helper_qlm_jtag_update
(
int
qlm)
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{
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union
cvmx_ciu_qlm_jtgd
jtgd;
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/* Update the new data */
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jtgd.
u64
= 0;
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jtgd.
s
.update = 1;
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if
(!
OCTEON_IS_MODEL
(
OCTEON_CN56XX_PASS1_X
))
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jtgd.
s
.select = 1 << qlm;
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cvmx_write_csr(
CVMX_CIU_QLM_JTGD
, jtgd.
u64
);
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do
{
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jtgd.
u64
= cvmx_read_csr(
CVMX_CIU_QLM_JTGD
);
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}
while
(jtgd.
s
.update);
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}
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