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cvmx-l2c.h
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1 /***********************license start***************
2  * Author: Cavium Networks
3  *
4  * Contact: [email protected]
5  * This file is part of the OCTEON SDK
6  *
7  * Copyright (c) 2003-2010 Cavium Networks
8  *
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24  * This file may also be available under a different license from Cavium.
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26  ***********************license end**************************************/
27 
28 /*
29  * Interface to the Level 2 Cache (L2C) control, measurement, and debugging
30  * facilities.
31  */
32 
33 #ifndef __CVMX_L2C_H__
34 #define __CVMX_L2C_H__
35 
36 #define CVMX_L2_ASSOC cvmx_l2c_get_num_assoc() /* Deprecated macro, use function */
37 #define CVMX_L2_SET_BITS cvmx_l2c_get_set_bits() /* Deprecated macro, use function */
38 #define CVMX_L2_SETS cvmx_l2c_get_num_sets() /* Deprecated macro, use function */
39 
40 
41 #define CVMX_L2C_IDX_ADDR_SHIFT 7 /* based on 128 byte cache line size */
42 #define CVMX_L2C_IDX_MASK (cvmx_l2c_get_num_sets() - 1)
43 
44 /* Defines for index aliasing computations */
45 #define CVMX_L2C_TAG_ADDR_ALIAS_SHIFT (CVMX_L2C_IDX_ADDR_SHIFT + cvmx_l2c_get_set_bits())
46 #define CVMX_L2C_ALIAS_MASK (CVMX_L2C_IDX_MASK << CVMX_L2C_TAG_ADDR_ALIAS_SHIFT)
47 #define CVMX_L2C_MEMBANK_SELECT_SIZE 4096
48 
49 /* Defines for Virtualizations, valid only from Octeon II onwards. */
50 #define CVMX_L2C_VRT_MAX_VIRTID_ALLOWED ((OCTEON_IS_MODEL(OCTEON_CN63XX)) ? 64 : 0)
51 #define CVMX_L2C_VRT_MAX_MEMSZ_ALLOWED ((OCTEON_IS_MODEL(OCTEON_CN63XX)) ? 32 : 0)
52 
53 union cvmx_l2c_tag {
54  uint64_t u64;
55  struct {
56  uint64_t reserved:28;
57  uint64_t V:1; /* Line valid */
58  uint64_t D:1; /* Line dirty */
59  uint64_t L:1; /* Line locked */
60  uint64_t U:1; /* Use, LRU eviction */
61  uint64_t addr:32; /* Phys mem (not all bits valid) */
62  } s;
63 };
64 
65 /* Number of L2C Tag-and-data sections (TADs) that are connected to LMC. */
66 #define CVMX_L2C_TADS 1
67 
68  /* L2C Performance Counter events. */
69 enum cvmx_l2c_event {
70  CVMX_L2C_EVENT_CYCLES = 0,
71  CVMX_L2C_EVENT_INSTRUCTION_MISS = 1,
72  CVMX_L2C_EVENT_INSTRUCTION_HIT = 2,
73  CVMX_L2C_EVENT_DATA_MISS = 3,
74  CVMX_L2C_EVENT_DATA_HIT = 4,
75  CVMX_L2C_EVENT_MISS = 5,
76  CVMX_L2C_EVENT_HIT = 6,
77  CVMX_L2C_EVENT_VICTIM_HIT = 7,
78  CVMX_L2C_EVENT_INDEX_CONFLICT = 8,
79  CVMX_L2C_EVENT_TAG_PROBE = 9,
80  CVMX_L2C_EVENT_TAG_UPDATE = 10,
81  CVMX_L2C_EVENT_TAG_COMPLETE = 11,
82  CVMX_L2C_EVENT_TAG_DIRTY = 12,
83  CVMX_L2C_EVENT_DATA_STORE_NOP = 13,
84  CVMX_L2C_EVENT_DATA_STORE_READ = 14,
85  CVMX_L2C_EVENT_DATA_STORE_WRITE = 15,
86  CVMX_L2C_EVENT_FILL_DATA_VALID = 16,
87  CVMX_L2C_EVENT_WRITE_REQUEST = 17,
88  CVMX_L2C_EVENT_READ_REQUEST = 18,
89  CVMX_L2C_EVENT_WRITE_DATA_VALID = 19,
90  CVMX_L2C_EVENT_XMC_NOP = 20,
91  CVMX_L2C_EVENT_XMC_LDT = 21,
92  CVMX_L2C_EVENT_XMC_LDI = 22,
93  CVMX_L2C_EVENT_XMC_LDD = 23,
94  CVMX_L2C_EVENT_XMC_STF = 24,
95  CVMX_L2C_EVENT_XMC_STT = 25,
96  CVMX_L2C_EVENT_XMC_STP = 26,
97  CVMX_L2C_EVENT_XMC_STC = 27,
98  CVMX_L2C_EVENT_XMC_DWB = 28,
99  CVMX_L2C_EVENT_XMC_PL2 = 29,
100  CVMX_L2C_EVENT_XMC_PSL1 = 30,
101  CVMX_L2C_EVENT_XMC_IOBLD = 31,
102  CVMX_L2C_EVENT_XMC_IOBST = 32,
103  CVMX_L2C_EVENT_XMC_IOBDMA = 33,
104  CVMX_L2C_EVENT_XMC_IOBRSP = 34,
105  CVMX_L2C_EVENT_XMC_BUS_VALID = 35,
106  CVMX_L2C_EVENT_XMC_MEM_DATA = 36,
107  CVMX_L2C_EVENT_XMC_REFL_DATA = 37,
108  CVMX_L2C_EVENT_XMC_IOBRSP_DATA = 38,
109  CVMX_L2C_EVENT_RSC_NOP = 39,
110  CVMX_L2C_EVENT_RSC_STDN = 40,
111  CVMX_L2C_EVENT_RSC_FILL = 41,
112  CVMX_L2C_EVENT_RSC_REFL = 42,
113  CVMX_L2C_EVENT_RSC_STIN = 43,
114  CVMX_L2C_EVENT_RSC_SCIN = 44,
115  CVMX_L2C_EVENT_RSC_SCFL = 45,
116  CVMX_L2C_EVENT_RSC_SCDN = 46,
117  CVMX_L2C_EVENT_RSC_DATA_VALID = 47,
118  CVMX_L2C_EVENT_RSC_VALID_FILL = 48,
119  CVMX_L2C_EVENT_RSC_VALID_STRSP = 49,
120  CVMX_L2C_EVENT_RSC_VALID_REFL = 50,
121  CVMX_L2C_EVENT_LRF_REQ = 51,
122  CVMX_L2C_EVENT_DT_RD_ALLOC = 52,
123  CVMX_L2C_EVENT_DT_WR_INVAL = 53,
124  CVMX_L2C_EVENT_MAX
125 };
126 
127 /* L2C Performance Counter events for Octeon2. */
128 enum cvmx_l2c_tad_event {
129  CVMX_L2C_TAD_EVENT_NONE = 0,
130  CVMX_L2C_TAD_EVENT_TAG_HIT = 1,
131  CVMX_L2C_TAD_EVENT_TAG_MISS = 2,
132  CVMX_L2C_TAD_EVENT_TAG_NOALLOC = 3,
133  CVMX_L2C_TAD_EVENT_TAG_VICTIM = 4,
134  CVMX_L2C_TAD_EVENT_SC_FAIL = 5,
135  CVMX_L2C_TAD_EVENT_SC_PASS = 6,
136  CVMX_L2C_TAD_EVENT_LFB_VALID = 7,
137  CVMX_L2C_TAD_EVENT_LFB_WAIT_LFB = 8,
138  CVMX_L2C_TAD_EVENT_LFB_WAIT_VAB = 9,
139  CVMX_L2C_TAD_EVENT_QUAD0_INDEX = 128,
140  CVMX_L2C_TAD_EVENT_QUAD0_READ = 129,
141  CVMX_L2C_TAD_EVENT_QUAD0_BANK = 130,
142  CVMX_L2C_TAD_EVENT_QUAD0_WDAT = 131,
143  CVMX_L2C_TAD_EVENT_QUAD1_INDEX = 144,
144  CVMX_L2C_TAD_EVENT_QUAD1_READ = 145,
145  CVMX_L2C_TAD_EVENT_QUAD1_BANK = 146,
146  CVMX_L2C_TAD_EVENT_QUAD1_WDAT = 147,
147  CVMX_L2C_TAD_EVENT_QUAD2_INDEX = 160,
148  CVMX_L2C_TAD_EVENT_QUAD2_READ = 161,
149  CVMX_L2C_TAD_EVENT_QUAD2_BANK = 162,
150  CVMX_L2C_TAD_EVENT_QUAD2_WDAT = 163,
151  CVMX_L2C_TAD_EVENT_QUAD3_INDEX = 176,
152  CVMX_L2C_TAD_EVENT_QUAD3_READ = 177,
153  CVMX_L2C_TAD_EVENT_QUAD3_BANK = 178,
154  CVMX_L2C_TAD_EVENT_QUAD3_WDAT = 179,
155  CVMX_L2C_TAD_EVENT_MAX
156 };
157 
169 void cvmx_l2c_config_perf(uint32_t counter, enum cvmx_l2c_event event, uint32_t clear_on_read);
170 
179 uint64_t cvmx_l2c_read_perf(uint32_t counter);
180 
190 int cvmx_l2c_get_core_way_partition(uint32_t core);
191 
208 int cvmx_l2c_set_core_way_partition(uint32_t core, uint32_t mask);
209 
217 int cvmx_l2c_get_hw_way_partition(void);
218 
234 int cvmx_l2c_set_hw_way_partition(uint32_t mask);
235 
236 
245 int cvmx_l2c_lock_line(uint64_t addr);
246 
263 int cvmx_l2c_lock_mem_region(uint64_t start, uint64_t len);
264 
277 int cvmx_l2c_unlock_line(uint64_t address);
278 
287 int cvmx_l2c_unlock_mem_region(uint64_t start, uint64_t len);
288 
298 union cvmx_l2c_tag cvmx_l2c_get_tag(uint32_t association, uint32_t index);
299 
300 /* Wrapper providing a deprecated old function name */
301 static inline union cvmx_l2c_tag cvmx_get_l2c_tag(uint32_t association, uint32_t index) __attribute__((deprecated));
302 static inline union cvmx_l2c_tag cvmx_get_l2c_tag(uint32_t association, uint32_t index)
303 {
304  return cvmx_l2c_get_tag(association, index);
305 }
306 
307 
315 uint32_t cvmx_l2c_address_to_index(uint64_t addr);
316 
322 void cvmx_l2c_flush(void);
323 
329 int cvmx_l2c_get_cache_size_bytes(void);
330 
336 int cvmx_l2c_get_num_sets(void);
337 
342 int cvmx_l2c_get_set_bits(void);
348 int cvmx_l2c_get_num_assoc(void);
349 
358 void cvmx_l2c_flush_line(uint32_t assoc, uint32_t index);
359 
360 #endif /* __CVMX_L2C_H__ */
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