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16 #ifndef __ASM_DEBUG_MONITORS_H
17 #define __ASM_DEBUG_MONITORS_H
21 #define DBG_ESR_EVT(x) (((x) >> 27) & 0x7)
24 #define DBG_ESR_EVT_HWBP 0x0
25 #define DBG_ESR_EVT_HWSS 0x1
26 #define DBG_ESR_EVT_HWWP 0x2
27 #define DBG_ESR_EVT_BRK 0x6
35 #define DBG_ESR_EVT_BKPT 0x4
36 #define DBG_ESR_EVT_VECC 0x5
38 #define AARCH32_BREAK_ARM 0x07f001f0
39 #define AARCH32_BREAK_THUMB 0xde01
40 #define AARCH32_BREAK_THUMB2_LO 0xf7f0
41 #define AARCH32_BREAK_THUMB2_HI 0xa000
46 #define local_dbg_save(flags) \
48 typecheck(unsigned long, flags); \
50 "mrs %0, daif // local_dbg_save\n" \
52 : "=r" (flags) : : "memory"); \
55 #define local_dbg_restore(flags) \
57 typecheck(unsigned long, flags); \
59 "msr daif, %0 // local_dbg_restore\n" \
60 : : "r" (flags) : "memory"); \
63 #define DBG_ARCH_ID_RESERVED 0
77 #ifdef CONFIG_HAVE_HW_BREAKPOINT