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82 unsigned int etv : 32;
146 " .insn s,0xb2160000,%1\n"
150 :
"+d" (
rc) :
"Q" (*ctrl));
155 static inline int etr_stetr(
struct etr_aib *aib)
160 " .insn s,0xb2170000,%1\n"
164 :
"+d" (rc) :
"Q" (*aib));
169 static inline int etr_steai(
struct etr_aib *aib,
unsigned int func)
171 register unsigned int reg0 asm(
"0") = func;
175 " .insn s,0xb2b30000,%1\n"
179 :
"+d" (rc) :
"Q" (*aib),
"d" (
reg0));
184 #define ETR_STEAI_STEPPING_PORT 0x10
185 #define ETR_STEAI_ALTERNATE_PORT 0x11
186 #define ETR_STEAI_PORT_0 0x12
187 #define ETR_STEAI_PORT_1 0x13
189 static inline int etr_ptff(
void *ptff_block,
unsigned int func)
191 register unsigned int reg0 asm(
"0") = func;
192 register unsigned long reg1 asm(
"1") = (
unsigned long) ptff_block;
199 :
"=d" (
rc),
"=m" (ptff_block)
200 :
"d" (
reg0),
"d" (
reg1),
"m" (ptff_block) :
"cc");
205 #define ETR_PTFF_QAF 0x00
206 #define ETR_PTFF_QTO 0x01
207 #define ETR_PTFF_QSI 0x02
208 #define ETR_PTFF_ATO 0x40
209 #define ETR_PTFF_STO 0x41
210 #define ETR_PTFF_SFS 0x42
211 #define ETR_PTFF_SGS 0x43
226 #define STP_OP_SYNC 1
227 #define STP_OP_CTRL 3