Linux Kernel  3.7.1
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gpio7xx.c
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1 /*
2  * OMAP7xx specific gpio init
3  *
4  * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  * Author:
7  * Charulatha V <[email protected]>
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation version 2.
12  *
13  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14  * kind, whether express or implied; without even the implied warranty
15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  */
18 
19 #include <linux/gpio.h>
21 
22 #define OMAP7XX_GPIO1_BASE 0xfffbc000
23 #define OMAP7XX_GPIO2_BASE 0xfffbc800
24 #define OMAP7XX_GPIO3_BASE 0xfffbd000
25 #define OMAP7XX_GPIO4_BASE 0xfffbd800
26 #define OMAP7XX_GPIO5_BASE 0xfffbe000
27 #define OMAP7XX_GPIO6_BASE 0xfffbe800
28 #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
29 
30 /* mpu gpio */
31 static struct __initdata resource omap7xx_mpu_gpio_resources[] = {
32  {
33  .start = OMAP1_MPUIO_VBASE,
34  .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
35  .flags = IORESOURCE_MEM,
36  },
37  {
38  .start = INT_7XX_MPUIO,
39  .flags = IORESOURCE_IRQ,
40  },
41 };
42 
43 static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
44  .revision = USHRT_MAX,
45  .direction = OMAP_MPUIO_IO_CNTL / 2,
46  .datain = OMAP_MPUIO_INPUT_LATCH / 2,
47  .dataout = OMAP_MPUIO_OUTPUT / 2,
48  .irqstatus = OMAP_MPUIO_GPIO_INT / 2,
49  .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
50  .irqenable_inv = true,
51  .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE >> 1,
52 };
53 
54 static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
55  .is_mpuio = true,
56  .bank_width = 16,
57  .bank_stride = 2,
58  .regs = &omap7xx_mpuio_regs,
59 };
60 
61 static struct platform_device omap7xx_mpu_gpio = {
62  .name = "omap_gpio",
63  .id = 0,
64  .dev = {
65  .platform_data = &omap7xx_mpu_gpio_config,
66  },
67  .num_resources = ARRAY_SIZE(omap7xx_mpu_gpio_resources),
68  .resource = omap7xx_mpu_gpio_resources,
69 };
70 
71 /* gpio1 */
72 static struct __initdata resource omap7xx_gpio1_resources[] = {
73  {
74  .start = OMAP7XX_GPIO1_BASE,
75  .end = OMAP7XX_GPIO1_BASE + SZ_2K - 1,
76  .flags = IORESOURCE_MEM,
77  },
78  {
79  .start = INT_7XX_GPIO_BANK1,
80  .flags = IORESOURCE_IRQ,
81  },
82 };
83 
84 static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
85  .revision = USHRT_MAX,
86  .direction = OMAP7XX_GPIO_DIR_CONTROL,
87  .datain = OMAP7XX_GPIO_DATA_INPUT,
88  .dataout = OMAP7XX_GPIO_DATA_OUTPUT,
89  .irqstatus = OMAP7XX_GPIO_INT_STATUS,
90  .irqenable = OMAP7XX_GPIO_INT_MASK,
91  .irqenable_inv = true,
92  .irqctrl = OMAP7XX_GPIO_INT_CONTROL,
93 };
94 
95 static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
96  .bank_width = 32,
97  .regs = &omap7xx_gpio_regs,
98 };
99 
100 static struct platform_device omap7xx_gpio1 = {
101  .name = "omap_gpio",
102  .id = 1,
103  .dev = {
104  .platform_data = &omap7xx_gpio1_config,
105  },
106  .num_resources = ARRAY_SIZE(omap7xx_gpio1_resources),
107  .resource = omap7xx_gpio1_resources,
108 };
109 
110 /* gpio2 */
111 static struct __initdata resource omap7xx_gpio2_resources[] = {
112  {
113  .start = OMAP7XX_GPIO2_BASE,
114  .end = OMAP7XX_GPIO2_BASE + SZ_2K - 1,
115  .flags = IORESOURCE_MEM,
116  },
117  {
118  .start = INT_7XX_GPIO_BANK2,
119  .flags = IORESOURCE_IRQ,
120  },
121 };
122 
123 static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = {
124  .bank_width = 32,
125  .regs = &omap7xx_gpio_regs,
126 };
127 
128 static struct platform_device omap7xx_gpio2 = {
129  .name = "omap_gpio",
130  .id = 2,
131  .dev = {
132  .platform_data = &omap7xx_gpio2_config,
133  },
134  .num_resources = ARRAY_SIZE(omap7xx_gpio2_resources),
135  .resource = omap7xx_gpio2_resources,
136 };
137 
138 /* gpio3 */
139 static struct __initdata resource omap7xx_gpio3_resources[] = {
140  {
141  .start = OMAP7XX_GPIO3_BASE,
142  .end = OMAP7XX_GPIO3_BASE + SZ_2K - 1,
143  .flags = IORESOURCE_MEM,
144  },
145  {
146  .start = INT_7XX_GPIO_BANK3,
147  .flags = IORESOURCE_IRQ,
148  },
149 };
150 
151 static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = {
152  .bank_width = 32,
153  .regs = &omap7xx_gpio_regs,
154 };
155 
156 static struct platform_device omap7xx_gpio3 = {
157  .name = "omap_gpio",
158  .id = 3,
159  .dev = {
160  .platform_data = &omap7xx_gpio3_config,
161  },
162  .num_resources = ARRAY_SIZE(omap7xx_gpio3_resources),
163  .resource = omap7xx_gpio3_resources,
164 };
165 
166 /* gpio4 */
167 static struct __initdata resource omap7xx_gpio4_resources[] = {
168  {
169  .start = OMAP7XX_GPIO4_BASE,
170  .end = OMAP7XX_GPIO4_BASE + SZ_2K - 1,
171  .flags = IORESOURCE_MEM,
172  },
173  {
174  .start = INT_7XX_GPIO_BANK4,
175  .flags = IORESOURCE_IRQ,
176  },
177 };
178 
179 static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = {
180  .bank_width = 32,
181  .regs = &omap7xx_gpio_regs,
182 };
183 
184 static struct platform_device omap7xx_gpio4 = {
185  .name = "omap_gpio",
186  .id = 4,
187  .dev = {
188  .platform_data = &omap7xx_gpio4_config,
189  },
190  .num_resources = ARRAY_SIZE(omap7xx_gpio4_resources),
191  .resource = omap7xx_gpio4_resources,
192 };
193 
194 /* gpio5 */
195 static struct __initdata resource omap7xx_gpio5_resources[] = {
196  {
197  .start = OMAP7XX_GPIO5_BASE,
198  .end = OMAP7XX_GPIO5_BASE + SZ_2K - 1,
199  .flags = IORESOURCE_MEM,
200  },
201  {
202  .start = INT_7XX_GPIO_BANK5,
203  .flags = IORESOURCE_IRQ,
204  },
205 };
206 
207 static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = {
208  .bank_width = 32,
209  .regs = &omap7xx_gpio_regs,
210 };
211 
212 static struct platform_device omap7xx_gpio5 = {
213  .name = "omap_gpio",
214  .id = 5,
215  .dev = {
216  .platform_data = &omap7xx_gpio5_config,
217  },
218  .num_resources = ARRAY_SIZE(omap7xx_gpio5_resources),
219  .resource = omap7xx_gpio5_resources,
220 };
221 
222 /* gpio6 */
223 static struct __initdata resource omap7xx_gpio6_resources[] = {
224  {
225  .start = OMAP7XX_GPIO6_BASE,
226  .end = OMAP7XX_GPIO6_BASE + SZ_2K - 1,
227  .flags = IORESOURCE_MEM,
228  },
229  {
230  .start = INT_7XX_GPIO_BANK6,
231  .flags = IORESOURCE_IRQ,
232  },
233 };
234 
235 static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = {
236  .bank_width = 32,
237  .regs = &omap7xx_gpio_regs,
238 };
239 
240 static struct platform_device omap7xx_gpio6 = {
241  .name = "omap_gpio",
242  .id = 6,
243  .dev = {
244  .platform_data = &omap7xx_gpio6_config,
245  },
246  .num_resources = ARRAY_SIZE(omap7xx_gpio6_resources),
247  .resource = omap7xx_gpio6_resources,
248 };
249 
250 static struct __initdata platform_device * omap7xx_gpio_dev[] = {
251  &omap7xx_mpu_gpio,
252  &omap7xx_gpio1,
253  &omap7xx_gpio2,
254  &omap7xx_gpio3,
255  &omap7xx_gpio4,
256  &omap7xx_gpio5,
257  &omap7xx_gpio6,
258 };
259 
260 /*
261  * omap7xx_gpio_init needs to be done before
262  * machine_init functions access gpio APIs.
263  * Hence omap7xx_gpio_init is a postcore_initcall.
264  */
265 static int __init omap7xx_gpio_init(void)
266 {
267  int i;
268 
269  if (!cpu_is_omap7xx())
270  return -EINVAL;
271 
272  for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++)
273  platform_device_register(omap7xx_gpio_dev[i]);
274 
275  return 0;
276 }
277 postcore_initcall(omap7xx_gpio_init);