Go to the documentation of this file.
15 #ifndef __SND_SOC_SAMSUNG_I2S_REGS_H
16 #define __SND_SOC_SAMSUNG_I2S_REGS_H
29 #define I2STRNCNT 0x2c
30 #define I2SLVL0ADDR 0x30
31 #define I2SLVL1ADDR 0x34
32 #define I2SLVL2ADDR 0x38
33 #define I2SLVL3ADDR 0x3c
35 #define CON_RSTCLR (1 << 31)
36 #define CON_FRXOFSTATUS (1 << 26)
37 #define CON_FRXORINTEN (1 << 25)
38 #define CON_FTXSURSTAT (1 << 24)
39 #define CON_FTXSURINTEN (1 << 23)
40 #define CON_TXSDMA_PAUSE (1 << 20)
41 #define CON_TXSDMA_ACTIVE (1 << 18)
43 #define CON_FTXURSTATUS (1 << 17)
44 #define CON_FTXURINTEN (1 << 16)
45 #define CON_TXFIFO2_EMPTY (1 << 15)
46 #define CON_TXFIFO1_EMPTY (1 << 14)
47 #define CON_TXFIFO2_FULL (1 << 13)
48 #define CON_TXFIFO1_FULL (1 << 12)
50 #define CON_LRINDEX (1 << 11)
51 #define CON_TXFIFO_EMPTY (1 << 10)
52 #define CON_RXFIFO_EMPTY (1 << 9)
53 #define CON_TXFIFO_FULL (1 << 8)
54 #define CON_RXFIFO_FULL (1 << 7)
55 #define CON_TXDMA_PAUSE (1 << 6)
56 #define CON_RXDMA_PAUSE (1 << 5)
57 #define CON_TXCH_PAUSE (1 << 4)
58 #define CON_RXCH_PAUSE (1 << 3)
59 #define CON_TXDMA_ACTIVE (1 << 2)
60 #define CON_RXDMA_ACTIVE (1 << 1)
61 #define CON_ACTIVE (1 << 0)
63 #define MOD_OPCLK_CDCLK_OUT (0 << 30)
64 #define MOD_OPCLK_CDCLK_IN (1 << 30)
65 #define MOD_OPCLK_BCLK_OUT (2 << 30)
66 #define MOD_OPCLK_PCLK (3 << 30)
67 #define MOD_OPCLK_MASK (3 << 30)
68 #define MOD_TXS_IDMA (1 << 28)
70 #define MOD_BLCS_SHIFT 26
71 #define MOD_BLCS_16BIT (0 << MOD_BLCS_SHIFT)
72 #define MOD_BLCS_8BIT (1 << MOD_BLCS_SHIFT)
73 #define MOD_BLCS_24BIT (2 << MOD_BLCS_SHIFT)
74 #define MOD_BLCS_MASK (3 << MOD_BLCS_SHIFT)
75 #define MOD_BLCP_SHIFT 24
76 #define MOD_BLCP_16BIT (0 << MOD_BLCP_SHIFT)
77 #define MOD_BLCP_8BIT (1 << MOD_BLCP_SHIFT)
78 #define MOD_BLCP_24BIT (2 << MOD_BLCP_SHIFT)
79 #define MOD_BLCP_MASK (3 << MOD_BLCP_SHIFT)
81 #define MOD_C2DD_HHALF (1 << 21)
82 #define MOD_C2DD_LHALF (1 << 20)
83 #define MOD_C1DD_HHALF (1 << 19)
84 #define MOD_C1DD_LHALF (1 << 18)
85 #define MOD_DC2_EN (1 << 17)
86 #define MOD_DC1_EN (1 << 16)
87 #define MOD_BLC_16BIT (0 << 13)
88 #define MOD_BLC_8BIT (1 << 13)
89 #define MOD_BLC_24BIT (2 << 13)
90 #define MOD_BLC_MASK (3 << 13)
92 #define MOD_IMS_SYSMUX (1 << 10)
93 #define MOD_SLAVE (1 << 11)
94 #define MOD_TXONLY (0 << 8)
95 #define MOD_RXONLY (1 << 8)
96 #define MOD_TXRX (2 << 8)
97 #define MOD_MASK (3 << 8)
98 #define MOD_LR_LLOW (0 << 7)
99 #define MOD_LR_RLOW (1 << 7)
100 #define MOD_SDF_IIS (0 << 5)
101 #define MOD_SDF_MSB (1 << 5)
102 #define MOD_SDF_LSB (2 << 5)
103 #define MOD_SDF_MASK (3 << 5)
104 #define MOD_RCLK_256FS (0 << 3)
105 #define MOD_RCLK_512FS (1 << 3)
106 #define MOD_RCLK_384FS (2 << 3)
107 #define MOD_RCLK_768FS (3 << 3)
108 #define MOD_RCLK_MASK (3 << 3)
109 #define MOD_BCLK_32FS (0 << 1)
110 #define MOD_BCLK_48FS (1 << 1)
111 #define MOD_BCLK_16FS (2 << 1)
112 #define MOD_BCLK_24FS (3 << 1)
113 #define MOD_BCLK_MASK (3 << 1)
114 #define MOD_8BIT (1 << 0)
116 #define MOD_CDCLKCON (1 << 12)
118 #define PSR_PSREN (1 << 15)
120 #define FIC_TX2COUNT(x) (((x) >> 24) & 0xf)
121 #define FIC_TX1COUNT(x) (((x) >> 16) & 0xf)
123 #define FIC_TXFLUSH (1 << 15)
124 #define FIC_RXFLUSH (1 << 7)
126 #define FIC_TXCOUNT(x) (((x) >> 8) & 0xf)
127 #define FIC_RXCOUNT(x) (((x) >> 0) & 0xf)
128 #define FICS_TXCOUNT(x) (((x) >> 8) & 0x7f)
130 #define AHB_INTENLVL0 (1 << 24)
131 #define AHB_LVL0INT (1 << 20)
132 #define AHB_CLRLVL0INT (1 << 16)
133 #define AHB_DMARLD (1 << 5)
134 #define AHB_INTMASK (1 << 3)
135 #define AHB_DMAEN (1 << 0)
136 #define AHB_LVLINTMASK (0xf << 20)
138 #define I2SSIZE_TRNMSK (0xffff)
139 #define I2SSIZE_SHIFT (16)