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reg.h
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1 /*
2  * Register declarations for DA9052 PMICs.
3  *
4  * Copyright(c) 2011 Dialog Semiconductor Ltd.
5  *
6  * Author: David Dajun Chen <[email protected]>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  *
22  */
23 
24 #ifndef __LINUX_MFD_DA9052_REG_H
25 #define __LINUX_MFD_DA9052_REG_H
26 
27 /* PAGE REGISTERS */
28 #define DA9052_PAGE0_CON_REG 0
29 #define DA9052_PAGE1_CON_REG 128
30 
31 /* STATUS REGISTERS */
32 #define DA9052_STATUS_A_REG 1
33 #define DA9052_STATUS_B_REG 2
34 #define DA9052_STATUS_C_REG 3
35 #define DA9052_STATUS_D_REG 4
36 
37 /* EVENT REGISTERS */
38 #define DA9052_EVENT_A_REG 5
39 #define DA9052_EVENT_B_REG 6
40 #define DA9052_EVENT_C_REG 7
41 #define DA9052_EVENT_D_REG 8
42 #define DA9052_FAULTLOG_REG 9
43 
44 /* IRQ REGISTERS */
45 #define DA9052_IRQ_MASK_A_REG 10
46 #define DA9052_IRQ_MASK_B_REG 11
47 #define DA9052_IRQ_MASK_C_REG 12
48 #define DA9052_IRQ_MASK_D_REG 13
49 
50 /* CONTROL REGISTERS */
51 #define DA9052_CONTROL_A_REG 14
52 #define DA9052_CONTROL_B_REG 15
53 #define DA9052_CONTROL_C_REG 16
54 #define DA9052_CONTROL_D_REG 17
55 
56 #define DA9052_PDDIS_REG 18
57 #define DA9052_INTERFACE_REG 19
58 #define DA9052_RESET_REG 20
59 
60 /* GPIO REGISTERS */
61 #define DA9052_GPIO_0_1_REG 21
62 #define DA9052_GPIO_2_3_REG 22
63 #define DA9052_GPIO_4_5_REG 23
64 #define DA9052_GPIO_6_7_REG 24
65 #define DA9052_GPIO_14_15_REG 28
66 
67 /* POWER SEQUENCER CONTROL REGISTERS */
68 #define DA9052_ID_0_1_REG 29
69 #define DA9052_ID_2_3_REG 30
70 #define DA9052_ID_4_5_REG 31
71 #define DA9052_ID_6_7_REG 32
72 #define DA9052_ID_8_9_REG 33
73 #define DA9052_ID_10_11_REG 34
74 #define DA9052_ID_12_13_REG 35
75 #define DA9052_ID_14_15_REG 36
76 #define DA9052_ID_16_17_REG 37
77 #define DA9052_ID_18_19_REG 38
78 #define DA9052_ID_20_21_REG 39
79 #define DA9052_SEQ_STATUS_REG 40
80 #define DA9052_SEQ_A_REG 41
81 #define DA9052_SEQ_B_REG 42
82 #define DA9052_SEQ_TIMER_REG 43
83 
84 /* LDO AND BUCK REGISTERS */
85 #define DA9052_BUCKA_REG 44
86 #define DA9052_BUCKB_REG 45
87 #define DA9052_BUCKCORE_REG 46
88 #define DA9052_BUCKPRO_REG 47
89 #define DA9052_BUCKMEM_REG 48
90 #define DA9052_BUCKPERI_REG 49
91 #define DA9052_LDO1_REG 50
92 #define DA9052_LDO2_REG 51
93 #define DA9052_LDO3_REG 52
94 #define DA9052_LDO4_REG 53
95 #define DA9052_LDO5_REG 54
96 #define DA9052_LDO6_REG 55
97 #define DA9052_LDO7_REG 56
98 #define DA9052_LDO8_REG 57
99 #define DA9052_LDO9_REG 58
100 #define DA9052_LDO10_REG 59
101 #define DA9052_SUPPLY_REG 60
102 #define DA9052_PULLDOWN_REG 61
103 #define DA9052_CHGBUCK_REG 62
104 #define DA9052_WAITCONT_REG 63
105 #define DA9052_ISET_REG 64
106 #define DA9052_BATCHG_REG 65
107 
108 /* BATTERY CONTROL REGISTRS */
109 #define DA9052_CHG_CONT_REG 66
110 #define DA9052_INPUT_CONT_REG 67
111 #define DA9052_CHG_TIME_REG 68
112 #define DA9052_BBAT_CONT_REG 69
113 
114 /* LED CONTROL REGISTERS */
115 #define DA9052_BOOST_REG 70
116 #define DA9052_LED_CONT_REG 71
117 #define DA9052_LEDMIN123_REG 72
118 #define DA9052_LED1_CONF_REG 73
119 #define DA9052_LED2_CONF_REG 74
120 #define DA9052_LED3_CONF_REG 75
121 #define DA9052_LED1CONT_REG 76
122 #define DA9052_LED2CONT_REG 77
123 #define DA9052_LED3CONT_REG 78
124 #define DA9052_LED_CONT_4_REG 79
125 #define DA9052_LED_CONT_5_REG 80
126 
127 /* ADC CONTROL REGISTERS */
128 #define DA9052_ADC_MAN_REG 81
129 #define DA9052_ADC_CONT_REG 82
130 #define DA9052_ADC_RES_L_REG 83
131 #define DA9052_ADC_RES_H_REG 84
132 #define DA9052_VDD_RES_REG 85
133 #define DA9052_VDD_MON_REG 86
134 
135 #define DA9052_ICHG_AV_REG 87
136 #define DA9052_ICHG_THD_REG 88
137 #define DA9052_ICHG_END_REG 89
138 #define DA9052_TBAT_RES_REG 90
139 #define DA9052_TBAT_HIGHP_REG 91
140 #define DA9052_TBAT_HIGHN_REG 92
141 #define DA9052_TBAT_LOW_REG 93
142 #define DA9052_T_OFFSET_REG 94
143 
144 #define DA9052_ADCIN4_RES_REG 95
145 #define DA9052_AUTO4_HIGH_REG 96
146 #define DA9052_AUTO4_LOW_REG 97
147 #define DA9052_ADCIN5_RES_REG 98
148 #define DA9052_AUTO5_HIGH_REG 99
149 #define DA9052_AUTO5_LOW_REG 100
150 #define DA9052_ADCIN6_RES_REG 101
151 #define DA9052_AUTO6_HIGH_REG 102
152 #define DA9052_AUTO6_LOW_REG 103
153 
154 #define DA9052_TJUNC_RES_REG 104
155 
156 /* TSI CONTROL REGISTERS */
157 #define DA9052_TSI_CONT_A_REG 105
158 #define DA9052_TSI_CONT_B_REG 106
159 #define DA9052_TSI_X_MSB_REG 107
160 #define DA9052_TSI_Y_MSB_REG 108
161 #define DA9052_TSI_LSB_REG 109
162 #define DA9052_TSI_Z_MSB_REG 110
163 
164 /* RTC COUNT REGISTERS */
165 #define DA9052_COUNT_S_REG 111
166 #define DA9052_COUNT_MI_REG 112
167 #define DA9052_COUNT_H_REG 113
168 #define DA9052_COUNT_D_REG 114
169 #define DA9052_COUNT_MO_REG 115
170 #define DA9052_COUNT_Y_REG 116
171 
172 /* RTC CONTROL REGISTERS */
173 #define DA9052_ALARM_MI_REG 117
174 #define DA9052_ALARM_H_REG 118
175 #define DA9052_ALARM_D_REG 119
176 #define DA9052_ALARM_MO_REG 120
177 #define DA9052_ALARM_Y_REG 121
178 #define DA9052_SECOND_A_REG 122
179 #define DA9052_SECOND_B_REG 123
180 #define DA9052_SECOND_C_REG 124
181 #define DA9052_SECOND_D_REG 125
182 
183 /* PAGE CONFIGURATION BIT */
184 #define DA9052_PAGE_CONF 0X80
185 
186 /* STATUS REGISTER A BITS */
187 #define DA9052_STATUSA_VDATDET 0X80
188 #define DA9052_STATUSA_VBUSSEL 0X40
189 #define DA9052_STATUSA_DCINSEL 0X20
190 #define DA9052_STATUSA_VBUSDET 0X10
191 #define DA9052_STATUSA_DCINDET 0X08
192 #define DA9052_STATUSA_IDGND 0X04
193 #define DA9052_STATUSA_IDFLOAT 0X02
194 #define DA9052_STATUSA_NONKEY 0X01
195 
196 /* STATUS REGISTER B BITS */
197 #define DA9052_STATUSB_COMPDET 0X80
198 #define DA9052_STATUSB_SEQUENCING 0X40
199 #define DA9052_STATUSB_GPFB2 0X20
200 #define DA9052_STATUSB_CHGTO 0X10
201 #define DA9052_STATUSB_CHGEND 0X08
202 #define DA9052_STATUSB_CHGLIM 0X04
203 #define DA9052_STATUSB_CHGPRE 0X02
204 #define DA9052_STATUSB_CHGATT 0X01
205 
206 /* STATUS REGISTER C BITS */
207 #define DA9052_STATUSC_GPI7 0X80
208 #define DA9052_STATUSC_GPI6 0X40
209 #define DA9052_STATUSC_GPI5 0X20
210 #define DA9052_STATUSC_GPI4 0X10
211 #define DA9052_STATUSC_GPI3 0X08
212 #define DA9052_STATUSC_GPI2 0X04
213 #define DA9052_STATUSC_GPI1 0X02
214 #define DA9052_STATUSC_GPI0 0X01
215 
216 /* STATUS REGISTER D BITS */
217 #define DA9052_STATUSD_GPI15 0X80
218 #define DA9052_STATUSD_GPI14 0X40
219 #define DA9052_STATUSD_GPI13 0X20
220 #define DA9052_STATUSD_GPI12 0X10
221 #define DA9052_STATUSD_GPI11 0X08
222 #define DA9052_STATUSD_GPI10 0X04
223 #define DA9052_STATUSD_GPI9 0X02
224 #define DA9052_STATUSD_GPI8 0X01
225 
226 /* EVENT REGISTER A BITS */
227 #define DA9052_EVENTA_ECOMP1V2 0X80
228 #define DA9052_EVENTA_ESEQRDY 0X40
229 #define DA9052_EVENTA_EALRAM 0X20
230 #define DA9052_EVENTA_EVDDLOW 0X10
231 #define DA9052_EVENTA_EVBUSREM 0X08
232 #define DA9052_EVENTA_EDCINREM 0X04
233 #define DA9052_EVENTA_EVBUSDET 0X02
234 #define DA9052_EVENTA_EDCINDET 0X01
235 
236 /* EVENT REGISTER B BITS */
237 #define DA9052_EVENTB_ETSIREADY 0X80
238 #define DA9052_EVENTB_EPENDOWN 0X40
239 #define DA9052_EVENTB_EADCEOM 0X20
240 #define DA9052_EVENTB_ETBAT 0X10
241 #define DA9052_EVENTB_ECHGEND 0X08
242 #define DA9052_EVENTB_EIDGND 0X04
243 #define DA9052_EVENTB_EIDFLOAT 0X02
244 #define DA9052_EVENTB_ENONKEY 0X01
245 
246 /* EVENT REGISTER C BITS */
247 #define DA9052_EVENTC_EGPI7 0X80
248 #define DA9052_EVENTC_EGPI6 0X40
249 #define DA9052_EVENTC_EGPI5 0X20
250 #define DA9052_EVENTC_EGPI4 0X10
251 #define DA9052_EVENTC_EGPI3 0X08
252 #define DA9052_EVENTC_EGPI2 0X04
253 #define DA9052_EVENTC_EGPI1 0X02
254 #define DA9052_EVENTC_EGPI0 0X01
255 
256 /* EVENT REGISTER D BITS */
257 #define DA9052_EVENTD_EGPI15 0X80
258 #define DA9052_EVENTD_EGPI14 0X40
259 #define DA9052_EVENTD_EGPI13 0X20
260 #define DA9052_EVENTD_EGPI12 0X10
261 #define DA9052_EVENTD_EGPI11 0X08
262 #define DA9052_EVENTD_EGPI10 0X04
263 #define DA9052_EVENTD_EGPI9 0X02
264 #define DA9052_EVENTD_EGPI8 0X01
265 
266 /* IRQ MASK REGISTERS BITS */
267 #define DA9052_M_NONKEY 0X0100
268 
269 /* TSI EVENT REGISTERS BITS */
270 #define DA9052_E_PEN_DOWN 0X4000
271 #define DA9052_E_TSI_READY 0X8000
272 
273 /* FAULT LOG REGISTER BITS */
274 #define DA9052_FAULTLOG_WAITSET 0X80
275 #define DA9052_FAULTLOG_NSDSET 0X40
276 #define DA9052_FAULTLOG_KEYSHUT 0X20
277 #define DA9052_FAULTLOG_TEMPOVER 0X08
278 #define DA9052_FAULTLOG_VDDSTART 0X04
279 #define DA9052_FAULTLOG_VDDFAULT 0X02
280 #define DA9052_FAULTLOG_TWDERROR 0X01
281 
282 /* CONTROL REGISTER A BITS */
283 #define DA9052_CONTROLA_GPIV 0X80
284 #define DA9052_CONTROLA_PMOTYPE 0X20
285 #define DA9052_CONTROLA_PMOV 0X10
286 #define DA9052_CONTROLA_PMIV 0X08
287 #define DA9052_CONTROLA_PMIFV 0X08
288 #define DA9052_CONTROLA_PWR1EN 0X04
289 #define DA9052_CONTROLA_PWREN 0X02
290 #define DA9052_CONTROLA_SYSEN 0X01
291 
292 /* CONTROL REGISTER B BITS */
293 #define DA9052_CONTROLB_SHUTDOWN 0X80
294 #define DA9052_CONTROLB_DEEPSLEEP 0X40
295 #define DA9052_CONTROL_B_WRITEMODE 0X20
296 #define DA9052_CONTROLB_BBATEN 0X10
297 #define DA9052_CONTROLB_OTPREADEN 0X08
298 #define DA9052_CONTROLB_AUTOBOOT 0X04
299 #define DA9052_CONTROLB_ACTDIODE 0X02
300 #define DA9052_CONTROLB_BUCKMERGE 0X01
301 
302 /* CONTROL REGISTER C BITS */
303 #define DA9052_CONTROLC_BLINKDUR 0X80
304 #define DA9052_CONTROLC_BLINKFRQ 0X60
305 #define DA9052_CONTROLC_DEBOUNCING 0X1C
306 #define DA9052_CONTROLC_PMFB2PIN 0X02
307 #define DA9052_CONTROLC_PMFB1PIN 0X01
308 
309 /* CONTROL REGISTER D BITS */
310 #define DA9052_CONTROLD_WATCHDOG 0X80
311 #define DA9052_CONTROLD_ACCDETEN 0X40
312 #define DA9052_CONTROLD_GPI1415SD 0X20
313 #define DA9052_CONTROLD_NONKEYSD 0X10
314 #define DA9052_CONTROLD_KEEPACTEN 0X08
315 #define DA9052_CONTROLD_TWDSCALE 0X07
316 
317 /* POWER DOWN DISABLE REGISTER BITS */
318 #define DA9052_PDDIS_PMCONTPD 0X80
319 #define DA9052_PDDIS_OUT32KPD 0X40
320 #define DA9052_PDDIS_CHGBBATPD 0X20
321 #define DA9052_PDDIS_CHGPD 0X10
322 #define DA9052_PDDIS_HS2WIREPD 0X08
323 #define DA9052_PDDIS_PMIFPD 0X04
324 #define DA9052_PDDIS_GPADCPD 0X02
325 #define DA9052_PDDIS_GPIOPD 0X01
326 
327 /* CONTROL REGISTER D BITS */
328 #define DA9052_INTERFACE_IFBASEADDR 0XE0
329 #define DA9052_INTERFACE_NCSPOL 0X10
330 #define DA9052_INTERFACE_RWPOL 0X08
331 #define DA9052_INTERFACE_CPHA 0X04
332 #define DA9052_INTERFACE_CPOL 0X02
333 #define DA9052_INTERFACE_IFTYPE 0X01
334 
335 /* CONTROL REGISTER D BITS */
336 #define DA9052_RESET_RESETEVENT 0XC0
337 #define DA9052_RESET_RESETTIMER 0X3F
338 
339 /* GPIO REGISTERS */
340 /* GPIO CONTROL REGISTER BITS */
341 #define DA9052_GPIO_EVEN_PORT_PIN 0X03
342 #define DA9052_GPIO_EVEN_PORT_TYPE 0X04
343 #define DA9052_GPIO_EVEN_PORT_MODE 0X08
344 
345 #define DA9052_GPIO_ODD_PORT_PIN 0X30
346 #define DA9052_GPIO_ODD_PORT_TYPE 0X40
347 #define DA9052_GPIO_ODD_PORT_MODE 0X80
348 
349 /*POWER SEQUENCER REGISTER BITS */
350 /* SEQ CONTROL REGISTER BITS FOR ID 0 AND 1 */
351 #define DA9052_ID01_LDO1STEP 0XF0
352 #define DA9052_ID01_SYSPRE 0X04
353 #define DA9052_ID01_DEFSUPPLY 0X02
354 #define DA9052_ID01_NRESMODE 0X01
355 
356 /* SEQ CONTROL REGISTER BITS FOR ID 2 AND 3 */
357 #define DA9052_ID23_LDO3STEP 0XF0
358 #define DA9052_ID23_LDO2STEP 0X0F
359 
360 /* SEQ CONTROL REGISTER BITS FOR ID 4 AND 5 */
361 #define DA9052_ID45_LDO5STEP 0XF0
362 #define DA9052_ID45_LDO4STEP 0X0F
363 
364 /* SEQ CONTROL REGISTER BITS FOR ID 6 AND 7 */
365 #define DA9052_ID67_LDO7STEP 0XF0
366 #define DA9052_ID67_LDO6STEP 0X0F
367 
368 /* SEQ CONTROL REGISTER BITS FOR ID 8 AND 9 */
369 #define DA9052_ID89_LDO9STEP 0XF0
370 #define DA9052_ID89_LDO8STEP 0X0F
371 
372 /* SEQ CONTROL REGISTER BITS FOR ID 10 AND 11 */
373 #define DA9052_ID1011_PDDISSTEP 0XF0
374 #define DA9052_ID1011_LDO10STEP 0X0F
375 
376 /* SEQ CONTROL REGISTER BITS FOR ID 12 AND 13 */
377 #define DA9052_ID1213_VMEMSWSTEP 0XF0
378 #define DA9052_ID1213_VPERISWSTEP 0X0F
379 
380 /* SEQ CONTROL REGISTER BITS FOR ID 14 AND 15 */
381 #define DA9052_ID1415_BUCKPROSTEP 0XF0
382 #define DA9052_ID1415_BUCKCORESTEP 0X0F
383 
384 /* SEQ CONTROL REGISTER BITS FOR ID 16 AND 17 */
385 #define DA9052_ID1617_BUCKPERISTEP 0XF0
386 #define DA9052_ID1617_BUCKMEMSTEP 0X0F
387 
388 /* SEQ CONTROL REGISTER BITS FOR ID 18 AND 19 */
389 #define DA9052_ID1819_GPRISE2STEP 0XF0
390 #define DA9052_ID1819_GPRISE1STEP 0X0F
391 
392 /* SEQ CONTROL REGISTER BITS FOR ID 20 AND 21 */
393 #define DA9052_ID2021_GPFALL2STEP 0XF0
394 #define DA9052_ID2021_GPFALL1STEP 0X0F
395 
396 /* POWER SEQ STATUS REGISTER BITS */
397 #define DA9052_SEQSTATUS_SEQPOINTER 0XF0
398 #define DA9052_SEQSTATUS_WAITSTEP 0X0F
399 
400 /* POWER SEQ A REGISTER BITS */
401 #define DA9052_SEQA_POWEREND 0XF0
402 #define DA9052_SEQA_SYSTEMEND 0X0F
403 
404 /* POWER SEQ B REGISTER BITS */
405 #define DA9052_SEQB_PARTDOWN 0XF0
406 #define DA9052_SEQB_MAXCOUNT 0X0F
407 
408 /* POWER SEQ TIMER REGISTER BITS */
409 #define DA9052_SEQTIMER_SEQDUMMY 0XF0
410 #define DA9052_SEQTIMER_SEQTIME 0X0F
411 
412 /*POWER SUPPLY CONTROL REGISTER BITS */
413 /* BUCK REGISTER A BITS */
414 #define DA9052_BUCKA_BPROILIM 0XC0
415 #define DA9052_BUCKA_BPROMODE 0X30
416 #define DA9052_BUCKA_BCOREILIM 0X0C
417 #define DA9052_BUCKA_BCOREMODE 0X03
418 
419 /* BUCK REGISTER B BITS */
420 #define DA9052_BUCKB_BERIILIM 0XC0
421 #define DA9052_BUCKB_BPERIMODE 0X30
422 #define DA9052_BUCKB_BMEMILIM 0X0C
423 #define DA9052_BUCKB_BMEMMODE 0X03
424 
425 /* BUCKCORE REGISTER BITS */
426 #define DA9052_BUCKCORE_BCORECONF 0X80
427 #define DA9052_BUCKCORE_BCOREEN 0X40
428 #define DA9052_BUCKCORE_VBCORE 0X3F
429 
430 /* BUCKPRO REGISTER BITS */
431 #define DA9052_BUCKPRO_BPROCONF 0X80
432 #define DA9052_BUCKPRO_BPROEN 0X40
433 #define DA9052_BUCKPRO_VBPRO 0X3F
434 
435 /* BUCKMEM REGISTER BITS */
436 #define DA9052_BUCKMEM_BMEMCONF 0X80
437 #define DA9052_BUCKMEM_BMEMEN 0X40
438 #define DA9052_BUCKMEM_VBMEM 0X3F
439 
440 /* BUCKPERI REGISTER BITS */
441 #define DA9052_BUCKPERI_BPERICONF 0X80
442 #define DA9052_BUCKPERI_BPERIEN 0X40
443 #define DA9052_BUCKPERI_BPERIHS 0X20
444 #define DA9052_BUCKPERI_VBPERI 0X1F
445 
446 /* LDO1 REGISTER BITS */
447 #define DA9052_LDO1_LDO1CONF 0X80
448 #define DA9052_LDO1_LDO1EN 0X40
449 #define DA9052_LDO1_VLDO1 0X1F
450 
451 /* LDO2 REGISTER BITS */
452 #define DA9052_LDO2_LDO2CONF 0X80
453 #define DA9052_LDO2_LDO2EN 0X40
454 #define DA9052_LDO2_VLDO2 0X3F
455 
456 /* LDO3 REGISTER BITS */
457 #define DA9052_LDO3_LDO3CONF 0X80
458 #define DA9052_LDO3_LDO3EN 0X40
459 #define DA9052_LDO3_VLDO3 0X3F
460 
461 /* LDO4 REGISTER BITS */
462 #define DA9052_LDO4_LDO4CONF 0X80
463 #define DA9052_LDO4_LDO4EN 0X40
464 #define DA9052_LDO4_VLDO4 0X3F
465 
466 /* LDO5 REGISTER BITS */
467 #define DA9052_LDO5_LDO5CONF 0X80
468 #define DA9052_LDO5_LDO5EN 0X40
469 #define DA9052_LDO5_VLDO5 0X3F
470 
471 /* LDO6 REGISTER BITS */
472 #define DA9052_LDO6_LDO6CONF 0X80
473 #define DA9052_LDO6_LDO6EN 0X40
474 #define DA9052_LDO6_VLDO6 0X3F
475 
476 /* LDO7 REGISTER BITS */
477 #define DA9052_LDO7_LDO7CONF 0X80
478 #define DA9052_LDO7_LDO7EN 0X40
479 #define DA9052_LDO7_VLDO7 0X3F
480 
481 /* LDO8 REGISTER BITS */
482 #define DA9052_LDO8_LDO8CONF 0X80
483 #define DA9052_LDO8_LDO8EN 0X40
484 #define DA9052_LDO8_VLDO8 0X3F
485 
486 /* LDO9 REGISTER BITS */
487 #define DA9052_LDO9_LDO9CONF 0X80
488 #define DA9052_LDO9_LDO9EN 0X40
489 #define DA9052_LDO9_VLDO9 0X3F
490 
491 /* LDO10 REGISTER BITS */
492 #define DA9052_LDO10_LDO10CONF 0X80
493 #define DA9052_LDO10_LDO10EN 0X40
494 #define DA9052_LDO10_VLDO10 0X3F
495 
496 /* SUPPLY REGISTER BITS */
497 #define DA9052_SUPPLY_VLOCK 0X80
498 #define DA9052_SUPPLY_VMEMSWEN 0X40
499 #define DA9052_SUPPLY_VPERISWEN 0X20
500 #define DA9052_SUPPLY_VLDO3GO 0X10
501 #define DA9052_SUPPLY_VLDO2GO 0X08
502 #define DA9052_SUPPLY_VBMEMGO 0X04
503 #define DA9052_SUPPLY_VBPROGO 0X02
504 #define DA9052_SUPPLY_VBCOREGO 0X01
505 
506 /* PULLDOWN REGISTER BITS */
507 #define DA9052_PULLDOWN_LDO5PDDIS 0X20
508 #define DA9052_PULLDOWN_LDO2PDDIS 0X10
509 #define DA9052_PULLDOWN_LDO1PDDIS 0X08
510 #define DA9052_PULLDOWN_MEMPDDIS 0X04
511 #define DA9052_PULLDOWN_PROPDDIS 0X02
512 #define DA9052_PULLDOWN_COREPDDIS 0X01
513 
514 /* BAT CHARGER REGISTER BITS */
515 /* CHARGER BUCK REGISTER BITS */
516 #define DA9052_CHGBUCK_CHGTEMP 0X80
517 #define DA9052_CHGBUCK_CHGUSBILIM 0X40
518 #define DA9052_CHGBUCK_CHGBUCKLP 0X20
519 #define DA9052_CHGBUCK_CHGBUCKEN 0X10
520 #define DA9052_CHGBUCK_ISETBUCK 0X0F
521 
522 /* WAIT COUNTER REGISTER BITS */
523 #define DA9052_WAITCONT_WAITDIR 0X80
524 #define DA9052_WAITCONT_RTCCLOCK 0X40
525 #define DA9052_WAITCONT_WAITMODE 0X20
526 #define DA9052_WAITCONT_EN32KOUT 0X10
527 #define DA9052_WAITCONT_DELAYTIME 0X0F
528 
529 /* ISET CONTROL REGISTER BITS */
530 #define DA9052_ISET_ISETDCIN 0XF0
531 #define DA9052_ISET_ISETVBUS 0X0F
532 
533 /* BATTERY CHARGER CONTROL REGISTER BITS */
534 #define DA9052_BATCHG_ICHGPRE 0XC0
535 #define DA9052_BATCHG_ICHGBAT 0X3F
536 
537 /* CHARGER COUNTER REGISTER BITS */
538 #define DA9052_CHG_CONT_VCHG_BAT 0XF8
539 #define DA9052_CHG_CONT_TCTR 0X07
540 
541 /* INPUT CONTROL REGISTER BITS */
542 #define DA9052_INPUT_CONT_TCTR_MODE 0X80
543 #define DA9052_INPUT_CONT_VBUS_SUSP 0X10
544 #define DA9052_INPUT_CONT_DCIN_SUSP 0X08
545 
546 /* CHARGING TIME REGISTER BITS */
547 #define DA9052_CHGTIME_CHGTIME 0XFF
548 
549 /* BACKUP BATTERY CONTROL REGISTER BITS */
550 #define DA9052_BBATCONT_BCHARGERISET 0XF0
551 #define DA9052_BBATCONT_BCHARGERVSET 0X0F
552 
553 /* LED REGISTERS BITS */
554 /* LED BOOST REGISTER BITS */
555 #define DA9052_BOOST_EBFAULT 0X80
556 #define DA9052_BOOST_MBFAULT 0X40
557 #define DA9052_BOOST_BOOSTFRQ 0X20
558 #define DA9052_BOOST_BOOSTILIM 0X10
559 #define DA9052_BOOST_LED3INEN 0X08
560 #define DA9052_BOOST_LED2INEN 0X04
561 #define DA9052_BOOST_LED1INEN 0X02
562 #define DA9052_BOOST_BOOSTEN 0X01
563 
564 /* LED CONTROL REGISTER BITS */
565 #define DA9052_LEDCONT_SELLEDMODE 0X80
566 #define DA9052_LEDCONT_LED3ICONT 0X40
567 #define DA9052_LEDCONT_LED3RAMP 0X20
568 #define DA9052_LEDCONT_LED3EN 0X10
569 #define DA9052_LEDCONT_LED2RAMP 0X08
570 #define DA9052_LEDCONT_LED2EN 0X04
571 #define DA9052_LEDCONT_LED1RAMP 0X02
572 #define DA9052_LEDCONT_LED1EN 0X01
573 
574 /* LEDMIN123 REGISTER BIT */
575 #define DA9052_LEDMIN123_LEDMINCURRENT 0XFF
576 
577 /* LED1CONF REGISTER BIT */
578 #define DA9052_LED1CONF_LED1CURRENT 0XFF
579 
580 /* LED2CONF REGISTER BIT */
581 #define DA9052_LED2CONF_LED2CURRENT 0XFF
582 
583 /* LED3CONF REGISTER BIT */
584 #define DA9052_LED3CONF_LED3CURRENT 0XFF
585 
586 /* LED COUNT REGISTER BIT */
587 #define DA9052_LED_CONT_DIM 0X80
588 
589 /* ADC MAN REGISTERS BITS */
590 #define DA9052_ADC_MAN_MAN_CONV 0X10
591 #define DA9052_ADC_MAN_MUXSEL_VDDOUT 0X00
592 #define DA9052_ADC_MAN_MUXSEL_ICH 0X01
593 #define DA9052_ADC_MAN_MUXSEL_TBAT 0X02
594 #define DA9052_ADC_MAN_MUXSEL_VBAT 0X03
595 #define DA9052_ADC_MAN_MUXSEL_AD4 0X04
596 #define DA9052_ADC_MAN_MUXSEL_AD5 0X05
597 #define DA9052_ADC_MAN_MUXSEL_AD6 0X06
598 #define DA9052_ADC_MAN_MUXSEL_VBBAT 0X09
599 
600 /* ADC CONTROL REGSISTERS BITS */
601 #define DA9052_ADCCONT_COMP1V2EN 0X80
602 #define DA9052_ADCCONT_ADCMODE 0X40
603 #define DA9052_ADCCONT_TBATISRCEN 0X20
604 #define DA9052_ADCCONT_AD4ISRCEN 0X10
605 #define DA9052_ADCCONT_AUTOAD6EN 0X08
606 #define DA9052_ADCCONT_AUTOAD5EN 0X04
607 #define DA9052_ADCCONT_AUTOAD4EN 0X02
608 #define DA9052_ADCCONT_AUTOVDDEN 0X01
609 
610 /* ADC 10 BIT MANUAL CONVERSION RESULT LOW REGISTER */
611 #define DA9052_ADC_RES_LSB 0X03
612 
613 /* ADC 10 BIT MANUAL CONVERSION RESULT HIGH REGISTER */
614 #define DA9052_ADCRESH_ADCRESMSB 0XFF
615 
616 /* VDD RES REGSISTER BIT*/
617 #define DA9052_VDDRES_VDDOUTRES 0XFF
618 
619 /* VDD MON REGSISTER BIT */
620 #define DA9052_VDDMON_VDDOUTMON 0XFF
621 
622 /* ICHG_AV REGSISTER BIT */
623 #define DA9052_ICHGAV_ICHGAV 0XFF
624 
625 /* ICHG_THD REGSISTER BIT */
626 #define DA9052_ICHGTHD_ICHGTHD 0XFF
627 
628 /* ICHG_END REGSISTER BIT */
629 #define DA9052_ICHGEND_ICHGEND 0XFF
630 
631 /* TBAT_RES REGSISTER BIT */
632 #define DA9052_TBATRES_TBATRES 0XFF
633 
634 /* TBAT_HIGHP REGSISTER BIT */
635 #define DA9052_TBATHIGHP_TBATHIGHP 0XFF
636 
637 /* TBAT_HIGHN REGSISTER BIT */
638 #define DA9052_TBATHIGHN_TBATHIGHN 0XFF
639 
640 /* TBAT_LOW REGSISTER BIT */
641 #define DA9052_TBATLOW_TBATLOW 0XFF
642 
643 /* T_OFFSET REGSISTER BIT */
644 #define DA9052_TOFFSET_TOFFSET 0XFF
645 
646 /* ADCIN4_RES REGSISTER BIT */
647 #define DA9052_ADCIN4RES_ADCIN4RES 0XFF
648 
649 /* ADCIN4_HIGH REGSISTER BIT */
650 #define DA9052_AUTO4HIGH_AUTO4HIGH 0XFF
651 
652 /* ADCIN4_LOW REGSISTER BIT */
653 #define DA9052_AUTO4LOW_AUTO4LOW 0XFF
654 
655 /* ADCIN5_RES REGSISTER BIT */
656 #define DA9052_ADCIN5RES_ADCIN5RES 0XFF
657 
658 /* ADCIN5_HIGH REGSISTER BIT */
659 #define DA9052_AUTO5HIGH_AUTOHIGH 0XFF
660 
661 /* ADCIN5_LOW REGSISTER BIT */
662 #define DA9052_AUTO5LOW_AUTO5LOW 0XFF
663 
664 /* ADCIN6_RES REGSISTER BIT */
665 #define DA9052_ADCIN6RES_ADCIN6RES 0XFF
666 
667 /* ADCIN6_HIGH REGSISTER BIT */
668 #define DA9052_AUTO6HIGH_AUTO6HIGH 0XFF
669 
670 /* ADCIN6_LOW REGSISTER BIT */
671 #define DA9052_AUTO6LOW_AUTO6LOW 0XFF
672 
673 /* TJUNC_RES REGSISTER BIT*/
674 #define DA9052_TJUNCRES_TJUNCRES 0XFF
675 
676 /* TSI REGISTER */
677 /* TSI CONTROL REGISTER A BITS */
678 #define DA9052_TSICONTA_TSIDELAY 0XC0
679 #define DA9052_TSICONTA_TSISKIP 0X38
680 #define DA9052_TSICONTA_TSIMODE 0X04
681 #define DA9052_TSICONTA_PENDETEN 0X02
682 #define DA9052_TSICONTA_AUTOTSIEN 0X01
683 
684 /* TSI CONTROL REGISTER B BITS */
685 #define DA9052_TSICONTB_ADCREF 0X80
686 #define DA9052_TSICONTB_TSIMAN 0X40
687 #define DA9052_TSICONTB_TSIMUX 0X30
688 #define DA9052_TSICONTB_TSISEL3 0X08
689 #define DA9052_TSICONTB_TSISEL2 0X04
690 #define DA9052_TSICONTB_TSISEL1 0X02
691 #define DA9052_TSICONTB_TSISEL0 0X01
692 
693 /* TSI X CO-ORDINATE MSB RESULT REGISTER BITS */
694 #define DA9052_TSIXMSB_TSIXM 0XFF
695 
696 /* TSI Y CO-ORDINATE MSB RESULT REGISTER BITS */
697 #define DA9052_TSIYMSB_TSIYM 0XFF
698 
699 /* TSI CO-ORDINATE LSB RESULT REGISTER BITS */
700 #define DA9052_TSILSB_PENDOWN 0X40
701 #define DA9052_TSILSB_TSIZL 0X30
702 #define DA9052_TSILSB_TSIYL 0X0C
703 #define DA9052_TSILSB_TSIXL 0X03
704 
705 /* TSI Z MEASUREMENT MSB RESULT REGISTER BIT */
706 #define DA9052_TSIZMSB_TSIZM 0XFF
707 
708 /* RTC REGISTER */
709 /* RTC TIMER SECONDS REGISTER BITS */
710 #define DA9052_COUNTS_MONITOR 0X40
711 #define DA9052_RTC_SEC 0X3F
712 
713 /* RTC TIMER MINUTES REGISTER BIT */
714 #define DA9052_RTC_MIN 0X3F
715 
716 /* RTC TIMER HOUR REGISTER BIT */
717 #define DA9052_RTC_HOUR 0X1F
718 
719 /* RTC TIMER DAYS REGISTER BIT */
720 #define DA9052_RTC_DAY 0X1F
721 
722 /* RTC TIMER MONTHS REGISTER BIT */
723 #define DA9052_RTC_MONTH 0X0F
724 
725 /* RTC TIMER YEARS REGISTER BIT */
726 #define DA9052_RTC_YEAR 0X3F
727 
728 /* RTC ALARM MINUTES REGISTER BITS */
729 #define DA9052_ALARMM_I_TICK_TYPE 0X80
730 #define DA9052_ALARMMI_ALARMTYPE 0X40
731 
732 /* RTC ALARM YEARS REGISTER BITS */
733 #define DA9052_ALARM_Y_TICK_ON 0X80
734 #define DA9052_ALARM_Y_ALARM_ON 0X40
735 
736 /* RTC SECONDS REGISTER A BITS */
737 #define DA9052_SECONDA_SECONDSA 0XFF
738 
739 /* RTC SECONDS REGISTER B BITS */
740 #define DA9052_SECONDB_SECONDSB 0XFF
741 
742 /* RTC SECONDS REGISTER C BITS */
743 #define DA9052_SECONDC_SECONDSC 0XFF
744 
745 /* RTC SECONDS REGISTER D BITS */
746 #define DA9052_SECONDD_SECONDSD 0XFF
747 
748 #endif
749 /* __LINUX_MFD_DA9052_REG_H */