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20 #ifndef __MACH_IOMUX_V3_H__
21 #define __MACH_IOMUX_V3_H__
58 #define MUX_CTRL_OFS_SHIFT 0
59 #define MUX_CTRL_OFS_MASK ((iomux_v3_cfg_t)0xfff << MUX_CTRL_OFS_SHIFT)
60 #define MUX_PAD_CTRL_OFS_SHIFT 12
61 #define MUX_PAD_CTRL_OFS_MASK ((iomux_v3_cfg_t)0xfff << MUX_PAD_CTRL_OFS_SHIFT)
62 #define MUX_SEL_INPUT_OFS_SHIFT 24
63 #define MUX_SEL_INPUT_OFS_MASK ((iomux_v3_cfg_t)0xfff << MUX_SEL_INPUT_OFS_SHIFT)
65 #define MUX_MODE_SHIFT 36
66 #define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT)
67 #define MUX_PAD_CTRL_SHIFT 41
68 #define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x1ffff << MUX_PAD_CTRL_SHIFT)
69 #define MUX_SEL_INPUT_SHIFT 58
70 #define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT)
72 #define MUX_PAD_CTRL(x) ((iomux_v3_cfg_t)(x) << MUX_PAD_CTRL_SHIFT)
74 #define IOMUX_PAD(_pad_ctrl_ofs, _mux_ctrl_ofs, _mux_mode, _sel_input_ofs, \
75 _sel_input, _pad_ctrl) \
76 (((iomux_v3_cfg_t)(_mux_ctrl_ofs) << MUX_CTRL_OFS_SHIFT) | \
77 ((iomux_v3_cfg_t)(_mux_mode) << MUX_MODE_SHIFT) | \
78 ((iomux_v3_cfg_t)(_pad_ctrl_ofs) << MUX_PAD_CTRL_OFS_SHIFT) | \
79 ((iomux_v3_cfg_t)(_pad_ctrl) << MUX_PAD_CTRL_SHIFT) | \
80 ((iomux_v3_cfg_t)(_sel_input_ofs) << MUX_SEL_INPUT_OFS_SHIFT) | \
81 ((iomux_v3_cfg_t)(_sel_input) << MUX_SEL_INPUT_SHIFT))
83 #define NEW_PAD_CTRL(cfg, pad) (((cfg) & ~MUX_PAD_CTRL_MASK) | MUX_PAD_CTRL(pad))
88 #define NO_PAD_CTRL (1 << 16)
89 #define PAD_CTL_DVS (1 << 13)
90 #define PAD_CTL_HYS (1 << 8)
92 #define PAD_CTL_PKE (1 << 7)
93 #define PAD_CTL_PUE (1 << 6 | PAD_CTL_PKE)
94 #define PAD_CTL_PUS_100K_DOWN (0 << 4 | PAD_CTL_PUE)
95 #define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE)
96 #define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE)
97 #define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE)
99 #define PAD_CTL_ODE (1 << 3)
101 #define PAD_CTL_DSE_LOW (0 << 1)
102 #define PAD_CTL_DSE_MED (1 << 1)
103 #define PAD_CTL_DSE_HIGH (2 << 1)
104 #define PAD_CTL_DSE_MAX (3 << 1)
106 #define PAD_CTL_SRE_FAST (1 << 0)
107 #define PAD_CTL_SRE_SLOW (0 << 0)
109 #define IOMUX_CONFIG_SION (0x1 << 4)
111 #define MX51_NUM_GPIO_PORT 4
113 #define GPIO_PIN_MASK 0x1f
115 #define GPIO_PORT_SHIFT 5
116 #define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
118 #define GPIO_PORTA (0 << GPIO_PORT_SHIFT)
119 #define GPIO_PORTB (1 << GPIO_PORT_SHIFT)
120 #define GPIO_PORTC (2 << GPIO_PORT_SHIFT)
121 #define GPIO_PORTD (3 << GPIO_PORT_SHIFT)
122 #define GPIO_PORTE (4 << GPIO_PORT_SHIFT)
123 #define GPIO_PORTF (5 << GPIO_PORT_SHIFT)