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iop_fifo_in_defs_asm.h
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1 #ifndef __iop_fifo_in_defs_asm_h
2 #define __iop_fifo_in_defs_asm_h
3 
4 /*
5  * This file is autogenerated from
6  * file: ../../inst/io_proc/rtl/iop_fifo_in.r
7  * id: <not found>
8  * last modfied: Mon Apr 11 16:10:07 2005
9  *
10  * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_fifo_in_defs_asm.h ../../inst/io_proc/rtl/iop_fifo_in.r
11  * id: $Id: iop_fifo_in_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
12  * Any changes here will be lost.
13  *
14  * -*- buffer-read-only: t -*-
15  */
16 
17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \
19  REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
20 #define REG_FIELD_X_( value, shift ) ((value) << shift)
21 #endif
22 
23 #ifndef REG_STATE
24 #define REG_STATE( scope, reg, field, symbolic_value ) \
25  REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
26 #define REG_STATE_X_( k, shift ) (k << shift)
27 #endif
28 
29 #ifndef REG_MASK
30 #define REG_MASK( scope, reg, field ) \
31  REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
32 #define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
33 #endif
34 
35 #ifndef REG_LSB
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
37 #endif
38 
39 #ifndef REG_BIT
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
41 #endif
42 
43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs)
46 #endif
47 
48 #ifndef REG_ADDR_VECT
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \
50  REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
51  STRIDE_##scope##_##reg )
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
53  ((inst) + offs + (index) * stride)
54 #endif
55 
56 /* Register rw_cfg, scope iop_fifo_in, type rw */
57 #define reg_iop_fifo_in_rw_cfg___avail_lim___lsb 0
58 #define reg_iop_fifo_in_rw_cfg___avail_lim___width 3
59 #define reg_iop_fifo_in_rw_cfg___byte_order___lsb 3
60 #define reg_iop_fifo_in_rw_cfg___byte_order___width 2
61 #define reg_iop_fifo_in_rw_cfg___trig___lsb 5
62 #define reg_iop_fifo_in_rw_cfg___trig___width 2
63 #define reg_iop_fifo_in_rw_cfg___last_dis_dif_in___lsb 7
64 #define reg_iop_fifo_in_rw_cfg___last_dis_dif_in___width 1
65 #define reg_iop_fifo_in_rw_cfg___last_dis_dif_in___bit 7
66 #define reg_iop_fifo_in_rw_cfg___mode___lsb 8
67 #define reg_iop_fifo_in_rw_cfg___mode___width 2
68 #define reg_iop_fifo_in_rw_cfg_offset 0
69 
70 /* Register rw_ctrl, scope iop_fifo_in, type rw */
71 #define reg_iop_fifo_in_rw_ctrl___dif_in_en___lsb 0
72 #define reg_iop_fifo_in_rw_ctrl___dif_in_en___width 1
73 #define reg_iop_fifo_in_rw_ctrl___dif_in_en___bit 0
74 #define reg_iop_fifo_in_rw_ctrl___dif_out_en___lsb 1
75 #define reg_iop_fifo_in_rw_ctrl___dif_out_en___width 1
76 #define reg_iop_fifo_in_rw_ctrl___dif_out_en___bit 1
77 #define reg_iop_fifo_in_rw_ctrl_offset 4
78 
79 /* Register r_stat, scope iop_fifo_in, type r */
80 #define reg_iop_fifo_in_r_stat___avail_bytes___lsb 0
81 #define reg_iop_fifo_in_r_stat___avail_bytes___width 4
82 #define reg_iop_fifo_in_r_stat___last___lsb 4
83 #define reg_iop_fifo_in_r_stat___last___width 8
84 #define reg_iop_fifo_in_r_stat___dif_in_en___lsb 12
85 #define reg_iop_fifo_in_r_stat___dif_in_en___width 1
86 #define reg_iop_fifo_in_r_stat___dif_in_en___bit 12
87 #define reg_iop_fifo_in_r_stat___dif_out_en___lsb 13
88 #define reg_iop_fifo_in_r_stat___dif_out_en___width 1
89 #define reg_iop_fifo_in_r_stat___dif_out_en___bit 13
90 #define reg_iop_fifo_in_r_stat_offset 8
91 
92 /* Register rs_rd1byte, scope iop_fifo_in, type rs */
93 #define reg_iop_fifo_in_rs_rd1byte___data___lsb 0
94 #define reg_iop_fifo_in_rs_rd1byte___data___width 8
95 #define reg_iop_fifo_in_rs_rd1byte_offset 12
96 
97 /* Register r_rd1byte, scope iop_fifo_in, type r */
98 #define reg_iop_fifo_in_r_rd1byte___data___lsb 0
99 #define reg_iop_fifo_in_r_rd1byte___data___width 8
100 #define reg_iop_fifo_in_r_rd1byte_offset 16
101 
102 /* Register rs_rd2byte, scope iop_fifo_in, type rs */
103 #define reg_iop_fifo_in_rs_rd2byte___data___lsb 0
104 #define reg_iop_fifo_in_rs_rd2byte___data___width 16
105 #define reg_iop_fifo_in_rs_rd2byte_offset 20
106 
107 /* Register r_rd2byte, scope iop_fifo_in, type r */
108 #define reg_iop_fifo_in_r_rd2byte___data___lsb 0
109 #define reg_iop_fifo_in_r_rd2byte___data___width 16
110 #define reg_iop_fifo_in_r_rd2byte_offset 24
111 
112 /* Register rs_rd3byte, scope iop_fifo_in, type rs */
113 #define reg_iop_fifo_in_rs_rd3byte___data___lsb 0
114 #define reg_iop_fifo_in_rs_rd3byte___data___width 24
115 #define reg_iop_fifo_in_rs_rd3byte_offset 28
116 
117 /* Register r_rd3byte, scope iop_fifo_in, type r */
118 #define reg_iop_fifo_in_r_rd3byte___data___lsb 0
119 #define reg_iop_fifo_in_r_rd3byte___data___width 24
120 #define reg_iop_fifo_in_r_rd3byte_offset 32
121 
122 /* Register rs_rd4byte, scope iop_fifo_in, type rs */
123 #define reg_iop_fifo_in_rs_rd4byte___data___lsb 0
124 #define reg_iop_fifo_in_rs_rd4byte___data___width 32
125 #define reg_iop_fifo_in_rs_rd4byte_offset 36
126 
127 /* Register r_rd4byte, scope iop_fifo_in, type r */
128 #define reg_iop_fifo_in_r_rd4byte___data___lsb 0
129 #define reg_iop_fifo_in_r_rd4byte___data___width 32
130 #define reg_iop_fifo_in_r_rd4byte_offset 40
131 
132 /* Register rw_set_last, scope iop_fifo_in, type rw */
133 #define reg_iop_fifo_in_rw_set_last_offset 44
134 
135 /* Register rw_strb_dif_in, scope iop_fifo_in, type rw */
136 #define reg_iop_fifo_in_rw_strb_dif_in___last___lsb 0
137 #define reg_iop_fifo_in_rw_strb_dif_in___last___width 2
138 #define reg_iop_fifo_in_rw_strb_dif_in_offset 48
139 
140 /* Register rw_intr_mask, scope iop_fifo_in, type rw */
141 #define reg_iop_fifo_in_rw_intr_mask___urun___lsb 0
142 #define reg_iop_fifo_in_rw_intr_mask___urun___width 1
143 #define reg_iop_fifo_in_rw_intr_mask___urun___bit 0
144 #define reg_iop_fifo_in_rw_intr_mask___last_data___lsb 1
145 #define reg_iop_fifo_in_rw_intr_mask___last_data___width 1
146 #define reg_iop_fifo_in_rw_intr_mask___last_data___bit 1
147 #define reg_iop_fifo_in_rw_intr_mask___dav___lsb 2
148 #define reg_iop_fifo_in_rw_intr_mask___dav___width 1
149 #define reg_iop_fifo_in_rw_intr_mask___dav___bit 2
150 #define reg_iop_fifo_in_rw_intr_mask___avail___lsb 3
151 #define reg_iop_fifo_in_rw_intr_mask___avail___width 1
152 #define reg_iop_fifo_in_rw_intr_mask___avail___bit 3
153 #define reg_iop_fifo_in_rw_intr_mask___orun___lsb 4
154 #define reg_iop_fifo_in_rw_intr_mask___orun___width 1
155 #define reg_iop_fifo_in_rw_intr_mask___orun___bit 4
156 #define reg_iop_fifo_in_rw_intr_mask_offset 52
157 
158 /* Register rw_ack_intr, scope iop_fifo_in, type rw */
159 #define reg_iop_fifo_in_rw_ack_intr___urun___lsb 0
160 #define reg_iop_fifo_in_rw_ack_intr___urun___width 1
161 #define reg_iop_fifo_in_rw_ack_intr___urun___bit 0
162 #define reg_iop_fifo_in_rw_ack_intr___last_data___lsb 1
163 #define reg_iop_fifo_in_rw_ack_intr___last_data___width 1
164 #define reg_iop_fifo_in_rw_ack_intr___last_data___bit 1
165 #define reg_iop_fifo_in_rw_ack_intr___dav___lsb 2
166 #define reg_iop_fifo_in_rw_ack_intr___dav___width 1
167 #define reg_iop_fifo_in_rw_ack_intr___dav___bit 2
168 #define reg_iop_fifo_in_rw_ack_intr___avail___lsb 3
169 #define reg_iop_fifo_in_rw_ack_intr___avail___width 1
170 #define reg_iop_fifo_in_rw_ack_intr___avail___bit 3
171 #define reg_iop_fifo_in_rw_ack_intr___orun___lsb 4
172 #define reg_iop_fifo_in_rw_ack_intr___orun___width 1
173 #define reg_iop_fifo_in_rw_ack_intr___orun___bit 4
174 #define reg_iop_fifo_in_rw_ack_intr_offset 56
175 
176 /* Register r_intr, scope iop_fifo_in, type r */
177 #define reg_iop_fifo_in_r_intr___urun___lsb 0
178 #define reg_iop_fifo_in_r_intr___urun___width 1
179 #define reg_iop_fifo_in_r_intr___urun___bit 0
180 #define reg_iop_fifo_in_r_intr___last_data___lsb 1
181 #define reg_iop_fifo_in_r_intr___last_data___width 1
182 #define reg_iop_fifo_in_r_intr___last_data___bit 1
183 #define reg_iop_fifo_in_r_intr___dav___lsb 2
184 #define reg_iop_fifo_in_r_intr___dav___width 1
185 #define reg_iop_fifo_in_r_intr___dav___bit 2
186 #define reg_iop_fifo_in_r_intr___avail___lsb 3
187 #define reg_iop_fifo_in_r_intr___avail___width 1
188 #define reg_iop_fifo_in_r_intr___avail___bit 3
189 #define reg_iop_fifo_in_r_intr___orun___lsb 4
190 #define reg_iop_fifo_in_r_intr___orun___width 1
191 #define reg_iop_fifo_in_r_intr___orun___bit 4
192 #define reg_iop_fifo_in_r_intr_offset 60
193 
194 /* Register r_masked_intr, scope iop_fifo_in, type r */
195 #define reg_iop_fifo_in_r_masked_intr___urun___lsb 0
196 #define reg_iop_fifo_in_r_masked_intr___urun___width 1
197 #define reg_iop_fifo_in_r_masked_intr___urun___bit 0
198 #define reg_iop_fifo_in_r_masked_intr___last_data___lsb 1
199 #define reg_iop_fifo_in_r_masked_intr___last_data___width 1
200 #define reg_iop_fifo_in_r_masked_intr___last_data___bit 1
201 #define reg_iop_fifo_in_r_masked_intr___dav___lsb 2
202 #define reg_iop_fifo_in_r_masked_intr___dav___width 1
203 #define reg_iop_fifo_in_r_masked_intr___dav___bit 2
204 #define reg_iop_fifo_in_r_masked_intr___avail___lsb 3
205 #define reg_iop_fifo_in_r_masked_intr___avail___width 1
206 #define reg_iop_fifo_in_r_masked_intr___avail___bit 3
207 #define reg_iop_fifo_in_r_masked_intr___orun___lsb 4
208 #define reg_iop_fifo_in_r_masked_intr___orun___width 1
209 #define reg_iop_fifo_in_r_masked_intr___orun___bit 4
210 #define reg_iop_fifo_in_r_masked_intr_offset 64
211 
212 
213 /* Constants */
214 #define regk_iop_fifo_in_dif_in 0x00000002
215 #define regk_iop_fifo_in_hi 0x00000000
216 #define regk_iop_fifo_in_neg 0x00000002
217 #define regk_iop_fifo_in_no 0x00000000
218 #define regk_iop_fifo_in_order16 0x00000001
219 #define regk_iop_fifo_in_order24 0x00000002
220 #define regk_iop_fifo_in_order32 0x00000003
221 #define regk_iop_fifo_in_order8 0x00000000
222 #define regk_iop_fifo_in_pos 0x00000001
223 #define regk_iop_fifo_in_pos_neg 0x00000003
224 #define regk_iop_fifo_in_rw_cfg_default 0x00000024
225 #define regk_iop_fifo_in_rw_ctrl_default 0x00000000
226 #define regk_iop_fifo_in_rw_intr_mask_default 0x00000000
227 #define regk_iop_fifo_in_rw_set_last_default 0x00000000
228 #define regk_iop_fifo_in_rw_strb_dif_in_default 0x00000000
229 #define regk_iop_fifo_in_size16 0x00000002
230 #define regk_iop_fifo_in_size24 0x00000001
231 #define regk_iop_fifo_in_size32 0x00000000
232 #define regk_iop_fifo_in_size8 0x00000003
233 #define regk_iop_fifo_in_yes 0x00000001
234 #endif /* __iop_fifo_in_defs_asm_h */