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iop_fifo_in_extra_defs_asm.h
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1 #ifndef __iop_fifo_in_extra_defs_asm_h
2 #define __iop_fifo_in_extra_defs_asm_h
3 
4 /*
5  * This file is autogenerated from
6  * file: ../../inst/io_proc/rtl/iop_fifo_in_extra.r
7  * id: <not found>
8  * last modfied: Mon Apr 11 16:10:08 2005
9  *
10  * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_fifo_in_extra_defs_asm.h ../../inst/io_proc/rtl/iop_fifo_in_extra.r
11  * id: $Id: iop_fifo_in_extra_defs_asm.h,v 1.1 2005/04/24 18:31:06 starvik Exp $
12  * Any changes here will be lost.
13  *
14  * -*- buffer-read-only: t -*-
15  */
16 
17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \
19  REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
20 #define REG_FIELD_X_( value, shift ) ((value) << shift)
21 #endif
22 
23 #ifndef REG_STATE
24 #define REG_STATE( scope, reg, field, symbolic_value ) \
25  REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
26 #define REG_STATE_X_( k, shift ) (k << shift)
27 #endif
28 
29 #ifndef REG_MASK
30 #define REG_MASK( scope, reg, field ) \
31  REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
32 #define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
33 #endif
34 
35 #ifndef REG_LSB
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
37 #endif
38 
39 #ifndef REG_BIT
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
41 #endif
42 
43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs)
46 #endif
47 
48 #ifndef REG_ADDR_VECT
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \
50  REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
51  STRIDE_##scope##_##reg )
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
53  ((inst) + offs + (index) * stride)
54 #endif
55 
56 /* Register rw_wr_data, scope iop_fifo_in_extra, type rw */
57 #define reg_iop_fifo_in_extra_rw_wr_data_offset 0
58 
59 /* Register r_stat, scope iop_fifo_in_extra, type r */
60 #define reg_iop_fifo_in_extra_r_stat___avail_bytes___lsb 0
61 #define reg_iop_fifo_in_extra_r_stat___avail_bytes___width 4
62 #define reg_iop_fifo_in_extra_r_stat___last___lsb 4
63 #define reg_iop_fifo_in_extra_r_stat___last___width 8
64 #define reg_iop_fifo_in_extra_r_stat___dif_in_en___lsb 12
65 #define reg_iop_fifo_in_extra_r_stat___dif_in_en___width 1
66 #define reg_iop_fifo_in_extra_r_stat___dif_in_en___bit 12
67 #define reg_iop_fifo_in_extra_r_stat___dif_out_en___lsb 13
68 #define reg_iop_fifo_in_extra_r_stat___dif_out_en___width 1
69 #define reg_iop_fifo_in_extra_r_stat___dif_out_en___bit 13
70 #define reg_iop_fifo_in_extra_r_stat_offset 4
71 
72 /* Register rw_strb_dif_in, scope iop_fifo_in_extra, type rw */
73 #define reg_iop_fifo_in_extra_rw_strb_dif_in___last___lsb 0
74 #define reg_iop_fifo_in_extra_rw_strb_dif_in___last___width 2
75 #define reg_iop_fifo_in_extra_rw_strb_dif_in_offset 8
76 
77 /* Register rw_intr_mask, scope iop_fifo_in_extra, type rw */
78 #define reg_iop_fifo_in_extra_rw_intr_mask___urun___lsb 0
79 #define reg_iop_fifo_in_extra_rw_intr_mask___urun___width 1
80 #define reg_iop_fifo_in_extra_rw_intr_mask___urun___bit 0
81 #define reg_iop_fifo_in_extra_rw_intr_mask___last_data___lsb 1
82 #define reg_iop_fifo_in_extra_rw_intr_mask___last_data___width 1
83 #define reg_iop_fifo_in_extra_rw_intr_mask___last_data___bit 1
84 #define reg_iop_fifo_in_extra_rw_intr_mask___dav___lsb 2
85 #define reg_iop_fifo_in_extra_rw_intr_mask___dav___width 1
86 #define reg_iop_fifo_in_extra_rw_intr_mask___dav___bit 2
87 #define reg_iop_fifo_in_extra_rw_intr_mask___avail___lsb 3
88 #define reg_iop_fifo_in_extra_rw_intr_mask___avail___width 1
89 #define reg_iop_fifo_in_extra_rw_intr_mask___avail___bit 3
90 #define reg_iop_fifo_in_extra_rw_intr_mask___orun___lsb 4
91 #define reg_iop_fifo_in_extra_rw_intr_mask___orun___width 1
92 #define reg_iop_fifo_in_extra_rw_intr_mask___orun___bit 4
93 #define reg_iop_fifo_in_extra_rw_intr_mask_offset 12
94 
95 /* Register rw_ack_intr, scope iop_fifo_in_extra, type rw */
96 #define reg_iop_fifo_in_extra_rw_ack_intr___urun___lsb 0
97 #define reg_iop_fifo_in_extra_rw_ack_intr___urun___width 1
98 #define reg_iop_fifo_in_extra_rw_ack_intr___urun___bit 0
99 #define reg_iop_fifo_in_extra_rw_ack_intr___last_data___lsb 1
100 #define reg_iop_fifo_in_extra_rw_ack_intr___last_data___width 1
101 #define reg_iop_fifo_in_extra_rw_ack_intr___last_data___bit 1
102 #define reg_iop_fifo_in_extra_rw_ack_intr___dav___lsb 2
103 #define reg_iop_fifo_in_extra_rw_ack_intr___dav___width 1
104 #define reg_iop_fifo_in_extra_rw_ack_intr___dav___bit 2
105 #define reg_iop_fifo_in_extra_rw_ack_intr___avail___lsb 3
106 #define reg_iop_fifo_in_extra_rw_ack_intr___avail___width 1
107 #define reg_iop_fifo_in_extra_rw_ack_intr___avail___bit 3
108 #define reg_iop_fifo_in_extra_rw_ack_intr___orun___lsb 4
109 #define reg_iop_fifo_in_extra_rw_ack_intr___orun___width 1
110 #define reg_iop_fifo_in_extra_rw_ack_intr___orun___bit 4
111 #define reg_iop_fifo_in_extra_rw_ack_intr_offset 16
112 
113 /* Register r_intr, scope iop_fifo_in_extra, type r */
114 #define reg_iop_fifo_in_extra_r_intr___urun___lsb 0
115 #define reg_iop_fifo_in_extra_r_intr___urun___width 1
116 #define reg_iop_fifo_in_extra_r_intr___urun___bit 0
117 #define reg_iop_fifo_in_extra_r_intr___last_data___lsb 1
118 #define reg_iop_fifo_in_extra_r_intr___last_data___width 1
119 #define reg_iop_fifo_in_extra_r_intr___last_data___bit 1
120 #define reg_iop_fifo_in_extra_r_intr___dav___lsb 2
121 #define reg_iop_fifo_in_extra_r_intr___dav___width 1
122 #define reg_iop_fifo_in_extra_r_intr___dav___bit 2
123 #define reg_iop_fifo_in_extra_r_intr___avail___lsb 3
124 #define reg_iop_fifo_in_extra_r_intr___avail___width 1
125 #define reg_iop_fifo_in_extra_r_intr___avail___bit 3
126 #define reg_iop_fifo_in_extra_r_intr___orun___lsb 4
127 #define reg_iop_fifo_in_extra_r_intr___orun___width 1
128 #define reg_iop_fifo_in_extra_r_intr___orun___bit 4
129 #define reg_iop_fifo_in_extra_r_intr_offset 20
130 
131 /* Register r_masked_intr, scope iop_fifo_in_extra, type r */
132 #define reg_iop_fifo_in_extra_r_masked_intr___urun___lsb 0
133 #define reg_iop_fifo_in_extra_r_masked_intr___urun___width 1
134 #define reg_iop_fifo_in_extra_r_masked_intr___urun___bit 0
135 #define reg_iop_fifo_in_extra_r_masked_intr___last_data___lsb 1
136 #define reg_iop_fifo_in_extra_r_masked_intr___last_data___width 1
137 #define reg_iop_fifo_in_extra_r_masked_intr___last_data___bit 1
138 #define reg_iop_fifo_in_extra_r_masked_intr___dav___lsb 2
139 #define reg_iop_fifo_in_extra_r_masked_intr___dav___width 1
140 #define reg_iop_fifo_in_extra_r_masked_intr___dav___bit 2
141 #define reg_iop_fifo_in_extra_r_masked_intr___avail___lsb 3
142 #define reg_iop_fifo_in_extra_r_masked_intr___avail___width 1
143 #define reg_iop_fifo_in_extra_r_masked_intr___avail___bit 3
144 #define reg_iop_fifo_in_extra_r_masked_intr___orun___lsb 4
145 #define reg_iop_fifo_in_extra_r_masked_intr___orun___width 1
146 #define reg_iop_fifo_in_extra_r_masked_intr___orun___bit 4
147 #define reg_iop_fifo_in_extra_r_masked_intr_offset 24
148 
149 
150 /* Constants */
151 #define regk_iop_fifo_in_extra_fifo_in 0x00000002
152 #define regk_iop_fifo_in_extra_no 0x00000000
153 #define regk_iop_fifo_in_extra_rw_intr_mask_default 0x00000000
154 #define regk_iop_fifo_in_extra_yes 0x00000001
155 #endif /* __iop_fifo_in_extra_defs_asm_h */