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iop_mpu_defs_asm.h
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1 #ifndef __iop_mpu_defs_asm_h
2 #define __iop_mpu_defs_asm_h
3 
4 /*
5  * This file is autogenerated from
6  * file: ../../inst/io_proc/rtl/iop_mpu.r
7  * id: iop_mpu.r,v 1.30 2005/02/17 08:12:33 niklaspa Exp
8  * last modfied: Mon Apr 11 16:08:45 2005
9  *
10  * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_mpu_defs_asm.h ../../inst/io_proc/rtl/iop_mpu.r
11  * id: $Id: iop_mpu_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
12  * Any changes here will be lost.
13  *
14  * -*- buffer-read-only: t -*-
15  */
16 
17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \
19  REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
20 #define REG_FIELD_X_( value, shift ) ((value) << shift)
21 #endif
22 
23 #ifndef REG_STATE
24 #define REG_STATE( scope, reg, field, symbolic_value ) \
25  REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
26 #define REG_STATE_X_( k, shift ) (k << shift)
27 #endif
28 
29 #ifndef REG_MASK
30 #define REG_MASK( scope, reg, field ) \
31  REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
32 #define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
33 #endif
34 
35 #ifndef REG_LSB
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
37 #endif
38 
39 #ifndef REG_BIT
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
41 #endif
42 
43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs)
46 #endif
47 
48 #ifndef REG_ADDR_VECT
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \
50  REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
51  STRIDE_##scope##_##reg )
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
53  ((inst) + offs + (index) * stride)
54 #endif
55 
56 #define STRIDE_iop_mpu_rw_r 4
57 /* Register rw_r, scope iop_mpu, type rw */
58 #define reg_iop_mpu_rw_r_offset 0
59 
60 /* Register rw_ctrl, scope iop_mpu, type rw */
61 #define reg_iop_mpu_rw_ctrl___en___lsb 0
62 #define reg_iop_mpu_rw_ctrl___en___width 1
63 #define reg_iop_mpu_rw_ctrl___en___bit 0
64 #define reg_iop_mpu_rw_ctrl_offset 128
65 
66 /* Register r_pc, scope iop_mpu, type r */
67 #define reg_iop_mpu_r_pc___addr___lsb 0
68 #define reg_iop_mpu_r_pc___addr___width 12
69 #define reg_iop_mpu_r_pc_offset 132
70 
71 /* Register r_stat, scope iop_mpu, type r */
72 #define reg_iop_mpu_r_stat___instr_reg_busy___lsb 0
73 #define reg_iop_mpu_r_stat___instr_reg_busy___width 1
74 #define reg_iop_mpu_r_stat___instr_reg_busy___bit 0
75 #define reg_iop_mpu_r_stat___intr_busy___lsb 1
76 #define reg_iop_mpu_r_stat___intr_busy___width 1
77 #define reg_iop_mpu_r_stat___intr_busy___bit 1
78 #define reg_iop_mpu_r_stat___intr_vect___lsb 2
79 #define reg_iop_mpu_r_stat___intr_vect___width 16
80 #define reg_iop_mpu_r_stat_offset 136
81 
82 /* Register rw_instr, scope iop_mpu, type rw */
83 #define reg_iop_mpu_rw_instr_offset 140
84 
85 /* Register rw_immediate, scope iop_mpu, type rw */
86 #define reg_iop_mpu_rw_immediate_offset 144
87 
88 /* Register r_trace, scope iop_mpu, type r */
89 #define reg_iop_mpu_r_trace___intr_vect___lsb 0
90 #define reg_iop_mpu_r_trace___intr_vect___width 16
91 #define reg_iop_mpu_r_trace___pc___lsb 16
92 #define reg_iop_mpu_r_trace___pc___width 12
93 #define reg_iop_mpu_r_trace___en___lsb 28
94 #define reg_iop_mpu_r_trace___en___width 1
95 #define reg_iop_mpu_r_trace___en___bit 28
96 #define reg_iop_mpu_r_trace___instr_reg_busy___lsb 29
97 #define reg_iop_mpu_r_trace___instr_reg_busy___width 1
98 #define reg_iop_mpu_r_trace___instr_reg_busy___bit 29
99 #define reg_iop_mpu_r_trace___intr_busy___lsb 30
100 #define reg_iop_mpu_r_trace___intr_busy___width 1
101 #define reg_iop_mpu_r_trace___intr_busy___bit 30
102 #define reg_iop_mpu_r_trace_offset 148
103 
104 /* Register r_wr_stat, scope iop_mpu, type r */
105 #define reg_iop_mpu_r_wr_stat___r0___lsb 0
106 #define reg_iop_mpu_r_wr_stat___r0___width 1
107 #define reg_iop_mpu_r_wr_stat___r0___bit 0
108 #define reg_iop_mpu_r_wr_stat___r1___lsb 1
109 #define reg_iop_mpu_r_wr_stat___r1___width 1
110 #define reg_iop_mpu_r_wr_stat___r1___bit 1
111 #define reg_iop_mpu_r_wr_stat___r2___lsb 2
112 #define reg_iop_mpu_r_wr_stat___r2___width 1
113 #define reg_iop_mpu_r_wr_stat___r2___bit 2
114 #define reg_iop_mpu_r_wr_stat___r3___lsb 3
115 #define reg_iop_mpu_r_wr_stat___r3___width 1
116 #define reg_iop_mpu_r_wr_stat___r3___bit 3
117 #define reg_iop_mpu_r_wr_stat___r4___lsb 4
118 #define reg_iop_mpu_r_wr_stat___r4___width 1
119 #define reg_iop_mpu_r_wr_stat___r4___bit 4
120 #define reg_iop_mpu_r_wr_stat___r5___lsb 5
121 #define reg_iop_mpu_r_wr_stat___r5___width 1
122 #define reg_iop_mpu_r_wr_stat___r5___bit 5
123 #define reg_iop_mpu_r_wr_stat___r6___lsb 6
124 #define reg_iop_mpu_r_wr_stat___r6___width 1
125 #define reg_iop_mpu_r_wr_stat___r6___bit 6
126 #define reg_iop_mpu_r_wr_stat___r7___lsb 7
127 #define reg_iop_mpu_r_wr_stat___r7___width 1
128 #define reg_iop_mpu_r_wr_stat___r7___bit 7
129 #define reg_iop_mpu_r_wr_stat___r8___lsb 8
130 #define reg_iop_mpu_r_wr_stat___r8___width 1
131 #define reg_iop_mpu_r_wr_stat___r8___bit 8
132 #define reg_iop_mpu_r_wr_stat___r9___lsb 9
133 #define reg_iop_mpu_r_wr_stat___r9___width 1
134 #define reg_iop_mpu_r_wr_stat___r9___bit 9
135 #define reg_iop_mpu_r_wr_stat___r10___lsb 10
136 #define reg_iop_mpu_r_wr_stat___r10___width 1
137 #define reg_iop_mpu_r_wr_stat___r10___bit 10
138 #define reg_iop_mpu_r_wr_stat___r11___lsb 11
139 #define reg_iop_mpu_r_wr_stat___r11___width 1
140 #define reg_iop_mpu_r_wr_stat___r11___bit 11
141 #define reg_iop_mpu_r_wr_stat___r12___lsb 12
142 #define reg_iop_mpu_r_wr_stat___r12___width 1
143 #define reg_iop_mpu_r_wr_stat___r12___bit 12
144 #define reg_iop_mpu_r_wr_stat___r13___lsb 13
145 #define reg_iop_mpu_r_wr_stat___r13___width 1
146 #define reg_iop_mpu_r_wr_stat___r13___bit 13
147 #define reg_iop_mpu_r_wr_stat___r14___lsb 14
148 #define reg_iop_mpu_r_wr_stat___r14___width 1
149 #define reg_iop_mpu_r_wr_stat___r14___bit 14
150 #define reg_iop_mpu_r_wr_stat___r15___lsb 15
151 #define reg_iop_mpu_r_wr_stat___r15___width 1
152 #define reg_iop_mpu_r_wr_stat___r15___bit 15
153 #define reg_iop_mpu_r_wr_stat_offset 152
154 
155 #define STRIDE_iop_mpu_rw_thread 4
156 /* Register rw_thread, scope iop_mpu, type rw */
157 #define reg_iop_mpu_rw_thread___addr___lsb 0
158 #define reg_iop_mpu_rw_thread___addr___width 12
159 #define reg_iop_mpu_rw_thread_offset 156
160 
161 #define STRIDE_iop_mpu_rw_intr 4
162 /* Register rw_intr, scope iop_mpu, type rw */
163 #define reg_iop_mpu_rw_intr___addr___lsb 0
164 #define reg_iop_mpu_rw_intr___addr___width 12
165 #define reg_iop_mpu_rw_intr_offset 196
166 
167 
168 /* Constants */
169 #define regk_iop_mpu_no 0x00000000
170 #define regk_iop_mpu_r_pc_default 0x00000000
171 #define regk_iop_mpu_rw_ctrl_default 0x00000000
172 #define regk_iop_mpu_rw_intr_size 0x00000010
173 #define regk_iop_mpu_rw_r_size 0x00000010
174 #define regk_iop_mpu_rw_thread_default 0x00000000
175 #define regk_iop_mpu_rw_thread_size 0x00000004
176 #define regk_iop_mpu_yes 0x00000001
177 #endif /* __iop_mpu_defs_asm_h */