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iop_timer_grp_defs_asm.h
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1 #ifndef __iop_timer_grp_defs_asm_h
2 #define __iop_timer_grp_defs_asm_h
3 
4 /*
5  * This file is autogenerated from
6  * file: ../../inst/io_proc/rtl/iop_timer_grp.r
7  * id: iop_timer_grp.r,v 1.29 2005/02/16 09:13:27 niklaspa Exp
8  * last modfied: Mon Apr 11 16:08:46 2005
9  *
10  * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_timer_grp_defs_asm.h ../../inst/io_proc/rtl/iop_timer_grp.r
11  * id: $Id: iop_timer_grp_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
12  * Any changes here will be lost.
13  *
14  * -*- buffer-read-only: t -*-
15  */
16 
17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \
19  REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
20 #define REG_FIELD_X_( value, shift ) ((value) << shift)
21 #endif
22 
23 #ifndef REG_STATE
24 #define REG_STATE( scope, reg, field, symbolic_value ) \
25  REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
26 #define REG_STATE_X_( k, shift ) (k << shift)
27 #endif
28 
29 #ifndef REG_MASK
30 #define REG_MASK( scope, reg, field ) \
31  REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
32 #define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
33 #endif
34 
35 #ifndef REG_LSB
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
37 #endif
38 
39 #ifndef REG_BIT
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
41 #endif
42 
43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs)
46 #endif
47 
48 #ifndef REG_ADDR_VECT
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \
50  REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
51  STRIDE_##scope##_##reg )
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
53  ((inst) + offs + (index) * stride)
54 #endif
55 
56 /* Register rw_cfg, scope iop_timer_grp, type rw */
57 #define reg_iop_timer_grp_rw_cfg___clk_src___lsb 0
58 #define reg_iop_timer_grp_rw_cfg___clk_src___width 1
59 #define reg_iop_timer_grp_rw_cfg___clk_src___bit 0
60 #define reg_iop_timer_grp_rw_cfg___trig___lsb 1
61 #define reg_iop_timer_grp_rw_cfg___trig___width 2
62 #define reg_iop_timer_grp_rw_cfg___clk_gen_div___lsb 3
63 #define reg_iop_timer_grp_rw_cfg___clk_gen_div___width 8
64 #define reg_iop_timer_grp_rw_cfg___clk_div___lsb 11
65 #define reg_iop_timer_grp_rw_cfg___clk_div___width 8
66 #define reg_iop_timer_grp_rw_cfg_offset 0
67 
68 /* Register rw_half_period, scope iop_timer_grp, type rw */
69 #define reg_iop_timer_grp_rw_half_period___quota_lo___lsb 0
70 #define reg_iop_timer_grp_rw_half_period___quota_lo___width 15
71 #define reg_iop_timer_grp_rw_half_period___quota_hi___lsb 15
72 #define reg_iop_timer_grp_rw_half_period___quota_hi___width 15
73 #define reg_iop_timer_grp_rw_half_period___quota_hi_sel___lsb 30
74 #define reg_iop_timer_grp_rw_half_period___quota_hi_sel___width 1
75 #define reg_iop_timer_grp_rw_half_period___quota_hi_sel___bit 30
76 #define reg_iop_timer_grp_rw_half_period_offset 4
77 
78 /* Register rw_half_period_len, scope iop_timer_grp, type rw */
79 #define reg_iop_timer_grp_rw_half_period_len_offset 8
80 
81 #define STRIDE_iop_timer_grp_rw_tmr_cfg 4
82 /* Register rw_tmr_cfg, scope iop_timer_grp, type rw */
83 #define reg_iop_timer_grp_rw_tmr_cfg___clk_src___lsb 0
84 #define reg_iop_timer_grp_rw_tmr_cfg___clk_src___width 3
85 #define reg_iop_timer_grp_rw_tmr_cfg___strb___lsb 3
86 #define reg_iop_timer_grp_rw_tmr_cfg___strb___width 2
87 #define reg_iop_timer_grp_rw_tmr_cfg___run_mode___lsb 5
88 #define reg_iop_timer_grp_rw_tmr_cfg___run_mode___width 2
89 #define reg_iop_timer_grp_rw_tmr_cfg___out_mode___lsb 7
90 #define reg_iop_timer_grp_rw_tmr_cfg___out_mode___width 1
91 #define reg_iop_timer_grp_rw_tmr_cfg___out_mode___bit 7
92 #define reg_iop_timer_grp_rw_tmr_cfg___active_on_tmr___lsb 8
93 #define reg_iop_timer_grp_rw_tmr_cfg___active_on_tmr___width 2
94 #define reg_iop_timer_grp_rw_tmr_cfg___inv___lsb 10
95 #define reg_iop_timer_grp_rw_tmr_cfg___inv___width 1
96 #define reg_iop_timer_grp_rw_tmr_cfg___inv___bit 10
97 #define reg_iop_timer_grp_rw_tmr_cfg___en_by_tmr___lsb 11
98 #define reg_iop_timer_grp_rw_tmr_cfg___en_by_tmr___width 2
99 #define reg_iop_timer_grp_rw_tmr_cfg___dis_by_tmr___lsb 13
100 #define reg_iop_timer_grp_rw_tmr_cfg___dis_by_tmr___width 2
101 #define reg_iop_timer_grp_rw_tmr_cfg___en_only_by_reg___lsb 15
102 #define reg_iop_timer_grp_rw_tmr_cfg___en_only_by_reg___width 1
103 #define reg_iop_timer_grp_rw_tmr_cfg___en_only_by_reg___bit 15
104 #define reg_iop_timer_grp_rw_tmr_cfg___dis_only_by_reg___lsb 16
105 #define reg_iop_timer_grp_rw_tmr_cfg___dis_only_by_reg___width 1
106 #define reg_iop_timer_grp_rw_tmr_cfg___dis_only_by_reg___bit 16
107 #define reg_iop_timer_grp_rw_tmr_cfg___rst_at_en_strb___lsb 17
108 #define reg_iop_timer_grp_rw_tmr_cfg___rst_at_en_strb___width 1
109 #define reg_iop_timer_grp_rw_tmr_cfg___rst_at_en_strb___bit 17
110 #define reg_iop_timer_grp_rw_tmr_cfg_offset 12
111 
112 #define STRIDE_iop_timer_grp_rw_tmr_len 4
113 /* Register rw_tmr_len, scope iop_timer_grp, type rw */
114 #define reg_iop_timer_grp_rw_tmr_len___val___lsb 0
115 #define reg_iop_timer_grp_rw_tmr_len___val___width 16
116 #define reg_iop_timer_grp_rw_tmr_len_offset 44
117 
118 /* Register rw_cmd, scope iop_timer_grp, type rw */
119 #define reg_iop_timer_grp_rw_cmd___rst___lsb 0
120 #define reg_iop_timer_grp_rw_cmd___rst___width 4
121 #define reg_iop_timer_grp_rw_cmd___en___lsb 4
122 #define reg_iop_timer_grp_rw_cmd___en___width 4
123 #define reg_iop_timer_grp_rw_cmd___dis___lsb 8
124 #define reg_iop_timer_grp_rw_cmd___dis___width 4
125 #define reg_iop_timer_grp_rw_cmd___strb___lsb 12
126 #define reg_iop_timer_grp_rw_cmd___strb___width 4
127 #define reg_iop_timer_grp_rw_cmd_offset 60
128 
129 /* Register r_clk_gen_cnt, scope iop_timer_grp, type r */
130 #define reg_iop_timer_grp_r_clk_gen_cnt_offset 64
131 
132 #define STRIDE_iop_timer_grp_rs_tmr_cnt 8
133 /* Register rs_tmr_cnt, scope iop_timer_grp, type rs */
134 #define reg_iop_timer_grp_rs_tmr_cnt___val___lsb 0
135 #define reg_iop_timer_grp_rs_tmr_cnt___val___width 16
136 #define reg_iop_timer_grp_rs_tmr_cnt_offset 68
137 
138 #define STRIDE_iop_timer_grp_r_tmr_cnt 8
139 /* Register r_tmr_cnt, scope iop_timer_grp, type r */
140 #define reg_iop_timer_grp_r_tmr_cnt___val___lsb 0
141 #define reg_iop_timer_grp_r_tmr_cnt___val___width 16
142 #define reg_iop_timer_grp_r_tmr_cnt_offset 72
143 
144 /* Register rw_intr_mask, scope iop_timer_grp, type rw */
145 #define reg_iop_timer_grp_rw_intr_mask___tmr0___lsb 0
146 #define reg_iop_timer_grp_rw_intr_mask___tmr0___width 1
147 #define reg_iop_timer_grp_rw_intr_mask___tmr0___bit 0
148 #define reg_iop_timer_grp_rw_intr_mask___tmr1___lsb 1
149 #define reg_iop_timer_grp_rw_intr_mask___tmr1___width 1
150 #define reg_iop_timer_grp_rw_intr_mask___tmr1___bit 1
151 #define reg_iop_timer_grp_rw_intr_mask___tmr2___lsb 2
152 #define reg_iop_timer_grp_rw_intr_mask___tmr2___width 1
153 #define reg_iop_timer_grp_rw_intr_mask___tmr2___bit 2
154 #define reg_iop_timer_grp_rw_intr_mask___tmr3___lsb 3
155 #define reg_iop_timer_grp_rw_intr_mask___tmr3___width 1
156 #define reg_iop_timer_grp_rw_intr_mask___tmr3___bit 3
157 #define reg_iop_timer_grp_rw_intr_mask_offset 100
158 
159 /* Register rw_ack_intr, scope iop_timer_grp, type rw */
160 #define reg_iop_timer_grp_rw_ack_intr___tmr0___lsb 0
161 #define reg_iop_timer_grp_rw_ack_intr___tmr0___width 1
162 #define reg_iop_timer_grp_rw_ack_intr___tmr0___bit 0
163 #define reg_iop_timer_grp_rw_ack_intr___tmr1___lsb 1
164 #define reg_iop_timer_grp_rw_ack_intr___tmr1___width 1
165 #define reg_iop_timer_grp_rw_ack_intr___tmr1___bit 1
166 #define reg_iop_timer_grp_rw_ack_intr___tmr2___lsb 2
167 #define reg_iop_timer_grp_rw_ack_intr___tmr2___width 1
168 #define reg_iop_timer_grp_rw_ack_intr___tmr2___bit 2
169 #define reg_iop_timer_grp_rw_ack_intr___tmr3___lsb 3
170 #define reg_iop_timer_grp_rw_ack_intr___tmr3___width 1
171 #define reg_iop_timer_grp_rw_ack_intr___tmr3___bit 3
172 #define reg_iop_timer_grp_rw_ack_intr_offset 104
173 
174 /* Register r_intr, scope iop_timer_grp, type r */
175 #define reg_iop_timer_grp_r_intr___tmr0___lsb 0
176 #define reg_iop_timer_grp_r_intr___tmr0___width 1
177 #define reg_iop_timer_grp_r_intr___tmr0___bit 0
178 #define reg_iop_timer_grp_r_intr___tmr1___lsb 1
179 #define reg_iop_timer_grp_r_intr___tmr1___width 1
180 #define reg_iop_timer_grp_r_intr___tmr1___bit 1
181 #define reg_iop_timer_grp_r_intr___tmr2___lsb 2
182 #define reg_iop_timer_grp_r_intr___tmr2___width 1
183 #define reg_iop_timer_grp_r_intr___tmr2___bit 2
184 #define reg_iop_timer_grp_r_intr___tmr3___lsb 3
185 #define reg_iop_timer_grp_r_intr___tmr3___width 1
186 #define reg_iop_timer_grp_r_intr___tmr3___bit 3
187 #define reg_iop_timer_grp_r_intr_offset 108
188 
189 /* Register r_masked_intr, scope iop_timer_grp, type r */
190 #define reg_iop_timer_grp_r_masked_intr___tmr0___lsb 0
191 #define reg_iop_timer_grp_r_masked_intr___tmr0___width 1
192 #define reg_iop_timer_grp_r_masked_intr___tmr0___bit 0
193 #define reg_iop_timer_grp_r_masked_intr___tmr1___lsb 1
194 #define reg_iop_timer_grp_r_masked_intr___tmr1___width 1
195 #define reg_iop_timer_grp_r_masked_intr___tmr1___bit 1
196 #define reg_iop_timer_grp_r_masked_intr___tmr2___lsb 2
197 #define reg_iop_timer_grp_r_masked_intr___tmr2___width 1
198 #define reg_iop_timer_grp_r_masked_intr___tmr2___bit 2
199 #define reg_iop_timer_grp_r_masked_intr___tmr3___lsb 3
200 #define reg_iop_timer_grp_r_masked_intr___tmr3___width 1
201 #define reg_iop_timer_grp_r_masked_intr___tmr3___bit 3
202 #define reg_iop_timer_grp_r_masked_intr_offset 112
203 
204 
205 /* Constants */
206 #define regk_iop_timer_grp_clk200 0x00000000
207 #define regk_iop_timer_grp_clk_gen 0x00000002
208 #define regk_iop_timer_grp_complete 0x00000002
209 #define regk_iop_timer_grp_div_clk200 0x00000001
210 #define regk_iop_timer_grp_div_clk_gen 0x00000003
211 #define regk_iop_timer_grp_ext 0x00000001
212 #define regk_iop_timer_grp_hi 0x00000000
213 #define regk_iop_timer_grp_long_period 0x00000001
214 #define regk_iop_timer_grp_neg 0x00000002
215 #define regk_iop_timer_grp_no 0x00000000
216 #define regk_iop_timer_grp_once 0x00000003
217 #define regk_iop_timer_grp_pause 0x00000001
218 #define regk_iop_timer_grp_pos 0x00000001
219 #define regk_iop_timer_grp_pos_neg 0x00000003
220 #define regk_iop_timer_grp_pulse 0x00000000
221 #define regk_iop_timer_grp_r_tmr_cnt_size 0x00000004
222 #define regk_iop_timer_grp_rs_tmr_cnt_size 0x00000004
223 #define regk_iop_timer_grp_rw_cfg_default 0x00000002
224 #define regk_iop_timer_grp_rw_intr_mask_default 0x00000000
225 #define regk_iop_timer_grp_rw_tmr_cfg_default0 0x00018000
226 #define regk_iop_timer_grp_rw_tmr_cfg_default1 0x0001a900
227 #define regk_iop_timer_grp_rw_tmr_cfg_default2 0x0001d200
228 #define regk_iop_timer_grp_rw_tmr_cfg_default3 0x0001fb00
229 #define regk_iop_timer_grp_rw_tmr_cfg_size 0x00000004
230 #define regk_iop_timer_grp_rw_tmr_len_default 0x00000000
231 #define regk_iop_timer_grp_rw_tmr_len_size 0x00000004
232 #define regk_iop_timer_grp_short_period 0x00000000
233 #define regk_iop_timer_grp_stop 0x00000000
234 #define regk_iop_timer_grp_tmr 0x00000004
235 #define regk_iop_timer_grp_toggle 0x00000001
236 #define regk_iop_timer_grp_yes 0x00000001
237 #endif /* __iop_timer_grp_defs_asm_h */