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msnd.h
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1 /*********************************************************************
2  *
3  * msnd.h
4  *
5  * Turtle Beach MultiSound Sound Card Driver for Linux
6  *
7  * Some parts of this header file were derived from the Turtle Beach
8  * MultiSound Driver Development Kit.
9  *
10  * Copyright (C) 1998 Andrew Veliath
11  * Copyright (C) 1993 Turtle Beach Systems, Inc.
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License as published by
15  * the Free Software Foundation; either version 2 of the License, or
16  * (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software
25  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26  *
27  ********************************************************************/
28 #ifndef __MSND_H
29 #define __MSND_H
30 
31 #define DEFSAMPLERATE 44100
32 #define DEFSAMPLESIZE SNDRV_PCM_FORMAT_S16
33 #define DEFCHANNELS 1
34 
35 #define SRAM_BANK_SIZE 0x8000
36 #define SRAM_CNTL_START 0x7F00
37 #define SMA_STRUCT_START 0x7F40
38 
39 #define DSP_BASE_ADDR 0x4000
40 #define DSP_BANK_BASE 0x4000
41 
42 #define AGND 0x01
43 #define SIGNAL 0x02
44 
45 #define EXT_DSP_BIT_DCAL 0x0001
46 #define EXT_DSP_BIT_MIDI_CON 0x0002
47 
48 #define BUFFSIZE 0x8000
49 #define HOSTQ_SIZE 0x40
50 
51 #define DAP_BUFF_SIZE 0x2400
52 
53 #define DAPQ_STRUCT_SIZE 0x10
54 #define DARQ_STRUCT_SIZE 0x10
55 #define DAPQ_BUFF_SIZE (3 * 0x10)
56 #define DARQ_BUFF_SIZE (3 * 0x10)
57 #define MODQ_BUFF_SIZE 0x400
58 
59 #define DAPQ_DATA_BUFF 0x6C00
60 #define DARQ_DATA_BUFF 0x6C30
61 #define MODQ_DATA_BUFF 0x6C60
62 #define MIDQ_DATA_BUFF 0x7060
63 
64 #define DAPQ_OFFSET SRAM_CNTL_START
65 #define DARQ_OFFSET (SRAM_CNTL_START + 0x08)
66 #define MODQ_OFFSET (SRAM_CNTL_START + 0x10)
67 #define MIDQ_OFFSET (SRAM_CNTL_START + 0x18)
68 #define DSPQ_OFFSET (SRAM_CNTL_START + 0x20)
69 
70 #define HP_ICR 0x00
71 #define HP_CVR 0x01
72 #define HP_ISR 0x02
73 #define HP_IVR 0x03
74 #define HP_NU 0x04
75 #define HP_INFO 0x04
76 #define HP_TXH 0x05
77 #define HP_RXH 0x05
78 #define HP_TXM 0x06
79 #define HP_RXM 0x06
80 #define HP_TXL 0x07
81 #define HP_RXL 0x07
82 
83 #define HP_ICR_DEF 0x00
84 #define HP_CVR_DEF 0x12
85 #define HP_ISR_DEF 0x06
86 #define HP_IVR_DEF 0x0f
87 #define HP_NU_DEF 0x00
88 
89 #define HP_IRQM 0x09
90 
91 #define HPR_BLRC 0x08
92 #define HPR_SPR1 0x09
93 #define HPR_SPR2 0x0A
94 #define HPR_TCL0 0x0B
95 #define HPR_TCL1 0x0C
96 #define HPR_TCL2 0x0D
97 #define HPR_TCL3 0x0E
98 #define HPR_TCL4 0x0F
99 
100 #define HPICR_INIT 0x80
101 #define HPICR_HM1 0x40
102 #define HPICR_HM0 0x20
103 #define HPICR_HF1 0x10
104 #define HPICR_HF0 0x08
105 #define HPICR_TREQ 0x02
106 #define HPICR_RREQ 0x01
107 
108 #define HPCVR_HC 0x80
109 
110 #define HPISR_HREQ 0x80
111 #define HPISR_DMA 0x40
112 #define HPISR_HF3 0x10
113 #define HPISR_HF2 0x08
114 #define HPISR_TRDY 0x04
115 #define HPISR_TXDE 0x02
116 #define HPISR_RXDF 0x01
117 
118 #define HPIO_290 0
119 #define HPIO_260 1
120 #define HPIO_250 2
121 #define HPIO_240 3
122 #define HPIO_230 4
123 #define HPIO_220 5
124 #define HPIO_210 6
125 #define HPIO_3E0 7
126 
127 #define HPMEM_NONE 0
128 #define HPMEM_B000 1
129 #define HPMEM_C800 2
130 #define HPMEM_D000 3
131 #define HPMEM_D400 4
132 #define HPMEM_D800 5
133 #define HPMEM_E000 6
134 #define HPMEM_E800 7
135 
136 #define HPIRQ_NONE 0
137 #define HPIRQ_5 1
138 #define HPIRQ_7 2
139 #define HPIRQ_9 3
140 #define HPIRQ_10 4
141 #define HPIRQ_11 5
142 #define HPIRQ_12 6
143 #define HPIRQ_15 7
144 
145 #define HIMT_PLAY_DONE 0x00
146 #define HIMT_RECORD_DONE 0x01
147 #define HIMT_MIDI_EOS 0x02
148 #define HIMT_MIDI_OUT 0x03
149 
150 #define HIMT_MIDI_IN_UCHAR 0x0E
151 #define HIMT_DSP 0x0F
152 
153 #define HDEX_BASE 0x92
154 #define HDEX_PLAY_START (0 + HDEX_BASE)
155 #define HDEX_PLAY_STOP (1 + HDEX_BASE)
156 #define HDEX_PLAY_PAUSE (2 + HDEX_BASE)
157 #define HDEX_PLAY_RESUME (3 + HDEX_BASE)
158 #define HDEX_RECORD_START (4 + HDEX_BASE)
159 #define HDEX_RECORD_STOP (5 + HDEX_BASE)
160 #define HDEX_MIDI_IN_START (6 + HDEX_BASE)
161 #define HDEX_MIDI_IN_STOP (7 + HDEX_BASE)
162 #define HDEX_MIDI_OUT_START (8 + HDEX_BASE)
163 #define HDEX_MIDI_OUT_STOP (9 + HDEX_BASE)
164 #define HDEX_AUX_REQ (10 + HDEX_BASE)
165 
166 #define HDEXAR_CLEAR_PEAKS 1
167 #define HDEXAR_IN_SET_POTS 2
168 #define HDEXAR_AUX_SET_POTS 3
169 #define HDEXAR_CAL_A_TO_D 4
170 #define HDEXAR_RD_EXT_DSP_BITS 5
171 
172 /* Pinnacle only HDEXAR defs */
173 #define HDEXAR_SET_ANA_IN 0
174 #define HDEXAR_SET_SYNTH_IN 4
175 #define HDEXAR_READ_DAT_IN 5
176 #define HDEXAR_MIC_SET_POTS 6
177 #define HDEXAR_SET_DAT_IN 7
178 
179 #define HDEXAR_SET_SYNTH_48 8
180 #define HDEXAR_SET_SYNTH_44 9
181 
182 #define HIWORD(l) ((u16)((((u32)(l)) >> 16) & 0xFFFF))
183 #define LOWORD(l) ((u16)(u32)(l))
184 #define HIBYTE(w) ((u8)(((u16)(w) >> 8) & 0xFF))
185 #define LOBYTE(w) ((u8)(w))
186 #define MAKELONG(low, hi) ((long)(((u16)(low))|(((u32)((u16)(hi)))<<16)))
187 #define MAKEWORD(low, hi) ((u16)(((u8)(low))|(((u16)((u8)(hi)))<<8)))
188 
189 #define PCTODSP_OFFSET(w) (u16)((w)/2)
190 #define PCTODSP_BASED(w) (u16)(((w)/2) + DSP_BASE_ADDR)
191 #define DSPTOPC_BASED(w) (((w) - DSP_BASE_ADDR) * 2)
192 
193 #ifdef SLOWIO
194 # undef outb
195 # undef inb
196 # define outb outb_p
197 # define inb inb_p
198 #endif
199 
200 /* JobQueueStruct */
201 #define JQS_wStart 0x00
202 #define JQS_wSize 0x02
203 #define JQS_wHead 0x04
204 #define JQS_wTail 0x06
205 #define JQS__size 0x08
206 
207 /* DAQueueDataStruct */
208 #define DAQDS_wStart 0x00
209 #define DAQDS_wSize 0x02
210 #define DAQDS_wFormat 0x04
211 #define DAQDS_wSampleSize 0x06
212 #define DAQDS_wChannels 0x08
213 #define DAQDS_wSampleRate 0x0A
214 #define DAQDS_wIntMsg 0x0C
215 #define DAQDS_wFlags 0x0E
216 #define DAQDS__size 0x10
217 
218 #include <sound/pcm.h>
219 
220 struct snd_msnd {
231  struct snd_card *card;
234 
235  /* Hardware resources */
236  long io;
237  int memid, irqid;
238  int irq, irq_ref;
239  unsigned long base;
240 
241  /* Motorola 56k DSP SMA */
242  void __iomem *SMA;
243  void __iomem *DAPQ;
244  void __iomem *DARQ;
245  void __iomem *MODQ;
246  void __iomem *MIDQ;
247  void __iomem *DSPQ;
249 
250  /* State variables */
253  unsigned long flags;
254 #define F_RESETTING 0
255 #define F_HAVEDIGITAL 1
256 #define F_AUDIO_WRITE_INUSE 2
257 #define F_WRITING 3
258 #define F_WRITEBLOCK 4
259 #define F_WRITEFLUSH 5
260 #define F_AUDIO_READ_INUSE 6
261 #define F_READING 7
262 #define F_READBLOCK 8
263 #define F_EXT_MIDI_INUSE 9
264 #define F_HDR_MIDI_INUSE 10
265 #define F_DISABLE_WRITE_NDELAY 11
268  int nresets;
269  unsigned recsrc;
270 #define LEVEL_ENTRIES 32
279 
283 
284 };
285 
286 void snd_msnd_init_queue(void *base, int start, int size);
287 
289 int snd_msnd_send_word(struct snd_msnd *chip,
290  unsigned char high,
291  unsigned char mid,
292  unsigned char low);
294  const u8 *bin, int len);
295 int snd_msnd_enable_irq(struct snd_msnd *chip);
296 int snd_msnd_disable_irq(struct snd_msnd *chip);
297 void snd_msnd_dsp_halt(struct snd_msnd *chip, struct file *file);
298 int snd_msnd_DAPQ(struct snd_msnd *chip, int start);
299 int snd_msnd_DARQ(struct snd_msnd *chip, int start);
300 int snd_msnd_pcm(struct snd_card *card, int device, struct snd_pcm **rpcm);
301 
302 int snd_msndmidi_new(struct snd_card *card, int device);
303 void snd_msndmidi_input_read(void *mpu);
304 
305 void snd_msndmix_setup(struct snd_msnd *chip);
307 int snd_msndmix_force_recsrc(struct snd_msnd *chip, int recsrc);
308 #endif /* __MSND_H */