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8 #define SBIT(state) (1 << state)
9 #define ALL_STATES 0x03ffffff
11 #define PROTO_DIS_EURO 0x08
13 #define L3_DEB_WARN 0x01
14 #define L3_DEB_PROTERR 0x02
15 #define L3_DEB_STATE 0x04
16 #define L3_DEB_CHARGE 0x08
17 #define L3_DEB_CHECK 0x10
18 #define L3_DEB_SI 0x20
26 #define l3_debug(st, fmt, args...) HiSax_putstatus(st->l1.hardware, "l3 ", fmt, ## args)