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9 #ifndef _ASM_IA64_SN_L1_H
10 #define _ASM_IA64_SN_L1_H
13 #define L1_BRICKTYPE_PX 0x23
14 #define L1_BRICKTYPE_PE 0x25
15 #define L1_BRICKTYPE_N_p0 0x26
16 #define L1_BRICKTYPE_IP45 0x34
17 #define L1_BRICKTYPE_IP41 0x35
18 #define L1_BRICKTYPE_TWISTER 0x36
19 #define L1_BRICKTYPE_IX 0x3d
20 #define L1_BRICKTYPE_IP34 0x61
21 #define L1_BRICKTYPE_GA 0x62
22 #define L1_BRICKTYPE_C 0x63
23 #define L1_BRICKTYPE_OPUS_TIO 0x66
24 #define L1_BRICKTYPE_I 0x69
25 #define L1_BRICKTYPE_N 0x6e
26 #define L1_BRICKTYPE_OPUS 0x6f
27 #define L1_BRICKTYPE_P 0x70
28 #define L1_BRICKTYPE_R 0x72
29 #define L1_BRICKTYPE_CHI_CG 0x76
30 #define L1_BRICKTYPE_X 0x78
31 #define L1_BRICKTYPE_X2 0x79
32 #define L1_BRICKTYPE_SA 0x5e
33 #define L1_BRICKTYPE_PA 0x6a
34 #define L1_BRICKTYPE_IA 0x6b
35 #define L1_BRICKTYPE_ATHENA 0x2b
36 #define L1_BRICKTYPE_DAYTONA 0x7a
37 #define L1_BRICKTYPE_1932 0x2c
38 #define L1_BRICKTYPE_191010 0x2e
41 #define L1_BOARDTYPE_IP69 0x0100
42 #define L1_BOARDTYPE_IP63 0x0200
43 #define L1_BOARDTYPE_BASEIO 0x0300
44 #define L1_BOARDTYPE_PCIE2SLOT 0x0400
45 #define L1_BOARDTYPE_PCIX3SLOT 0x0500
46 #define L1_BOARDTYPE_PCIXPCIE4SLOT 0x0600
47 #define L1_BOARDTYPE_ABACUS 0x0700
48 #define L1_BOARDTYPE_DAYTONA 0x0800
49 #define L1_BOARDTYPE_INVAL (-1)