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leon_amba.h
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1 /*
2 *Copyright (C) 2004 Konrad Eisele ([email protected],[email protected]), Gaisler Research
3 *Copyright (C) 2004 Stefan Holst ([email protected]), Uni-Stuttgart
4 *Copyright (C) 2009 Daniel Hellstrom ([email protected]),Konrad Eisele ([email protected]) Aeroflex Gaisler AB
5 */
6 
7 #ifndef LEON_AMBA_H_INCLUDE
8 #define LEON_AMBA_H_INCLUDE
9 
10 #ifndef __ASSEMBLY__
11 
13  unsigned int phys_addr; /* The physical address of this register */
14  unsigned int reg_size; /* How many bytes does this register take up? */
15 };
16 
17 #endif
18 
19 /*
20  * The following defines the bits in the LEON UART Status Registers.
21  */
22 
23 #define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */
24 #define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
25 #define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
26 #define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */
27 #define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */
28 #define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */
29 #define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
30 #define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
31 
32 /*
33  * The following defines the bits in the LEON UART Ctrl Registers.
34  */
35 
36 #define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */
37 #define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */
38 #define LEON_REG_UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */
39 #define LEON_REG_UART_CTRL_TI 0x00000008 /* Transmitter irq */
40 #define LEON_REG_UART_CTRL_PS 0x00000010 /* Parity select */
41 #define LEON_REG_UART_CTRL_PE 0x00000020 /* Parity enable */
42 #define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */
43 #define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */
44 
45 #define LEON3_GPTIMER_EN 1
46 #define LEON3_GPTIMER_RL 2
47 #define LEON3_GPTIMER_LD 4
48 #define LEON3_GPTIMER_IRQEN 8
49 #define LEON3_GPTIMER_SEPIRQ 8
50 
51 #define LEON23_REG_TIMER_CONTROL_EN 0x00000001 /* 1 = enable counting */
52 /* 0 = hold scalar and counter */
53 #define LEON23_REG_TIMER_CONTROL_RL 0x00000002 /* 1 = reload at 0 */
54  /* 0 = stop at 0 */
55 #define LEON23_REG_TIMER_CONTROL_LD 0x00000004 /* 1 = load counter */
56  /* 0 = no function */
57 #define LEON23_REG_TIMER_CONTROL_IQ 0x00000008 /* 1 = irq enable */
58  /* 0 = no function */
59 
60 /*
61  * The following defines the bits in the LEON PS/2 Status Registers.
62  */
63 
64 #define LEON_REG_PS2_STATUS_DR 0x00000001 /* Data Ready */
65 #define LEON_REG_PS2_STATUS_PE 0x00000002 /* Parity error */
66 #define LEON_REG_PS2_STATUS_FE 0x00000004 /* Framing error */
67 #define LEON_REG_PS2_STATUS_KI 0x00000008 /* Keyboard inhibit */
68 #define LEON_REG_PS2_STATUS_RF 0x00000010 /* RX buffer full */
69 #define LEON_REG_PS2_STATUS_TF 0x00000020 /* TX buffer full */
70 
71 /*
72  * The following defines the bits in the LEON PS/2 Ctrl Registers.
73  */
74 
75 #define LEON_REG_PS2_CTRL_RE 0x00000001 /* Receiver enable */
76 #define LEON_REG_PS2_CTRL_TE 0x00000002 /* Transmitter enable */
77 #define LEON_REG_PS2_CTRL_RI 0x00000004 /* Keyboard receive irq */
78 #define LEON_REG_PS2_CTRL_TI 0x00000008 /* Keyboard transmit irq */
79 
80 #define LEON3_IRQMPSTATUS_CPUNR 28
81 #define LEON3_IRQMPSTATUS_BROADCAST 27
82 
83 #define GPTIMER_CONFIG_IRQNT(a) (((a) >> 3) & 0x1f)
84 #define GPTIMER_CONFIG_ISSEP(a) ((a) & (1 << 8))
85 #define GPTIMER_CONFIG_NTIMERS(a) ((a) & (0x7))
86 #define LEON3_GPTIMER_CTRL_PENDING 0x10
87 #define LEON3_GPTIMER_CONFIG_NRTIMERS(c) ((c)->config & 0x7)
88 #define LEON3_GPTIMER_CTRL_ISPENDING(r) (((r)&LEON3_GPTIMER_CTRL_PENDING) ? 1 : 0)
89 
90 #ifndef __ASSEMBLY__
91 
102  u32 icsel[2];
108  u32 mask[16];
109  u32 force[16];
110  /* Extended IRQ registers */
111  u32 intid[16]; /* 0xc0 */
112  u32 unused[(0x1000-0x100)/4];
113 };
114 
120 };
121 
127 };
128 
135 };
136 
137 /*
138  * Types and structure used for AMBA Plug & Play bus scanning
139  */
140 
141 #define AMBA_MAXAPB_DEVS 64
142 #define AMBA_MAXAPB_DEVS_PERBUS 16
143 
145  int devnr; /* number of devices on AHB or APB bus */
146  unsigned int *addr[16]; /* addresses to the devices configuration tables */
147  unsigned int allocbits[1]; /* 0=unallocated, 1=allocated driver */
148 };
149 
151  int devnr; /* number of devices on AHB or APB bus */
152  unsigned int *addr[AMBA_MAXAPB_DEVS]; /* addresses to the devices configuration tables */
153  unsigned int apbmst[AMBA_MAXAPB_DEVS]; /* apb master if a entry is a apb slave */
154  unsigned int apbmstidx[AMBA_MAXAPB_DEVS]; /* apb master idx if a entry is a apb slave */
155  unsigned int allocbits[4]; /* 0=unallocated, 1=allocated driver */
156 };
157 
159  struct amba_confarea_type *next;/* next bus in chain */
163  unsigned int apbmst;
164 };
165 
166 /* collect apb slaves */
168  unsigned int start, irq, bus_id;
170 };
171 
172 /* collect ahb slaves */
174  unsigned int start[4], irq, bus_id;
176 };
177 
178 struct device_node;
179 void _amba_init(struct device_node *dp, struct device_node ***nextp);
180 
181 extern unsigned long amba_system_id;
184 extern struct amba_apb_device leon_percpu_timer_dev[16];
185 extern int leondebug_irq_disable;
186 extern int leon_debug_irqout;
187 extern unsigned long leon3_gptimer_irq;
188 extern unsigned int sparc_leon_eirq;
189 
190 #endif /* __ASSEMBLY__ */
191 
192 #define LEON3_IO_AREA 0xfff00000
193 #define LEON3_CONF_AREA 0xff000
194 #define LEON3_AHB_SLAVE_CONF_AREA (1 << 11)
195 
196 #define LEON3_AHB_CONF_WORDS 8
197 #define LEON3_APB_CONF_WORDS 2
198 #define LEON3_AHB_MASTERS 16
199 #define LEON3_AHB_SLAVES 16
200 #define LEON3_APB_SLAVES 16
201 #define LEON3_APBUARTS 8
202 
203 /* Vendor codes */
204 #define VENDOR_GAISLER 1
205 #define VENDOR_PENDER 2
206 #define VENDOR_ESA 4
207 #define VENDOR_OPENCORES 8
208 
209 /* Gaisler Research device id's */
210 #define GAISLER_LEON3 0x003
211 #define GAISLER_LEON3DSU 0x004
212 #define GAISLER_ETHAHB 0x005
213 #define GAISLER_APBMST 0x006
214 #define GAISLER_AHBUART 0x007
215 #define GAISLER_SRCTRL 0x008
216 #define GAISLER_SDCTRL 0x009
217 #define GAISLER_APBUART 0x00C
218 #define GAISLER_IRQMP 0x00D
219 #define GAISLER_AHBRAM 0x00E
220 #define GAISLER_GPTIMER 0x011
221 #define GAISLER_PCITRG 0x012
222 #define GAISLER_PCISBRG 0x013
223 #define GAISLER_PCIFBRG 0x014
224 #define GAISLER_PCITRACE 0x015
225 #define GAISLER_PCIDMA 0x016
226 #define GAISLER_AHBTRACE 0x017
227 #define GAISLER_ETHDSU 0x018
228 #define GAISLER_PIOPORT 0x01A
229 #define GAISLER_GRGPIO 0x01A
230 #define GAISLER_AHBJTAG 0x01c
231 #define GAISLER_ETHMAC 0x01D
232 #define GAISLER_AHB2AHB 0x020
233 #define GAISLER_USBDC 0x021
234 #define GAISLER_ATACTRL 0x024
235 #define GAISLER_DDRSPA 0x025
236 #define GAISLER_USBEHC 0x026
237 #define GAISLER_USBUHC 0x027
238 #define GAISLER_I2CMST 0x028
239 #define GAISLER_SPICTRL 0x02D
240 #define GAISLER_DDR2SPA 0x02E
241 #define GAISLER_SPIMCTRL 0x045
242 #define GAISLER_LEON4 0x048
243 #define GAISLER_LEON4DSU 0x049
244 #define GAISLER_AHBSTAT 0x052
245 #define GAISLER_FTMCTRL 0x054
246 #define GAISLER_KBD 0x060
247 #define GAISLER_VGA 0x061
248 #define GAISLER_SVGA 0x063
249 #define GAISLER_GRSYSMON 0x066
250 #define GAISLER_GRACECTRL 0x067
251 
252 #define GAISLER_L2TIME 0xffd /* internal device: leon2 timer */
253 #define GAISLER_L2C 0xffe /* internal device: leon2compat */
254 #define GAISLER_PLUGPLAY 0xfff /* internal device: plug & play configarea */
255 
256 /* Chip IDs */
257 #define AEROFLEX_UT699 0x0699
258 #define LEON4_NEXTREME1 0x0102
259 #define GAISLER_GR712RC 0x0712
260 
261 #define amba_vendor(x) (((x) >> 24) & 0xff)
262 
263 #define amba_device(x) (((x) >> 12) & 0xfff)
264 
265 #endif