Go to the documentation of this file.
15 #ifndef __MFD_WM831X_REGULATOR_H__
16 #define __MFD_WM831X_REGULATOR_H__
21 #define WM831X_CS1_ENA 0x8000
22 #define WM831X_CS1_ENA_MASK 0x8000
23 #define WM831X_CS1_ENA_SHIFT 15
24 #define WM831X_CS1_ENA_WIDTH 1
25 #define WM831X_CS1_DRIVE 0x4000
26 #define WM831X_CS1_DRIVE_MASK 0x4000
27 #define WM831X_CS1_DRIVE_SHIFT 14
28 #define WM831X_CS1_DRIVE_WIDTH 1
29 #define WM831X_CS1_SLPENA 0x1000
30 #define WM831X_CS1_SLPENA_MASK 0x1000
31 #define WM831X_CS1_SLPENA_SHIFT 12
32 #define WM831X_CS1_SLPENA_WIDTH 1
33 #define WM831X_CS1_OFF_RAMP_MASK 0x0C00
34 #define WM831X_CS1_OFF_RAMP_SHIFT 10
35 #define WM831X_CS1_OFF_RAMP_WIDTH 2
36 #define WM831X_CS1_ON_RAMP_MASK 0x0300
37 #define WM831X_CS1_ON_RAMP_SHIFT 8
38 #define WM831X_CS1_ON_RAMP_WIDTH 2
39 #define WM831X_CS1_ISEL_MASK 0x003F
40 #define WM831X_CS1_ISEL_SHIFT 0
41 #define WM831X_CS1_ISEL_WIDTH 6
46 #define WM831X_CS2_ENA 0x8000
47 #define WM831X_CS2_ENA_MASK 0x8000
48 #define WM831X_CS2_ENA_SHIFT 15
49 #define WM831X_CS2_ENA_WIDTH 1
50 #define WM831X_CS2_DRIVE 0x4000
51 #define WM831X_CS2_DRIVE_MASK 0x4000
52 #define WM831X_CS2_DRIVE_SHIFT 14
53 #define WM831X_CS2_DRIVE_WIDTH 1
54 #define WM831X_CS2_SLPENA 0x1000
55 #define WM831X_CS2_SLPENA_MASK 0x1000
56 #define WM831X_CS2_SLPENA_SHIFT 12
57 #define WM831X_CS2_SLPENA_WIDTH 1
58 #define WM831X_CS2_OFF_RAMP_MASK 0x0C00
59 #define WM831X_CS2_OFF_RAMP_SHIFT 10
60 #define WM831X_CS2_OFF_RAMP_WIDTH 2
61 #define WM831X_CS2_ON_RAMP_MASK 0x0300
62 #define WM831X_CS2_ON_RAMP_SHIFT 8
63 #define WM831X_CS2_ON_RAMP_WIDTH 2
64 #define WM831X_CS2_ISEL_MASK 0x003F
65 #define WM831X_CS2_ISEL_SHIFT 0
66 #define WM831X_CS2_ISEL_WIDTH 6
71 #define WM831X_EPE2_ENA 0x0080
72 #define WM831X_EPE2_ENA_MASK 0x0080
73 #define WM831X_EPE2_ENA_SHIFT 7
74 #define WM831X_EPE2_ENA_WIDTH 1
75 #define WM831X_EPE1_ENA 0x0040
76 #define WM831X_EPE1_ENA_MASK 0x0040
77 #define WM831X_EPE1_ENA_SHIFT 6
78 #define WM831X_EPE1_ENA_WIDTH 1
79 #define WM831X_DC4_ENA 0x0008
80 #define WM831X_DC4_ENA_MASK 0x0008
81 #define WM831X_DC4_ENA_SHIFT 3
82 #define WM831X_DC4_ENA_WIDTH 1
83 #define WM831X_DC3_ENA 0x0004
84 #define WM831X_DC3_ENA_MASK 0x0004
85 #define WM831X_DC3_ENA_SHIFT 2
86 #define WM831X_DC3_ENA_WIDTH 1
87 #define WM831X_DC2_ENA 0x0002
88 #define WM831X_DC2_ENA_MASK 0x0002
89 #define WM831X_DC2_ENA_SHIFT 1
90 #define WM831X_DC2_ENA_WIDTH 1
91 #define WM831X_DC1_ENA 0x0001
92 #define WM831X_DC1_ENA_MASK 0x0001
93 #define WM831X_DC1_ENA_SHIFT 0
94 #define WM831X_DC1_ENA_WIDTH 1
99 #define WM831X_LDO11_ENA 0x0400
100 #define WM831X_LDO11_ENA_MASK 0x0400
101 #define WM831X_LDO11_ENA_SHIFT 10
102 #define WM831X_LDO11_ENA_WIDTH 1
103 #define WM831X_LDO10_ENA 0x0200
104 #define WM831X_LDO10_ENA_MASK 0x0200
105 #define WM831X_LDO10_ENA_SHIFT 9
106 #define WM831X_LDO10_ENA_WIDTH 1
107 #define WM831X_LDO9_ENA 0x0100
108 #define WM831X_LDO9_ENA_MASK 0x0100
109 #define WM831X_LDO9_ENA_SHIFT 8
110 #define WM831X_LDO9_ENA_WIDTH 1
111 #define WM831X_LDO8_ENA 0x0080
112 #define WM831X_LDO8_ENA_MASK 0x0080
113 #define WM831X_LDO8_ENA_SHIFT 7
114 #define WM831X_LDO8_ENA_WIDTH 1
115 #define WM831X_LDO7_ENA 0x0040
116 #define WM831X_LDO7_ENA_MASK 0x0040
117 #define WM831X_LDO7_ENA_SHIFT 6
118 #define WM831X_LDO7_ENA_WIDTH 1
119 #define WM831X_LDO6_ENA 0x0020
120 #define WM831X_LDO6_ENA_MASK 0x0020
121 #define WM831X_LDO6_ENA_SHIFT 5
122 #define WM831X_LDO6_ENA_WIDTH 1
123 #define WM831X_LDO5_ENA 0x0010
124 #define WM831X_LDO5_ENA_MASK 0x0010
125 #define WM831X_LDO5_ENA_SHIFT 4
126 #define WM831X_LDO5_ENA_WIDTH 1
127 #define WM831X_LDO4_ENA 0x0008
128 #define WM831X_LDO4_ENA_MASK 0x0008
129 #define WM831X_LDO4_ENA_SHIFT 3
130 #define WM831X_LDO4_ENA_WIDTH 1
131 #define WM831X_LDO3_ENA 0x0004
132 #define WM831X_LDO3_ENA_MASK 0x0004
133 #define WM831X_LDO3_ENA_SHIFT 2
134 #define WM831X_LDO3_ENA_WIDTH 1
135 #define WM831X_LDO2_ENA 0x0002
136 #define WM831X_LDO2_ENA_MASK 0x0002
137 #define WM831X_LDO2_ENA_SHIFT 1
138 #define WM831X_LDO2_ENA_WIDTH 1
139 #define WM831X_LDO1_ENA 0x0001
140 #define WM831X_LDO1_ENA_MASK 0x0001
141 #define WM831X_LDO1_ENA_SHIFT 0
142 #define WM831X_LDO1_ENA_WIDTH 1
147 #define WM831X_EPE2_STS 0x0080
148 #define WM831X_EPE2_STS_MASK 0x0080
149 #define WM831X_EPE2_STS_SHIFT 7
150 #define WM831X_EPE2_STS_WIDTH 1
151 #define WM831X_EPE1_STS 0x0040
152 #define WM831X_EPE1_STS_MASK 0x0040
153 #define WM831X_EPE1_STS_SHIFT 6
154 #define WM831X_EPE1_STS_WIDTH 1
155 #define WM831X_DC4_STS 0x0008
156 #define WM831X_DC4_STS_MASK 0x0008
157 #define WM831X_DC4_STS_SHIFT 3
158 #define WM831X_DC4_STS_WIDTH 1
159 #define WM831X_DC3_STS 0x0004
160 #define WM831X_DC3_STS_MASK 0x0004
161 #define WM831X_DC3_STS_SHIFT 2
162 #define WM831X_DC3_STS_WIDTH 1
163 #define WM831X_DC2_STS 0x0002
164 #define WM831X_DC2_STS_MASK 0x0002
165 #define WM831X_DC2_STS_SHIFT 1
166 #define WM831X_DC2_STS_WIDTH 1
167 #define WM831X_DC1_STS 0x0001
168 #define WM831X_DC1_STS_MASK 0x0001
169 #define WM831X_DC1_STS_SHIFT 0
170 #define WM831X_DC1_STS_WIDTH 1
175 #define WM831X_LDO11_STS 0x0400
176 #define WM831X_LDO11_STS_MASK 0x0400
177 #define WM831X_LDO11_STS_SHIFT 10
178 #define WM831X_LDO11_STS_WIDTH 1
179 #define WM831X_LDO10_STS 0x0200
180 #define WM831X_LDO10_STS_MASK 0x0200
181 #define WM831X_LDO10_STS_SHIFT 9
182 #define WM831X_LDO10_STS_WIDTH 1
183 #define WM831X_LDO9_STS 0x0100
184 #define WM831X_LDO9_STS_MASK 0x0100
185 #define WM831X_LDO9_STS_SHIFT 8
186 #define WM831X_LDO9_STS_WIDTH 1
187 #define WM831X_LDO8_STS 0x0080
188 #define WM831X_LDO8_STS_MASK 0x0080
189 #define WM831X_LDO8_STS_SHIFT 7
190 #define WM831X_LDO8_STS_WIDTH 1
191 #define WM831X_LDO7_STS 0x0040
192 #define WM831X_LDO7_STS_MASK 0x0040
193 #define WM831X_LDO7_STS_SHIFT 6
194 #define WM831X_LDO7_STS_WIDTH 1
195 #define WM831X_LDO6_STS 0x0020
196 #define WM831X_LDO6_STS_MASK 0x0020
197 #define WM831X_LDO6_STS_SHIFT 5
198 #define WM831X_LDO6_STS_WIDTH 1
199 #define WM831X_LDO5_STS 0x0010
200 #define WM831X_LDO5_STS_MASK 0x0010
201 #define WM831X_LDO5_STS_SHIFT 4
202 #define WM831X_LDO5_STS_WIDTH 1
203 #define WM831X_LDO4_STS 0x0008
204 #define WM831X_LDO4_STS_MASK 0x0008
205 #define WM831X_LDO4_STS_SHIFT 3
206 #define WM831X_LDO4_STS_WIDTH 1
207 #define WM831X_LDO3_STS 0x0004
208 #define WM831X_LDO3_STS_MASK 0x0004
209 #define WM831X_LDO3_STS_SHIFT 2
210 #define WM831X_LDO3_STS_WIDTH 1
211 #define WM831X_LDO2_STS 0x0002
212 #define WM831X_LDO2_STS_MASK 0x0002
213 #define WM831X_LDO2_STS_SHIFT 1
214 #define WM831X_LDO2_STS_WIDTH 1
215 #define WM831X_LDO1_STS 0x0001
216 #define WM831X_LDO1_STS_MASK 0x0001
217 #define WM831X_LDO1_STS_SHIFT 0
218 #define WM831X_LDO1_STS_WIDTH 1
223 #define WM831X_DC2_OV_STS 0x2000
224 #define WM831X_DC2_OV_STS_MASK 0x2000
225 #define WM831X_DC2_OV_STS_SHIFT 13
226 #define WM831X_DC2_OV_STS_WIDTH 1
227 #define WM831X_DC1_OV_STS 0x1000
228 #define WM831X_DC1_OV_STS_MASK 0x1000
229 #define WM831X_DC1_OV_STS_SHIFT 12
230 #define WM831X_DC1_OV_STS_WIDTH 1
231 #define WM831X_DC2_HC_STS 0x0200
232 #define WM831X_DC2_HC_STS_MASK 0x0200
233 #define WM831X_DC2_HC_STS_SHIFT 9
234 #define WM831X_DC2_HC_STS_WIDTH 1
235 #define WM831X_DC1_HC_STS 0x0100
236 #define WM831X_DC1_HC_STS_MASK 0x0100
237 #define WM831X_DC1_HC_STS_SHIFT 8
238 #define WM831X_DC1_HC_STS_WIDTH 1
239 #define WM831X_DC4_UV_STS 0x0008
240 #define WM831X_DC4_UV_STS_MASK 0x0008
241 #define WM831X_DC4_UV_STS_SHIFT 3
242 #define WM831X_DC4_UV_STS_WIDTH 1
243 #define WM831X_DC3_UV_STS 0x0004
244 #define WM831X_DC3_UV_STS_MASK 0x0004
245 #define WM831X_DC3_UV_STS_SHIFT 2
246 #define WM831X_DC3_UV_STS_WIDTH 1
247 #define WM831X_DC2_UV_STS 0x0002
248 #define WM831X_DC2_UV_STS_MASK 0x0002
249 #define WM831X_DC2_UV_STS_SHIFT 1
250 #define WM831X_DC2_UV_STS_WIDTH 1
251 #define WM831X_DC1_UV_STS 0x0001
252 #define WM831X_DC1_UV_STS_MASK 0x0001
253 #define WM831X_DC1_UV_STS_SHIFT 0
254 #define WM831X_DC1_UV_STS_WIDTH 1
259 #define WM831X_INTLDO_UV_STS 0x8000
260 #define WM831X_INTLDO_UV_STS_MASK 0x8000
261 #define WM831X_INTLDO_UV_STS_SHIFT 15
262 #define WM831X_INTLDO_UV_STS_WIDTH 1
263 #define WM831X_LDO10_UV_STS 0x0200
264 #define WM831X_LDO10_UV_STS_MASK 0x0200
265 #define WM831X_LDO10_UV_STS_SHIFT 9
266 #define WM831X_LDO10_UV_STS_WIDTH 1
267 #define WM831X_LDO9_UV_STS 0x0100
268 #define WM831X_LDO9_UV_STS_MASK 0x0100
269 #define WM831X_LDO9_UV_STS_SHIFT 8
270 #define WM831X_LDO9_UV_STS_WIDTH 1
271 #define WM831X_LDO8_UV_STS 0x0080
272 #define WM831X_LDO8_UV_STS_MASK 0x0080
273 #define WM831X_LDO8_UV_STS_SHIFT 7
274 #define WM831X_LDO8_UV_STS_WIDTH 1
275 #define WM831X_LDO7_UV_STS 0x0040
276 #define WM831X_LDO7_UV_STS_MASK 0x0040
277 #define WM831X_LDO7_UV_STS_SHIFT 6
278 #define WM831X_LDO7_UV_STS_WIDTH 1
279 #define WM831X_LDO6_UV_STS 0x0020
280 #define WM831X_LDO6_UV_STS_MASK 0x0020
281 #define WM831X_LDO6_UV_STS_SHIFT 5
282 #define WM831X_LDO6_UV_STS_WIDTH 1
283 #define WM831X_LDO5_UV_STS 0x0010
284 #define WM831X_LDO5_UV_STS_MASK 0x0010
285 #define WM831X_LDO5_UV_STS_SHIFT 4
286 #define WM831X_LDO5_UV_STS_WIDTH 1
287 #define WM831X_LDO4_UV_STS 0x0008
288 #define WM831X_LDO4_UV_STS_MASK 0x0008
289 #define WM831X_LDO4_UV_STS_SHIFT 3
290 #define WM831X_LDO4_UV_STS_WIDTH 1
291 #define WM831X_LDO3_UV_STS 0x0004
292 #define WM831X_LDO3_UV_STS_MASK 0x0004
293 #define WM831X_LDO3_UV_STS_SHIFT 2
294 #define WM831X_LDO3_UV_STS_WIDTH 1
295 #define WM831X_LDO2_UV_STS 0x0002
296 #define WM831X_LDO2_UV_STS_MASK 0x0002
297 #define WM831X_LDO2_UV_STS_SHIFT 1
298 #define WM831X_LDO2_UV_STS_WIDTH 1
299 #define WM831X_LDO1_UV_STS 0x0001
300 #define WM831X_LDO1_UV_STS_MASK 0x0001
301 #define WM831X_LDO1_UV_STS_SHIFT 0
302 #define WM831X_LDO1_UV_STS_WIDTH 1
307 #define WM831X_DC1_RATE_MASK 0xC000
308 #define WM831X_DC1_RATE_SHIFT 14
309 #define WM831X_DC1_RATE_WIDTH 2
310 #define WM831X_DC1_PHASE 0x1000
311 #define WM831X_DC1_PHASE_MASK 0x1000
312 #define WM831X_DC1_PHASE_SHIFT 12
313 #define WM831X_DC1_PHASE_WIDTH 1
314 #define WM831X_DC1_FREQ_MASK 0x0300
315 #define WM831X_DC1_FREQ_SHIFT 8
316 #define WM831X_DC1_FREQ_WIDTH 2
317 #define WM831X_DC1_FLT 0x0080
318 #define WM831X_DC1_FLT_MASK 0x0080
319 #define WM831X_DC1_FLT_SHIFT 7
320 #define WM831X_DC1_FLT_WIDTH 1
321 #define WM831X_DC1_SOFT_START_MASK 0x0030
322 #define WM831X_DC1_SOFT_START_SHIFT 4
323 #define WM831X_DC1_SOFT_START_WIDTH 2
324 #define WM831X_DC1_CAP_MASK 0x0003
325 #define WM831X_DC1_CAP_SHIFT 0
326 #define WM831X_DC1_CAP_WIDTH 2
331 #define WM831X_DC1_ERR_ACT_MASK 0xC000
332 #define WM831X_DC1_ERR_ACT_SHIFT 14
333 #define WM831X_DC1_ERR_ACT_WIDTH 2
334 #define WM831X_DC1_HWC_SRC_MASK 0x1800
335 #define WM831X_DC1_HWC_SRC_SHIFT 11
336 #define WM831X_DC1_HWC_SRC_WIDTH 2
337 #define WM831X_DC1_HWC_VSEL 0x0400
338 #define WM831X_DC1_HWC_VSEL_MASK 0x0400
339 #define WM831X_DC1_HWC_VSEL_SHIFT 10
340 #define WM831X_DC1_HWC_VSEL_WIDTH 1
341 #define WM831X_DC1_HWC_MODE_MASK 0x0300
342 #define WM831X_DC1_HWC_MODE_SHIFT 8
343 #define WM831X_DC1_HWC_MODE_WIDTH 2
344 #define WM831X_DC1_HC_THR_MASK 0x0070
345 #define WM831X_DC1_HC_THR_SHIFT 4
346 #define WM831X_DC1_HC_THR_WIDTH 3
347 #define WM831X_DC1_HC_IND_ENA 0x0001
348 #define WM831X_DC1_HC_IND_ENA_MASK 0x0001
349 #define WM831X_DC1_HC_IND_ENA_SHIFT 0
350 #define WM831X_DC1_HC_IND_ENA_WIDTH 1
355 #define WM831X_DC1_ON_SLOT_MASK 0xE000
356 #define WM831X_DC1_ON_SLOT_SHIFT 13
357 #define WM831X_DC1_ON_SLOT_WIDTH 3
358 #define WM831X_DC1_ON_MODE_MASK 0x0300
359 #define WM831X_DC1_ON_MODE_SHIFT 8
360 #define WM831X_DC1_ON_MODE_WIDTH 2
361 #define WM831X_DC1_ON_VSEL_MASK 0x007F
362 #define WM831X_DC1_ON_VSEL_SHIFT 0
363 #define WM831X_DC1_ON_VSEL_WIDTH 7
368 #define WM831X_DC1_SLP_SLOT_MASK 0xE000
369 #define WM831X_DC1_SLP_SLOT_SHIFT 13
370 #define WM831X_DC1_SLP_SLOT_WIDTH 3
371 #define WM831X_DC1_SLP_MODE_MASK 0x0300
372 #define WM831X_DC1_SLP_MODE_SHIFT 8
373 #define WM831X_DC1_SLP_MODE_WIDTH 2
374 #define WM831X_DC1_SLP_VSEL_MASK 0x007F
375 #define WM831X_DC1_SLP_VSEL_SHIFT 0
376 #define WM831X_DC1_SLP_VSEL_WIDTH 7
381 #define WM831X_DC1_DVS_SRC_MASK 0x1800
382 #define WM831X_DC1_DVS_SRC_SHIFT 11
383 #define WM831X_DC1_DVS_SRC_WIDTH 2
384 #define WM831X_DC1_DVS_VSEL_MASK 0x007F
385 #define WM831X_DC1_DVS_VSEL_SHIFT 0
386 #define WM831X_DC1_DVS_VSEL_WIDTH 7
391 #define WM831X_DC2_RATE_MASK 0xC000
392 #define WM831X_DC2_RATE_SHIFT 14
393 #define WM831X_DC2_RATE_WIDTH 2
394 #define WM831X_DC2_PHASE 0x1000
395 #define WM831X_DC2_PHASE_MASK 0x1000
396 #define WM831X_DC2_PHASE_SHIFT 12
397 #define WM831X_DC2_PHASE_WIDTH 1
398 #define WM831X_DC2_FREQ_MASK 0x0300
399 #define WM831X_DC2_FREQ_SHIFT 8
400 #define WM831X_DC2_FREQ_WIDTH 2
401 #define WM831X_DC2_FLT 0x0080
402 #define WM831X_DC2_FLT_MASK 0x0080
403 #define WM831X_DC2_FLT_SHIFT 7
404 #define WM831X_DC2_FLT_WIDTH 1
405 #define WM831X_DC2_SOFT_START_MASK 0x0030
406 #define WM831X_DC2_SOFT_START_SHIFT 4
407 #define WM831X_DC2_SOFT_START_WIDTH 2
408 #define WM831X_DC2_CAP_MASK 0x0003
409 #define WM831X_DC2_CAP_SHIFT 0
410 #define WM831X_DC2_CAP_WIDTH 2
415 #define WM831X_DC2_ERR_ACT_MASK 0xC000
416 #define WM831X_DC2_ERR_ACT_SHIFT 14
417 #define WM831X_DC2_ERR_ACT_WIDTH 2
418 #define WM831X_DC2_HWC_SRC_MASK 0x1800
419 #define WM831X_DC2_HWC_SRC_SHIFT 11
420 #define WM831X_DC2_HWC_SRC_WIDTH 2
421 #define WM831X_DC2_HWC_VSEL 0x0400
422 #define WM831X_DC2_HWC_VSEL_MASK 0x0400
423 #define WM831X_DC2_HWC_VSEL_SHIFT 10
424 #define WM831X_DC2_HWC_VSEL_WIDTH 1
425 #define WM831X_DC2_HWC_MODE_MASK 0x0300
426 #define WM831X_DC2_HWC_MODE_SHIFT 8
427 #define WM831X_DC2_HWC_MODE_WIDTH 2
428 #define WM831X_DC2_HC_THR_MASK 0x0070
429 #define WM831X_DC2_HC_THR_SHIFT 4
430 #define WM831X_DC2_HC_THR_WIDTH 3
431 #define WM831X_DC2_HC_IND_ENA 0x0001
432 #define WM831X_DC2_HC_IND_ENA_MASK 0x0001
433 #define WM831X_DC2_HC_IND_ENA_SHIFT 0
434 #define WM831X_DC2_HC_IND_ENA_WIDTH 1
439 #define WM831X_DC2_ON_SLOT_MASK 0xE000
440 #define WM831X_DC2_ON_SLOT_SHIFT 13
441 #define WM831X_DC2_ON_SLOT_WIDTH 3
442 #define WM831X_DC2_ON_MODE_MASK 0x0300
443 #define WM831X_DC2_ON_MODE_SHIFT 8
444 #define WM831X_DC2_ON_MODE_WIDTH 2
445 #define WM831X_DC2_ON_VSEL_MASK 0x007F
446 #define WM831X_DC2_ON_VSEL_SHIFT 0
447 #define WM831X_DC2_ON_VSEL_WIDTH 7
452 #define WM831X_DC2_SLP_SLOT_MASK 0xE000
453 #define WM831X_DC2_SLP_SLOT_SHIFT 13
454 #define WM831X_DC2_SLP_SLOT_WIDTH 3
455 #define WM831X_DC2_SLP_MODE_MASK 0x0300
456 #define WM831X_DC2_SLP_MODE_SHIFT 8
457 #define WM831X_DC2_SLP_MODE_WIDTH 2
458 #define WM831X_DC2_SLP_VSEL_MASK 0x007F
459 #define WM831X_DC2_SLP_VSEL_SHIFT 0
460 #define WM831X_DC2_SLP_VSEL_WIDTH 7
465 #define WM831X_DC2_DVS_SRC_MASK 0x1800
466 #define WM831X_DC2_DVS_SRC_SHIFT 11
467 #define WM831X_DC2_DVS_SRC_WIDTH 2
468 #define WM831X_DC2_DVS_VSEL_MASK 0x007F
469 #define WM831X_DC2_DVS_VSEL_SHIFT 0
470 #define WM831X_DC2_DVS_VSEL_WIDTH 7
475 #define WM831X_DC3_PHASE 0x1000
476 #define WM831X_DC3_PHASE_MASK 0x1000
477 #define WM831X_DC3_PHASE_SHIFT 12
478 #define WM831X_DC3_PHASE_WIDTH 1
479 #define WM831X_DC3_FLT 0x0080
480 #define WM831X_DC3_FLT_MASK 0x0080
481 #define WM831X_DC3_FLT_SHIFT 7
482 #define WM831X_DC3_FLT_WIDTH 1
483 #define WM831X_DC3_SOFT_START_MASK 0x0030
484 #define WM831X_DC3_SOFT_START_SHIFT 4
485 #define WM831X_DC3_SOFT_START_WIDTH 2
486 #define WM831X_DC3_STNBY_LIM_MASK 0x000C
487 #define WM831X_DC3_STNBY_LIM_SHIFT 2
488 #define WM831X_DC3_STNBY_LIM_WIDTH 2
489 #define WM831X_DC3_CAP_MASK 0x0003
490 #define WM831X_DC3_CAP_SHIFT 0
491 #define WM831X_DC3_CAP_WIDTH 2
496 #define WM831X_DC3_ERR_ACT_MASK 0xC000
497 #define WM831X_DC3_ERR_ACT_SHIFT 14
498 #define WM831X_DC3_ERR_ACT_WIDTH 2
499 #define WM831X_DC3_HWC_SRC_MASK 0x1800
500 #define WM831X_DC3_HWC_SRC_SHIFT 11
501 #define WM831X_DC3_HWC_SRC_WIDTH 2
502 #define WM831X_DC3_HWC_VSEL 0x0400
503 #define WM831X_DC3_HWC_VSEL_MASK 0x0400
504 #define WM831X_DC3_HWC_VSEL_SHIFT 10
505 #define WM831X_DC3_HWC_VSEL_WIDTH 1
506 #define WM831X_DC3_HWC_MODE_MASK 0x0300
507 #define WM831X_DC3_HWC_MODE_SHIFT 8
508 #define WM831X_DC3_HWC_MODE_WIDTH 2
509 #define WM831X_DC3_OVP 0x0080
510 #define WM831X_DC3_OVP_MASK 0x0080
511 #define WM831X_DC3_OVP_SHIFT 7
512 #define WM831X_DC3_OVP_WIDTH 1
517 #define WM831X_DC3_ON_SLOT_MASK 0xE000
518 #define WM831X_DC3_ON_SLOT_SHIFT 13
519 #define WM831X_DC3_ON_SLOT_WIDTH 3
520 #define WM831X_DC3_ON_MODE_MASK 0x0300
521 #define WM831X_DC3_ON_MODE_SHIFT 8
522 #define WM831X_DC3_ON_MODE_WIDTH 2
523 #define WM831X_DC3_ON_VSEL_MASK 0x007F
524 #define WM831X_DC3_ON_VSEL_SHIFT 0
525 #define WM831X_DC3_ON_VSEL_WIDTH 7
530 #define WM831X_DC3_SLP_SLOT_MASK 0xE000
531 #define WM831X_DC3_SLP_SLOT_SHIFT 13
532 #define WM831X_DC3_SLP_SLOT_WIDTH 3
533 #define WM831X_DC3_SLP_MODE_MASK 0x0300
534 #define WM831X_DC3_SLP_MODE_SHIFT 8
535 #define WM831X_DC3_SLP_MODE_WIDTH 2
536 #define WM831X_DC3_SLP_VSEL_MASK 0x007F
537 #define WM831X_DC3_SLP_VSEL_SHIFT 0
538 #define WM831X_DC3_SLP_VSEL_WIDTH 7
543 #define WM831X_DC4_ERR_ACT_MASK 0xC000
544 #define WM831X_DC4_ERR_ACT_SHIFT 14
545 #define WM831X_DC4_ERR_ACT_WIDTH 2
546 #define WM831X_DC4_HWC_SRC_MASK 0x1800
547 #define WM831X_DC4_HWC_SRC_SHIFT 11
548 #define WM831X_DC4_HWC_SRC_WIDTH 2
549 #define WM831X_DC4_HWC_MODE 0x0100
550 #define WM831X_DC4_HWC_MODE_MASK 0x0100
551 #define WM831X_DC4_HWC_MODE_SHIFT 8
552 #define WM831X_DC4_HWC_MODE_WIDTH 1
553 #define WM831X_DC4_RANGE_MASK 0x000C
554 #define WM831X_DC4_RANGE_SHIFT 2
555 #define WM831X_DC4_RANGE_WIDTH 2
556 #define WM831X_DC4_FBSRC 0x0001
557 #define WM831X_DC4_FBSRC_MASK 0x0001
558 #define WM831X_DC4_FBSRC_SHIFT 0
559 #define WM831X_DC4_FBSRC_WIDTH 1
564 #define WM831X_DC4_SLPENA 0x0100
565 #define WM831X_DC4_SLPENA_MASK 0x0100
566 #define WM831X_DC4_SLPENA_SHIFT 8
567 #define WM831X_DC4_SLPENA_WIDTH 1
572 #define WM831X_LDO1_ERR_ACT_MASK 0xC000
573 #define WM831X_LDO1_ERR_ACT_SHIFT 14
574 #define WM831X_LDO1_ERR_ACT_WIDTH 2
575 #define WM831X_LDO1_HWC_SRC_MASK 0x1800
576 #define WM831X_LDO1_HWC_SRC_SHIFT 11
577 #define WM831X_LDO1_HWC_SRC_WIDTH 2
578 #define WM831X_LDO1_HWC_VSEL 0x0400
579 #define WM831X_LDO1_HWC_VSEL_MASK 0x0400
580 #define WM831X_LDO1_HWC_VSEL_SHIFT 10
581 #define WM831X_LDO1_HWC_VSEL_WIDTH 1
582 #define WM831X_LDO1_HWC_MODE_MASK 0x0300
583 #define WM831X_LDO1_HWC_MODE_SHIFT 8
584 #define WM831X_LDO1_HWC_MODE_WIDTH 2
585 #define WM831X_LDO1_FLT 0x0080
586 #define WM831X_LDO1_FLT_MASK 0x0080
587 #define WM831X_LDO1_FLT_SHIFT 7
588 #define WM831X_LDO1_FLT_WIDTH 1
589 #define WM831X_LDO1_SWI 0x0040
590 #define WM831X_LDO1_SWI_MASK 0x0040
591 #define WM831X_LDO1_SWI_SHIFT 6
592 #define WM831X_LDO1_SWI_WIDTH 1
593 #define WM831X_LDO1_LP_MODE 0x0001
594 #define WM831X_LDO1_LP_MODE_MASK 0x0001
595 #define WM831X_LDO1_LP_MODE_SHIFT 0
596 #define WM831X_LDO1_LP_MODE_WIDTH 1
601 #define WM831X_LDO1_ON_SLOT_MASK 0xE000
602 #define WM831X_LDO1_ON_SLOT_SHIFT 13
603 #define WM831X_LDO1_ON_SLOT_WIDTH 3
604 #define WM831X_LDO1_ON_MODE 0x0100
605 #define WM831X_LDO1_ON_MODE_MASK 0x0100
606 #define WM831X_LDO1_ON_MODE_SHIFT 8
607 #define WM831X_LDO1_ON_MODE_WIDTH 1
608 #define WM831X_LDO1_ON_VSEL_MASK 0x001F
609 #define WM831X_LDO1_ON_VSEL_SHIFT 0
610 #define WM831X_LDO1_ON_VSEL_WIDTH 5
615 #define WM831X_LDO1_SLP_SLOT_MASK 0xE000
616 #define WM831X_LDO1_SLP_SLOT_SHIFT 13
617 #define WM831X_LDO1_SLP_SLOT_WIDTH 3
618 #define WM831X_LDO1_SLP_MODE 0x0100
619 #define WM831X_LDO1_SLP_MODE_MASK 0x0100
620 #define WM831X_LDO1_SLP_MODE_SHIFT 8
621 #define WM831X_LDO1_SLP_MODE_WIDTH 1
622 #define WM831X_LDO1_SLP_VSEL_MASK 0x001F
623 #define WM831X_LDO1_SLP_VSEL_SHIFT 0
624 #define WM831X_LDO1_SLP_VSEL_WIDTH 5
629 #define WM831X_LDO2_ERR_ACT_MASK 0xC000
630 #define WM831X_LDO2_ERR_ACT_SHIFT 14
631 #define WM831X_LDO2_ERR_ACT_WIDTH 2
632 #define WM831X_LDO2_HWC_SRC_MASK 0x1800
633 #define WM831X_LDO2_HWC_SRC_SHIFT 11
634 #define WM831X_LDO2_HWC_SRC_WIDTH 2
635 #define WM831X_LDO2_HWC_VSEL 0x0400
636 #define WM831X_LDO2_HWC_VSEL_MASK 0x0400
637 #define WM831X_LDO2_HWC_VSEL_SHIFT 10
638 #define WM831X_LDO2_HWC_VSEL_WIDTH 1
639 #define WM831X_LDO2_HWC_MODE_MASK 0x0300
640 #define WM831X_LDO2_HWC_MODE_SHIFT 8
641 #define WM831X_LDO2_HWC_MODE_WIDTH 2
642 #define WM831X_LDO2_FLT 0x0080
643 #define WM831X_LDO2_FLT_MASK 0x0080
644 #define WM831X_LDO2_FLT_SHIFT 7
645 #define WM831X_LDO2_FLT_WIDTH 1
646 #define WM831X_LDO2_SWI 0x0040
647 #define WM831X_LDO2_SWI_MASK 0x0040
648 #define WM831X_LDO2_SWI_SHIFT 6
649 #define WM831X_LDO2_SWI_WIDTH 1
650 #define WM831X_LDO2_LP_MODE 0x0001
651 #define WM831X_LDO2_LP_MODE_MASK 0x0001
652 #define WM831X_LDO2_LP_MODE_SHIFT 0
653 #define WM831X_LDO2_LP_MODE_WIDTH 1
658 #define WM831X_LDO2_ON_SLOT_MASK 0xE000
659 #define WM831X_LDO2_ON_SLOT_SHIFT 13
660 #define WM831X_LDO2_ON_SLOT_WIDTH 3
661 #define WM831X_LDO2_ON_MODE 0x0100
662 #define WM831X_LDO2_ON_MODE_MASK 0x0100
663 #define WM831X_LDO2_ON_MODE_SHIFT 8
664 #define WM831X_LDO2_ON_MODE_WIDTH 1
665 #define WM831X_LDO2_ON_VSEL_MASK 0x001F
666 #define WM831X_LDO2_ON_VSEL_SHIFT 0
667 #define WM831X_LDO2_ON_VSEL_WIDTH 5
672 #define WM831X_LDO2_SLP_SLOT_MASK 0xE000
673 #define WM831X_LDO2_SLP_SLOT_SHIFT 13
674 #define WM831X_LDO2_SLP_SLOT_WIDTH 3
675 #define WM831X_LDO2_SLP_MODE 0x0100
676 #define WM831X_LDO2_SLP_MODE_MASK 0x0100
677 #define WM831X_LDO2_SLP_MODE_SHIFT 8
678 #define WM831X_LDO2_SLP_MODE_WIDTH 1
679 #define WM831X_LDO2_SLP_VSEL_MASK 0x001F
680 #define WM831X_LDO2_SLP_VSEL_SHIFT 0
681 #define WM831X_LDO2_SLP_VSEL_WIDTH 5
686 #define WM831X_LDO3_ERR_ACT_MASK 0xC000
687 #define WM831X_LDO3_ERR_ACT_SHIFT 14
688 #define WM831X_LDO3_ERR_ACT_WIDTH 2
689 #define WM831X_LDO3_HWC_SRC_MASK 0x1800
690 #define WM831X_LDO3_HWC_SRC_SHIFT 11
691 #define WM831X_LDO3_HWC_SRC_WIDTH 2
692 #define WM831X_LDO3_HWC_VSEL 0x0400
693 #define WM831X_LDO3_HWC_VSEL_MASK 0x0400
694 #define WM831X_LDO3_HWC_VSEL_SHIFT 10
695 #define WM831X_LDO3_HWC_VSEL_WIDTH 1
696 #define WM831X_LDO3_HWC_MODE_MASK 0x0300
697 #define WM831X_LDO3_HWC_MODE_SHIFT 8
698 #define WM831X_LDO3_HWC_MODE_WIDTH 2
699 #define WM831X_LDO3_FLT 0x0080
700 #define WM831X_LDO3_FLT_MASK 0x0080
701 #define WM831X_LDO3_FLT_SHIFT 7
702 #define WM831X_LDO3_FLT_WIDTH 1
703 #define WM831X_LDO3_SWI 0x0040
704 #define WM831X_LDO3_SWI_MASK 0x0040
705 #define WM831X_LDO3_SWI_SHIFT 6
706 #define WM831X_LDO3_SWI_WIDTH 1
707 #define WM831X_LDO3_LP_MODE 0x0001
708 #define WM831X_LDO3_LP_MODE_MASK 0x0001
709 #define WM831X_LDO3_LP_MODE_SHIFT 0
710 #define WM831X_LDO3_LP_MODE_WIDTH 1
715 #define WM831X_LDO3_ON_SLOT_MASK 0xE000
716 #define WM831X_LDO3_ON_SLOT_SHIFT 13
717 #define WM831X_LDO3_ON_SLOT_WIDTH 3
718 #define WM831X_LDO3_ON_MODE 0x0100
719 #define WM831X_LDO3_ON_MODE_MASK 0x0100
720 #define WM831X_LDO3_ON_MODE_SHIFT 8
721 #define WM831X_LDO3_ON_MODE_WIDTH 1
722 #define WM831X_LDO3_ON_VSEL_MASK 0x001F
723 #define WM831X_LDO3_ON_VSEL_SHIFT 0
724 #define WM831X_LDO3_ON_VSEL_WIDTH 5
729 #define WM831X_LDO3_SLP_SLOT_MASK 0xE000
730 #define WM831X_LDO3_SLP_SLOT_SHIFT 13
731 #define WM831X_LDO3_SLP_SLOT_WIDTH 3
732 #define WM831X_LDO3_SLP_MODE 0x0100
733 #define WM831X_LDO3_SLP_MODE_MASK 0x0100
734 #define WM831X_LDO3_SLP_MODE_SHIFT 8
735 #define WM831X_LDO3_SLP_MODE_WIDTH 1
736 #define WM831X_LDO3_SLP_VSEL_MASK 0x001F
737 #define WM831X_LDO3_SLP_VSEL_SHIFT 0
738 #define WM831X_LDO3_SLP_VSEL_WIDTH 5
743 #define WM831X_LDO4_ERR_ACT_MASK 0xC000
744 #define WM831X_LDO4_ERR_ACT_SHIFT 14
745 #define WM831X_LDO4_ERR_ACT_WIDTH 2
746 #define WM831X_LDO4_HWC_SRC_MASK 0x1800
747 #define WM831X_LDO4_HWC_SRC_SHIFT 11
748 #define WM831X_LDO4_HWC_SRC_WIDTH 2
749 #define WM831X_LDO4_HWC_VSEL 0x0400
750 #define WM831X_LDO4_HWC_VSEL_MASK 0x0400
751 #define WM831X_LDO4_HWC_VSEL_SHIFT 10
752 #define WM831X_LDO4_HWC_VSEL_WIDTH 1
753 #define WM831X_LDO4_HWC_MODE_MASK 0x0300
754 #define WM831X_LDO4_HWC_MODE_SHIFT 8
755 #define WM831X_LDO4_HWC_MODE_WIDTH 2
756 #define WM831X_LDO4_FLT 0x0080
757 #define WM831X_LDO4_FLT_MASK 0x0080
758 #define WM831X_LDO4_FLT_SHIFT 7
759 #define WM831X_LDO4_FLT_WIDTH 1
760 #define WM831X_LDO4_SWI 0x0040
761 #define WM831X_LDO4_SWI_MASK 0x0040
762 #define WM831X_LDO4_SWI_SHIFT 6
763 #define WM831X_LDO4_SWI_WIDTH 1
764 #define WM831X_LDO4_LP_MODE 0x0001
765 #define WM831X_LDO4_LP_MODE_MASK 0x0001
766 #define WM831X_LDO4_LP_MODE_SHIFT 0
767 #define WM831X_LDO4_LP_MODE_WIDTH 1
772 #define WM831X_LDO4_ON_SLOT_MASK 0xE000
773 #define WM831X_LDO4_ON_SLOT_SHIFT 13
774 #define WM831X_LDO4_ON_SLOT_WIDTH 3
775 #define WM831X_LDO4_ON_MODE 0x0100
776 #define WM831X_LDO4_ON_MODE_MASK 0x0100
777 #define WM831X_LDO4_ON_MODE_SHIFT 8
778 #define WM831X_LDO4_ON_MODE_WIDTH 1
779 #define WM831X_LDO4_ON_VSEL_MASK 0x001F
780 #define WM831X_LDO4_ON_VSEL_SHIFT 0
781 #define WM831X_LDO4_ON_VSEL_WIDTH 5
786 #define WM831X_LDO4_SLP_SLOT_MASK 0xE000
787 #define WM831X_LDO4_SLP_SLOT_SHIFT 13
788 #define WM831X_LDO4_SLP_SLOT_WIDTH 3
789 #define WM831X_LDO4_SLP_MODE 0x0100
790 #define WM831X_LDO4_SLP_MODE_MASK 0x0100
791 #define WM831X_LDO4_SLP_MODE_SHIFT 8
792 #define WM831X_LDO4_SLP_MODE_WIDTH 1
793 #define WM831X_LDO4_SLP_VSEL_MASK 0x001F
794 #define WM831X_LDO4_SLP_VSEL_SHIFT 0
795 #define WM831X_LDO4_SLP_VSEL_WIDTH 5
800 #define WM831X_LDO5_ERR_ACT_MASK 0xC000
801 #define WM831X_LDO5_ERR_ACT_SHIFT 14
802 #define WM831X_LDO5_ERR_ACT_WIDTH 2
803 #define WM831X_LDO5_HWC_SRC_MASK 0x1800
804 #define WM831X_LDO5_HWC_SRC_SHIFT 11
805 #define WM831X_LDO5_HWC_SRC_WIDTH 2
806 #define WM831X_LDO5_HWC_VSEL 0x0400
807 #define WM831X_LDO5_HWC_VSEL_MASK 0x0400
808 #define WM831X_LDO5_HWC_VSEL_SHIFT 10
809 #define WM831X_LDO5_HWC_VSEL_WIDTH 1
810 #define WM831X_LDO5_HWC_MODE_MASK 0x0300
811 #define WM831X_LDO5_HWC_MODE_SHIFT 8
812 #define WM831X_LDO5_HWC_MODE_WIDTH 2
813 #define WM831X_LDO5_FLT 0x0080
814 #define WM831X_LDO5_FLT_MASK 0x0080
815 #define WM831X_LDO5_FLT_SHIFT 7
816 #define WM831X_LDO5_FLT_WIDTH 1
817 #define WM831X_LDO5_SWI 0x0040
818 #define WM831X_LDO5_SWI_MASK 0x0040
819 #define WM831X_LDO5_SWI_SHIFT 6
820 #define WM831X_LDO5_SWI_WIDTH 1
821 #define WM831X_LDO5_LP_MODE 0x0001
822 #define WM831X_LDO5_LP_MODE_MASK 0x0001
823 #define WM831X_LDO5_LP_MODE_SHIFT 0
824 #define WM831X_LDO5_LP_MODE_WIDTH 1
829 #define WM831X_LDO5_ON_SLOT_MASK 0xE000
830 #define WM831X_LDO5_ON_SLOT_SHIFT 13
831 #define WM831X_LDO5_ON_SLOT_WIDTH 3
832 #define WM831X_LDO5_ON_MODE 0x0100
833 #define WM831X_LDO5_ON_MODE_MASK 0x0100
834 #define WM831X_LDO5_ON_MODE_SHIFT 8
835 #define WM831X_LDO5_ON_MODE_WIDTH 1
836 #define WM831X_LDO5_ON_VSEL_MASK 0x001F
837 #define WM831X_LDO5_ON_VSEL_SHIFT 0
838 #define WM831X_LDO5_ON_VSEL_WIDTH 5
843 #define WM831X_LDO5_SLP_SLOT_MASK 0xE000
844 #define WM831X_LDO5_SLP_SLOT_SHIFT 13
845 #define WM831X_LDO5_SLP_SLOT_WIDTH 3
846 #define WM831X_LDO5_SLP_MODE 0x0100
847 #define WM831X_LDO5_SLP_MODE_MASK 0x0100
848 #define WM831X_LDO5_SLP_MODE_SHIFT 8
849 #define WM831X_LDO5_SLP_MODE_WIDTH 1
850 #define WM831X_LDO5_SLP_VSEL_MASK 0x001F
851 #define WM831X_LDO5_SLP_VSEL_SHIFT 0
852 #define WM831X_LDO5_SLP_VSEL_WIDTH 5
857 #define WM831X_LDO6_ERR_ACT_MASK 0xC000
858 #define WM831X_LDO6_ERR_ACT_SHIFT 14
859 #define WM831X_LDO6_ERR_ACT_WIDTH 2
860 #define WM831X_LDO6_HWC_SRC_MASK 0x1800
861 #define WM831X_LDO6_HWC_SRC_SHIFT 11
862 #define WM831X_LDO6_HWC_SRC_WIDTH 2
863 #define WM831X_LDO6_HWC_VSEL 0x0400
864 #define WM831X_LDO6_HWC_VSEL_MASK 0x0400
865 #define WM831X_LDO6_HWC_VSEL_SHIFT 10
866 #define WM831X_LDO6_HWC_VSEL_WIDTH 1
867 #define WM831X_LDO6_HWC_MODE_MASK 0x0300
868 #define WM831X_LDO6_HWC_MODE_SHIFT 8
869 #define WM831X_LDO6_HWC_MODE_WIDTH 2
870 #define WM831X_LDO6_FLT 0x0080
871 #define WM831X_LDO6_FLT_MASK 0x0080
872 #define WM831X_LDO6_FLT_SHIFT 7
873 #define WM831X_LDO6_FLT_WIDTH 1
874 #define WM831X_LDO6_SWI 0x0040
875 #define WM831X_LDO6_SWI_MASK 0x0040
876 #define WM831X_LDO6_SWI_SHIFT 6
877 #define WM831X_LDO6_SWI_WIDTH 1
878 #define WM831X_LDO6_LP_MODE 0x0001
879 #define WM831X_LDO6_LP_MODE_MASK 0x0001
880 #define WM831X_LDO6_LP_MODE_SHIFT 0
881 #define WM831X_LDO6_LP_MODE_WIDTH 1
886 #define WM831X_LDO6_ON_SLOT_MASK 0xE000
887 #define WM831X_LDO6_ON_SLOT_SHIFT 13
888 #define WM831X_LDO6_ON_SLOT_WIDTH 3
889 #define WM831X_LDO6_ON_MODE 0x0100
890 #define WM831X_LDO6_ON_MODE_MASK 0x0100
891 #define WM831X_LDO6_ON_MODE_SHIFT 8
892 #define WM831X_LDO6_ON_MODE_WIDTH 1
893 #define WM831X_LDO6_ON_VSEL_MASK 0x001F
894 #define WM831X_LDO6_ON_VSEL_SHIFT 0
895 #define WM831X_LDO6_ON_VSEL_WIDTH 5
900 #define WM831X_LDO6_SLP_SLOT_MASK 0xE000
901 #define WM831X_LDO6_SLP_SLOT_SHIFT 13
902 #define WM831X_LDO6_SLP_SLOT_WIDTH 3
903 #define WM831X_LDO6_SLP_MODE 0x0100
904 #define WM831X_LDO6_SLP_MODE_MASK 0x0100
905 #define WM831X_LDO6_SLP_MODE_SHIFT 8
906 #define WM831X_LDO6_SLP_MODE_WIDTH 1
907 #define WM831X_LDO6_SLP_VSEL_MASK 0x001F
908 #define WM831X_LDO6_SLP_VSEL_SHIFT 0
909 #define WM831X_LDO6_SLP_VSEL_WIDTH 5
914 #define WM831X_LDO7_ERR_ACT_MASK 0xC000
915 #define WM831X_LDO7_ERR_ACT_SHIFT 14
916 #define WM831X_LDO7_ERR_ACT_WIDTH 2
917 #define WM831X_LDO7_HWC_SRC_MASK 0x1800
918 #define WM831X_LDO7_HWC_SRC_SHIFT 11
919 #define WM831X_LDO7_HWC_SRC_WIDTH 2
920 #define WM831X_LDO7_HWC_VSEL 0x0400
921 #define WM831X_LDO7_HWC_VSEL_MASK 0x0400
922 #define WM831X_LDO7_HWC_VSEL_SHIFT 10
923 #define WM831X_LDO7_HWC_VSEL_WIDTH 1
924 #define WM831X_LDO7_HWC_MODE_MASK 0x0300
925 #define WM831X_LDO7_HWC_MODE_SHIFT 8
926 #define WM831X_LDO7_HWC_MODE_WIDTH 2
927 #define WM831X_LDO7_FLT 0x0080
928 #define WM831X_LDO7_FLT_MASK 0x0080
929 #define WM831X_LDO7_FLT_SHIFT 7
930 #define WM831X_LDO7_FLT_WIDTH 1
931 #define WM831X_LDO7_SWI 0x0040
932 #define WM831X_LDO7_SWI_MASK 0x0040
933 #define WM831X_LDO7_SWI_SHIFT 6
934 #define WM831X_LDO7_SWI_WIDTH 1
939 #define WM831X_LDO7_ON_SLOT_MASK 0xE000
940 #define WM831X_LDO7_ON_SLOT_SHIFT 13
941 #define WM831X_LDO7_ON_SLOT_WIDTH 3
942 #define WM831X_LDO7_ON_MODE 0x0100
943 #define WM831X_LDO7_ON_MODE_MASK 0x0100
944 #define WM831X_LDO7_ON_MODE_SHIFT 8
945 #define WM831X_LDO7_ON_MODE_WIDTH 1
946 #define WM831X_LDO7_ON_VSEL_MASK 0x001F
947 #define WM831X_LDO7_ON_VSEL_SHIFT 0
948 #define WM831X_LDO7_ON_VSEL_WIDTH 5
953 #define WM831X_LDO7_SLP_SLOT_MASK 0xE000
954 #define WM831X_LDO7_SLP_SLOT_SHIFT 13
955 #define WM831X_LDO7_SLP_SLOT_WIDTH 3
956 #define WM831X_LDO7_SLP_MODE 0x0100
957 #define WM831X_LDO7_SLP_MODE_MASK 0x0100
958 #define WM831X_LDO7_SLP_MODE_SHIFT 8
959 #define WM831X_LDO7_SLP_MODE_WIDTH 1
960 #define WM831X_LDO7_SLP_VSEL_MASK 0x001F
961 #define WM831X_LDO7_SLP_VSEL_SHIFT 0
962 #define WM831X_LDO7_SLP_VSEL_WIDTH 5
967 #define WM831X_LDO8_ERR_ACT_MASK 0xC000
968 #define WM831X_LDO8_ERR_ACT_SHIFT 14
969 #define WM831X_LDO8_ERR_ACT_WIDTH 2
970 #define WM831X_LDO8_HWC_SRC_MASK 0x1800
971 #define WM831X_LDO8_HWC_SRC_SHIFT 11
972 #define WM831X_LDO8_HWC_SRC_WIDTH 2
973 #define WM831X_LDO8_HWC_VSEL 0x0400
974 #define WM831X_LDO8_HWC_VSEL_MASK 0x0400
975 #define WM831X_LDO8_HWC_VSEL_SHIFT 10
976 #define WM831X_LDO8_HWC_VSEL_WIDTH 1
977 #define WM831X_LDO8_HWC_MODE_MASK 0x0300
978 #define WM831X_LDO8_HWC_MODE_SHIFT 8
979 #define WM831X_LDO8_HWC_MODE_WIDTH 2
980 #define WM831X_LDO8_FLT 0x0080
981 #define WM831X_LDO8_FLT_MASK 0x0080
982 #define WM831X_LDO8_FLT_SHIFT 7
983 #define WM831X_LDO8_FLT_WIDTH 1
984 #define WM831X_LDO8_SWI 0x0040
985 #define WM831X_LDO8_SWI_MASK 0x0040
986 #define WM831X_LDO8_SWI_SHIFT 6
987 #define WM831X_LDO8_SWI_WIDTH 1
992 #define WM831X_LDO8_ON_SLOT_MASK 0xE000
993 #define WM831X_LDO8_ON_SLOT_SHIFT 13
994 #define WM831X_LDO8_ON_SLOT_WIDTH 3
995 #define WM831X_LDO8_ON_MODE 0x0100
996 #define WM831X_LDO8_ON_MODE_MASK 0x0100
997 #define WM831X_LDO8_ON_MODE_SHIFT 8
998 #define WM831X_LDO8_ON_MODE_WIDTH 1
999 #define WM831X_LDO8_ON_VSEL_MASK 0x001F
1000 #define WM831X_LDO8_ON_VSEL_SHIFT 0
1001 #define WM831X_LDO8_ON_VSEL_WIDTH 5
1006 #define WM831X_LDO8_SLP_SLOT_MASK 0xE000
1007 #define WM831X_LDO8_SLP_SLOT_SHIFT 13
1008 #define WM831X_LDO8_SLP_SLOT_WIDTH 3
1009 #define WM831X_LDO8_SLP_MODE 0x0100
1010 #define WM831X_LDO8_SLP_MODE_MASK 0x0100
1011 #define WM831X_LDO8_SLP_MODE_SHIFT 8
1012 #define WM831X_LDO8_SLP_MODE_WIDTH 1
1013 #define WM831X_LDO8_SLP_VSEL_MASK 0x001F
1014 #define WM831X_LDO8_SLP_VSEL_SHIFT 0
1015 #define WM831X_LDO8_SLP_VSEL_WIDTH 5
1020 #define WM831X_LDO9_ERR_ACT_MASK 0xC000
1021 #define WM831X_LDO9_ERR_ACT_SHIFT 14
1022 #define WM831X_LDO9_ERR_ACT_WIDTH 2
1023 #define WM831X_LDO9_HWC_SRC_MASK 0x1800
1024 #define WM831X_LDO9_HWC_SRC_SHIFT 11
1025 #define WM831X_LDO9_HWC_SRC_WIDTH 2
1026 #define WM831X_LDO9_HWC_VSEL 0x0400
1027 #define WM831X_LDO9_HWC_VSEL_MASK 0x0400
1028 #define WM831X_LDO9_HWC_VSEL_SHIFT 10
1029 #define WM831X_LDO9_HWC_VSEL_WIDTH 1
1030 #define WM831X_LDO9_HWC_MODE_MASK 0x0300
1031 #define WM831X_LDO9_HWC_MODE_SHIFT 8
1032 #define WM831X_LDO9_HWC_MODE_WIDTH 2
1033 #define WM831X_LDO9_FLT 0x0080
1034 #define WM831X_LDO9_FLT_MASK 0x0080
1035 #define WM831X_LDO9_FLT_SHIFT 7
1036 #define WM831X_LDO9_FLT_WIDTH 1
1037 #define WM831X_LDO9_SWI 0x0040
1038 #define WM831X_LDO9_SWI_MASK 0x0040
1039 #define WM831X_LDO9_SWI_SHIFT 6
1040 #define WM831X_LDO9_SWI_WIDTH 1
1045 #define WM831X_LDO9_ON_SLOT_MASK 0xE000
1046 #define WM831X_LDO9_ON_SLOT_SHIFT 13
1047 #define WM831X_LDO9_ON_SLOT_WIDTH 3
1048 #define WM831X_LDO9_ON_MODE 0x0100
1049 #define WM831X_LDO9_ON_MODE_MASK 0x0100
1050 #define WM831X_LDO9_ON_MODE_SHIFT 8
1051 #define WM831X_LDO9_ON_MODE_WIDTH 1
1052 #define WM831X_LDO9_ON_VSEL_MASK 0x001F
1053 #define WM831X_LDO9_ON_VSEL_SHIFT 0
1054 #define WM831X_LDO9_ON_VSEL_WIDTH 5
1059 #define WM831X_LDO9_SLP_SLOT_MASK 0xE000
1060 #define WM831X_LDO9_SLP_SLOT_SHIFT 13
1061 #define WM831X_LDO9_SLP_SLOT_WIDTH 3
1062 #define WM831X_LDO9_SLP_MODE 0x0100
1063 #define WM831X_LDO9_SLP_MODE_MASK 0x0100
1064 #define WM831X_LDO9_SLP_MODE_SHIFT 8
1065 #define WM831X_LDO9_SLP_MODE_WIDTH 1
1066 #define WM831X_LDO9_SLP_VSEL_MASK 0x001F
1067 #define WM831X_LDO9_SLP_VSEL_SHIFT 0
1068 #define WM831X_LDO9_SLP_VSEL_WIDTH 5
1073 #define WM831X_LDO10_ERR_ACT_MASK 0xC000
1074 #define WM831X_LDO10_ERR_ACT_SHIFT 14
1075 #define WM831X_LDO10_ERR_ACT_WIDTH 2
1076 #define WM831X_LDO10_HWC_SRC_MASK 0x1800
1077 #define WM831X_LDO10_HWC_SRC_SHIFT 11
1078 #define WM831X_LDO10_HWC_SRC_WIDTH 2
1079 #define WM831X_LDO10_HWC_VSEL 0x0400
1080 #define WM831X_LDO10_HWC_VSEL_MASK 0x0400
1081 #define WM831X_LDO10_HWC_VSEL_SHIFT 10
1082 #define WM831X_LDO10_HWC_VSEL_WIDTH 1
1083 #define WM831X_LDO10_HWC_MODE_MASK 0x0300
1084 #define WM831X_LDO10_HWC_MODE_SHIFT 8
1085 #define WM831X_LDO10_HWC_MODE_WIDTH 2
1086 #define WM831X_LDO10_FLT 0x0080
1087 #define WM831X_LDO10_FLT_MASK 0x0080
1088 #define WM831X_LDO10_FLT_SHIFT 7
1089 #define WM831X_LDO10_FLT_WIDTH 1
1090 #define WM831X_LDO10_SWI 0x0040
1091 #define WM831X_LDO10_SWI_MASK 0x0040
1092 #define WM831X_LDO10_SWI_SHIFT 6
1093 #define WM831X_LDO10_SWI_WIDTH 1
1098 #define WM831X_LDO10_ON_SLOT_MASK 0xE000
1099 #define WM831X_LDO10_ON_SLOT_SHIFT 13
1100 #define WM831X_LDO10_ON_SLOT_WIDTH 3
1101 #define WM831X_LDO10_ON_MODE 0x0100
1102 #define WM831X_LDO10_ON_MODE_MASK 0x0100
1103 #define WM831X_LDO10_ON_MODE_SHIFT 8
1104 #define WM831X_LDO10_ON_MODE_WIDTH 1
1105 #define WM831X_LDO10_ON_VSEL_MASK 0x001F
1106 #define WM831X_LDO10_ON_VSEL_SHIFT 0
1107 #define WM831X_LDO10_ON_VSEL_WIDTH 5
1112 #define WM831X_LDO10_SLP_SLOT_MASK 0xE000
1113 #define WM831X_LDO10_SLP_SLOT_SHIFT 13
1114 #define WM831X_LDO10_SLP_SLOT_WIDTH 3
1115 #define WM831X_LDO10_SLP_MODE 0x0100
1116 #define WM831X_LDO10_SLP_MODE_MASK 0x0100
1117 #define WM831X_LDO10_SLP_MODE_SHIFT 8
1118 #define WM831X_LDO10_SLP_MODE_WIDTH 1
1119 #define WM831X_LDO10_SLP_VSEL_MASK 0x001F
1120 #define WM831X_LDO10_SLP_VSEL_SHIFT 0
1121 #define WM831X_LDO10_SLP_VSEL_WIDTH 5
1126 #define WM831X_LDO11_ON_SLOT_MASK 0xE000
1127 #define WM831X_LDO11_ON_SLOT_SHIFT 13
1128 #define WM831X_LDO11_ON_SLOT_WIDTH 3
1129 #define WM831X_LDO11_OFFENA 0x1000
1130 #define WM831X_LDO11_OFFENA_MASK 0x1000
1131 #define WM831X_LDO11_OFFENA_SHIFT 12
1132 #define WM831X_LDO11_OFFENA_WIDTH 1
1133 #define WM831X_LDO11_VSEL_SRC 0x0080
1134 #define WM831X_LDO11_VSEL_SRC_MASK 0x0080
1135 #define WM831X_LDO11_VSEL_SRC_SHIFT 7
1136 #define WM831X_LDO11_VSEL_SRC_WIDTH 1
1137 #define WM831X_LDO11_ON_VSEL_MASK 0x000F
1138 #define WM831X_LDO11_ON_VSEL_SHIFT 0
1139 #define WM831X_LDO11_ON_VSEL_WIDTH 4
1144 #define WM831X_LDO11_SLP_SLOT_MASK 0xE000
1145 #define WM831X_LDO11_SLP_SLOT_SHIFT 13
1146 #define WM831X_LDO11_SLP_SLOT_WIDTH 3
1147 #define WM831X_LDO11_SLP_VSEL_MASK 0x000F
1148 #define WM831X_LDO11_SLP_VSEL_SHIFT 0
1149 #define WM831X_LDO11_SLP_VSEL_WIDTH 4
1154 #define WM831X_DC4_OK 0x0008
1155 #define WM831X_DC4_OK_MASK 0x0008
1156 #define WM831X_DC4_OK_SHIFT 3
1157 #define WM831X_DC4_OK_WIDTH 1
1158 #define WM831X_DC3_OK 0x0004
1159 #define WM831X_DC3_OK_MASK 0x0004
1160 #define WM831X_DC3_OK_SHIFT 2
1161 #define WM831X_DC3_OK_WIDTH 1
1162 #define WM831X_DC2_OK 0x0002
1163 #define WM831X_DC2_OK_MASK 0x0002
1164 #define WM831X_DC2_OK_SHIFT 1
1165 #define WM831X_DC2_OK_WIDTH 1
1166 #define WM831X_DC1_OK 0x0001
1167 #define WM831X_DC1_OK_MASK 0x0001
1168 #define WM831X_DC1_OK_SHIFT 0
1169 #define WM831X_DC1_OK_WIDTH 1
1174 #define WM831X_LDO10_OK 0x0200
1175 #define WM831X_LDO10_OK_MASK 0x0200
1176 #define WM831X_LDO10_OK_SHIFT 9
1177 #define WM831X_LDO10_OK_WIDTH 1
1178 #define WM831X_LDO9_OK 0x0100
1179 #define WM831X_LDO9_OK_MASK 0x0100
1180 #define WM831X_LDO9_OK_SHIFT 8
1181 #define WM831X_LDO9_OK_WIDTH 1
1182 #define WM831X_LDO8_OK 0x0080
1183 #define WM831X_LDO8_OK_MASK 0x0080
1184 #define WM831X_LDO8_OK_SHIFT 7
1185 #define WM831X_LDO8_OK_WIDTH 1
1186 #define WM831X_LDO7_OK 0x0040
1187 #define WM831X_LDO7_OK_MASK 0x0040
1188 #define WM831X_LDO7_OK_SHIFT 6
1189 #define WM831X_LDO7_OK_WIDTH 1
1190 #define WM831X_LDO6_OK 0x0020
1191 #define WM831X_LDO6_OK_MASK 0x0020
1192 #define WM831X_LDO6_OK_SHIFT 5
1193 #define WM831X_LDO6_OK_WIDTH 1
1194 #define WM831X_LDO5_OK 0x0010
1195 #define WM831X_LDO5_OK_MASK 0x0010
1196 #define WM831X_LDO5_OK_SHIFT 4
1197 #define WM831X_LDO5_OK_WIDTH 1
1198 #define WM831X_LDO4_OK 0x0008
1199 #define WM831X_LDO4_OK_MASK 0x0008
1200 #define WM831X_LDO4_OK_SHIFT 3
1201 #define WM831X_LDO4_OK_WIDTH 1
1202 #define WM831X_LDO3_OK 0x0004
1203 #define WM831X_LDO3_OK_MASK 0x0004
1204 #define WM831X_LDO3_OK_SHIFT 2
1205 #define WM831X_LDO3_OK_WIDTH 1
1206 #define WM831X_LDO2_OK 0x0002
1207 #define WM831X_LDO2_OK_MASK 0x0002
1208 #define WM831X_LDO2_OK_SHIFT 1
1209 #define WM831X_LDO2_OK_WIDTH 1
1210 #define WM831X_LDO1_OK 0x0001
1211 #define WM831X_LDO1_OK_MASK 0x0001
1212 #define WM831X_LDO1_OK_SHIFT 0
1213 #define WM831X_LDO1_OK_WIDTH 1
1215 #define WM831X_ISINK_MAX_ISEL 55