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pinmux_defs_asm.h
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1 #ifndef __pinmux_defs_asm_h
2 #define __pinmux_defs_asm_h
3 
4 /*
5  * This file is autogenerated from
6  * file: pinmux.r
7  *
8  * by ../../../tools/rdesc/bin/rdes2c -asm -outfile pinmux_defs_asm.h pinmux.r
9  * Any changes here will be lost.
10  *
11  * -*- buffer-read-only: t -*-
12  */
13 
14 #ifndef REG_FIELD
15 #define REG_FIELD( scope, reg, field, value ) \
16  REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
17 #define REG_FIELD_X_( value, shift ) ((value) << shift)
18 #endif
19 
20 #ifndef REG_STATE
21 #define REG_STATE( scope, reg, field, symbolic_value ) \
22  REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
23 #define REG_STATE_X_( k, shift ) (k << shift)
24 #endif
25 
26 #ifndef REG_MASK
27 #define REG_MASK( scope, reg, field ) \
28  REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
29 #define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
30 #endif
31 
32 #ifndef REG_LSB
33 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
34 #endif
35 
36 #ifndef REG_BIT
37 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
38 #endif
39 
40 #ifndef REG_ADDR
41 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
42 #define REG_ADDR_X_( inst, offs ) ((inst) + offs)
43 #endif
44 
45 #ifndef REG_ADDR_VECT
46 #define REG_ADDR_VECT( scope, inst, reg, index ) \
47  REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
48  STRIDE_##scope##_##reg )
49 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
50  ((inst) + offs + (index) * stride)
51 #endif
52 
53 /* Register rw_hwprot, scope pinmux, type rw */
54 #define reg_pinmux_rw_hwprot___eth___lsb 0
55 #define reg_pinmux_rw_hwprot___eth___width 1
56 #define reg_pinmux_rw_hwprot___eth___bit 0
57 #define reg_pinmux_rw_hwprot___eth_mdio___lsb 1
58 #define reg_pinmux_rw_hwprot___eth_mdio___width 1
59 #define reg_pinmux_rw_hwprot___eth_mdio___bit 1
60 #define reg_pinmux_rw_hwprot___geth___lsb 2
61 #define reg_pinmux_rw_hwprot___geth___width 1
62 #define reg_pinmux_rw_hwprot___geth___bit 2
63 #define reg_pinmux_rw_hwprot___tg___lsb 3
64 #define reg_pinmux_rw_hwprot___tg___width 1
65 #define reg_pinmux_rw_hwprot___tg___bit 3
66 #define reg_pinmux_rw_hwprot___tg_clk___lsb 4
67 #define reg_pinmux_rw_hwprot___tg_clk___width 1
68 #define reg_pinmux_rw_hwprot___tg_clk___bit 4
69 #define reg_pinmux_rw_hwprot___vout___lsb 5
70 #define reg_pinmux_rw_hwprot___vout___width 1
71 #define reg_pinmux_rw_hwprot___vout___bit 5
72 #define reg_pinmux_rw_hwprot___vout_sync___lsb 6
73 #define reg_pinmux_rw_hwprot___vout_sync___width 1
74 #define reg_pinmux_rw_hwprot___vout_sync___bit 6
75 #define reg_pinmux_rw_hwprot___ser1___lsb 7
76 #define reg_pinmux_rw_hwprot___ser1___width 1
77 #define reg_pinmux_rw_hwprot___ser1___bit 7
78 #define reg_pinmux_rw_hwprot___ser2___lsb 8
79 #define reg_pinmux_rw_hwprot___ser2___width 1
80 #define reg_pinmux_rw_hwprot___ser2___bit 8
81 #define reg_pinmux_rw_hwprot___ser3___lsb 9
82 #define reg_pinmux_rw_hwprot___ser3___width 1
83 #define reg_pinmux_rw_hwprot___ser3___bit 9
84 #define reg_pinmux_rw_hwprot___ser4___lsb 10
85 #define reg_pinmux_rw_hwprot___ser4___width 1
86 #define reg_pinmux_rw_hwprot___ser4___bit 10
87 #define reg_pinmux_rw_hwprot___sser___lsb 11
88 #define reg_pinmux_rw_hwprot___sser___width 1
89 #define reg_pinmux_rw_hwprot___sser___bit 11
90 #define reg_pinmux_rw_hwprot___pwm0___lsb 12
91 #define reg_pinmux_rw_hwprot___pwm0___width 1
92 #define reg_pinmux_rw_hwprot___pwm0___bit 12
93 #define reg_pinmux_rw_hwprot___pwm1___lsb 13
94 #define reg_pinmux_rw_hwprot___pwm1___width 1
95 #define reg_pinmux_rw_hwprot___pwm1___bit 13
96 #define reg_pinmux_rw_hwprot___pwm2___lsb 14
97 #define reg_pinmux_rw_hwprot___pwm2___width 1
98 #define reg_pinmux_rw_hwprot___pwm2___bit 14
99 #define reg_pinmux_rw_hwprot___timer0___lsb 15
100 #define reg_pinmux_rw_hwprot___timer0___width 1
101 #define reg_pinmux_rw_hwprot___timer0___bit 15
102 #define reg_pinmux_rw_hwprot___timer1___lsb 16
103 #define reg_pinmux_rw_hwprot___timer1___width 1
104 #define reg_pinmux_rw_hwprot___timer1___bit 16
105 #define reg_pinmux_rw_hwprot___pio___lsb 17
106 #define reg_pinmux_rw_hwprot___pio___width 1
107 #define reg_pinmux_rw_hwprot___pio___bit 17
108 #define reg_pinmux_rw_hwprot___i2c0___lsb 18
109 #define reg_pinmux_rw_hwprot___i2c0___width 1
110 #define reg_pinmux_rw_hwprot___i2c0___bit 18
111 #define reg_pinmux_rw_hwprot___i2c1___lsb 19
112 #define reg_pinmux_rw_hwprot___i2c1___width 1
113 #define reg_pinmux_rw_hwprot___i2c1___bit 19
114 #define reg_pinmux_rw_hwprot___i2c1_sda1___lsb 20
115 #define reg_pinmux_rw_hwprot___i2c1_sda1___width 1
116 #define reg_pinmux_rw_hwprot___i2c1_sda1___bit 20
117 #define reg_pinmux_rw_hwprot___i2c1_sda2___lsb 21
118 #define reg_pinmux_rw_hwprot___i2c1_sda2___width 1
119 #define reg_pinmux_rw_hwprot___i2c1_sda2___bit 21
120 #define reg_pinmux_rw_hwprot___i2c1_sda3___lsb 22
121 #define reg_pinmux_rw_hwprot___i2c1_sda3___width 1
122 #define reg_pinmux_rw_hwprot___i2c1_sda3___bit 22
123 #define reg_pinmux_rw_hwprot___i2c1_sen___lsb 23
124 #define reg_pinmux_rw_hwprot___i2c1_sen___width 1
125 #define reg_pinmux_rw_hwprot___i2c1_sen___bit 23
126 #define reg_pinmux_rw_hwprot_offset 0
127 
128 /* Register rw_gio_pa, scope pinmux, type rw */
129 #define reg_pinmux_rw_gio_pa___pa0___lsb 0
130 #define reg_pinmux_rw_gio_pa___pa0___width 1
131 #define reg_pinmux_rw_gio_pa___pa0___bit 0
132 #define reg_pinmux_rw_gio_pa___pa1___lsb 1
133 #define reg_pinmux_rw_gio_pa___pa1___width 1
134 #define reg_pinmux_rw_gio_pa___pa1___bit 1
135 #define reg_pinmux_rw_gio_pa___pa2___lsb 2
136 #define reg_pinmux_rw_gio_pa___pa2___width 1
137 #define reg_pinmux_rw_gio_pa___pa2___bit 2
138 #define reg_pinmux_rw_gio_pa___pa3___lsb 3
139 #define reg_pinmux_rw_gio_pa___pa3___width 1
140 #define reg_pinmux_rw_gio_pa___pa3___bit 3
141 #define reg_pinmux_rw_gio_pa___pa4___lsb 4
142 #define reg_pinmux_rw_gio_pa___pa4___width 1
143 #define reg_pinmux_rw_gio_pa___pa4___bit 4
144 #define reg_pinmux_rw_gio_pa___pa5___lsb 5
145 #define reg_pinmux_rw_gio_pa___pa5___width 1
146 #define reg_pinmux_rw_gio_pa___pa5___bit 5
147 #define reg_pinmux_rw_gio_pa___pa6___lsb 6
148 #define reg_pinmux_rw_gio_pa___pa6___width 1
149 #define reg_pinmux_rw_gio_pa___pa6___bit 6
150 #define reg_pinmux_rw_gio_pa___pa7___lsb 7
151 #define reg_pinmux_rw_gio_pa___pa7___width 1
152 #define reg_pinmux_rw_gio_pa___pa7___bit 7
153 #define reg_pinmux_rw_gio_pa___pa8___lsb 8
154 #define reg_pinmux_rw_gio_pa___pa8___width 1
155 #define reg_pinmux_rw_gio_pa___pa8___bit 8
156 #define reg_pinmux_rw_gio_pa___pa9___lsb 9
157 #define reg_pinmux_rw_gio_pa___pa9___width 1
158 #define reg_pinmux_rw_gio_pa___pa9___bit 9
159 #define reg_pinmux_rw_gio_pa___pa10___lsb 10
160 #define reg_pinmux_rw_gio_pa___pa10___width 1
161 #define reg_pinmux_rw_gio_pa___pa10___bit 10
162 #define reg_pinmux_rw_gio_pa___pa11___lsb 11
163 #define reg_pinmux_rw_gio_pa___pa11___width 1
164 #define reg_pinmux_rw_gio_pa___pa11___bit 11
165 #define reg_pinmux_rw_gio_pa___pa12___lsb 12
166 #define reg_pinmux_rw_gio_pa___pa12___width 1
167 #define reg_pinmux_rw_gio_pa___pa12___bit 12
168 #define reg_pinmux_rw_gio_pa___pa13___lsb 13
169 #define reg_pinmux_rw_gio_pa___pa13___width 1
170 #define reg_pinmux_rw_gio_pa___pa13___bit 13
171 #define reg_pinmux_rw_gio_pa___pa14___lsb 14
172 #define reg_pinmux_rw_gio_pa___pa14___width 1
173 #define reg_pinmux_rw_gio_pa___pa14___bit 14
174 #define reg_pinmux_rw_gio_pa___pa15___lsb 15
175 #define reg_pinmux_rw_gio_pa___pa15___width 1
176 #define reg_pinmux_rw_gio_pa___pa15___bit 15
177 #define reg_pinmux_rw_gio_pa___pa16___lsb 16
178 #define reg_pinmux_rw_gio_pa___pa16___width 1
179 #define reg_pinmux_rw_gio_pa___pa16___bit 16
180 #define reg_pinmux_rw_gio_pa___pa17___lsb 17
181 #define reg_pinmux_rw_gio_pa___pa17___width 1
182 #define reg_pinmux_rw_gio_pa___pa17___bit 17
183 #define reg_pinmux_rw_gio_pa___pa18___lsb 18
184 #define reg_pinmux_rw_gio_pa___pa18___width 1
185 #define reg_pinmux_rw_gio_pa___pa18___bit 18
186 #define reg_pinmux_rw_gio_pa___pa19___lsb 19
187 #define reg_pinmux_rw_gio_pa___pa19___width 1
188 #define reg_pinmux_rw_gio_pa___pa19___bit 19
189 #define reg_pinmux_rw_gio_pa___pa20___lsb 20
190 #define reg_pinmux_rw_gio_pa___pa20___width 1
191 #define reg_pinmux_rw_gio_pa___pa20___bit 20
192 #define reg_pinmux_rw_gio_pa___pa21___lsb 21
193 #define reg_pinmux_rw_gio_pa___pa21___width 1
194 #define reg_pinmux_rw_gio_pa___pa21___bit 21
195 #define reg_pinmux_rw_gio_pa___pa22___lsb 22
196 #define reg_pinmux_rw_gio_pa___pa22___width 1
197 #define reg_pinmux_rw_gio_pa___pa22___bit 22
198 #define reg_pinmux_rw_gio_pa___pa23___lsb 23
199 #define reg_pinmux_rw_gio_pa___pa23___width 1
200 #define reg_pinmux_rw_gio_pa___pa23___bit 23
201 #define reg_pinmux_rw_gio_pa___pa24___lsb 24
202 #define reg_pinmux_rw_gio_pa___pa24___width 1
203 #define reg_pinmux_rw_gio_pa___pa24___bit 24
204 #define reg_pinmux_rw_gio_pa___pa25___lsb 25
205 #define reg_pinmux_rw_gio_pa___pa25___width 1
206 #define reg_pinmux_rw_gio_pa___pa25___bit 25
207 #define reg_pinmux_rw_gio_pa___pa26___lsb 26
208 #define reg_pinmux_rw_gio_pa___pa26___width 1
209 #define reg_pinmux_rw_gio_pa___pa26___bit 26
210 #define reg_pinmux_rw_gio_pa___pa27___lsb 27
211 #define reg_pinmux_rw_gio_pa___pa27___width 1
212 #define reg_pinmux_rw_gio_pa___pa27___bit 27
213 #define reg_pinmux_rw_gio_pa___pa28___lsb 28
214 #define reg_pinmux_rw_gio_pa___pa28___width 1
215 #define reg_pinmux_rw_gio_pa___pa28___bit 28
216 #define reg_pinmux_rw_gio_pa___pa29___lsb 29
217 #define reg_pinmux_rw_gio_pa___pa29___width 1
218 #define reg_pinmux_rw_gio_pa___pa29___bit 29
219 #define reg_pinmux_rw_gio_pa___pa30___lsb 30
220 #define reg_pinmux_rw_gio_pa___pa30___width 1
221 #define reg_pinmux_rw_gio_pa___pa30___bit 30
222 #define reg_pinmux_rw_gio_pa___pa31___lsb 31
223 #define reg_pinmux_rw_gio_pa___pa31___width 1
224 #define reg_pinmux_rw_gio_pa___pa31___bit 31
225 #define reg_pinmux_rw_gio_pa_offset 4
226 
227 /* Register rw_gio_pb, scope pinmux, type rw */
228 #define reg_pinmux_rw_gio_pb___pb0___lsb 0
229 #define reg_pinmux_rw_gio_pb___pb0___width 1
230 #define reg_pinmux_rw_gio_pb___pb0___bit 0
231 #define reg_pinmux_rw_gio_pb___pb1___lsb 1
232 #define reg_pinmux_rw_gio_pb___pb1___width 1
233 #define reg_pinmux_rw_gio_pb___pb1___bit 1
234 #define reg_pinmux_rw_gio_pb___pb2___lsb 2
235 #define reg_pinmux_rw_gio_pb___pb2___width 1
236 #define reg_pinmux_rw_gio_pb___pb2___bit 2
237 #define reg_pinmux_rw_gio_pb___pb3___lsb 3
238 #define reg_pinmux_rw_gio_pb___pb3___width 1
239 #define reg_pinmux_rw_gio_pb___pb3___bit 3
240 #define reg_pinmux_rw_gio_pb___pb4___lsb 4
241 #define reg_pinmux_rw_gio_pb___pb4___width 1
242 #define reg_pinmux_rw_gio_pb___pb4___bit 4
243 #define reg_pinmux_rw_gio_pb___pb5___lsb 5
244 #define reg_pinmux_rw_gio_pb___pb5___width 1
245 #define reg_pinmux_rw_gio_pb___pb5___bit 5
246 #define reg_pinmux_rw_gio_pb___pb6___lsb 6
247 #define reg_pinmux_rw_gio_pb___pb6___width 1
248 #define reg_pinmux_rw_gio_pb___pb6___bit 6
249 #define reg_pinmux_rw_gio_pb___pb7___lsb 7
250 #define reg_pinmux_rw_gio_pb___pb7___width 1
251 #define reg_pinmux_rw_gio_pb___pb7___bit 7
252 #define reg_pinmux_rw_gio_pb___pb8___lsb 8
253 #define reg_pinmux_rw_gio_pb___pb8___width 1
254 #define reg_pinmux_rw_gio_pb___pb8___bit 8
255 #define reg_pinmux_rw_gio_pb___pb9___lsb 9
256 #define reg_pinmux_rw_gio_pb___pb9___width 1
257 #define reg_pinmux_rw_gio_pb___pb9___bit 9
258 #define reg_pinmux_rw_gio_pb___pb10___lsb 10
259 #define reg_pinmux_rw_gio_pb___pb10___width 1
260 #define reg_pinmux_rw_gio_pb___pb10___bit 10
261 #define reg_pinmux_rw_gio_pb___pb11___lsb 11
262 #define reg_pinmux_rw_gio_pb___pb11___width 1
263 #define reg_pinmux_rw_gio_pb___pb11___bit 11
264 #define reg_pinmux_rw_gio_pb___pb12___lsb 12
265 #define reg_pinmux_rw_gio_pb___pb12___width 1
266 #define reg_pinmux_rw_gio_pb___pb12___bit 12
267 #define reg_pinmux_rw_gio_pb___pb13___lsb 13
268 #define reg_pinmux_rw_gio_pb___pb13___width 1
269 #define reg_pinmux_rw_gio_pb___pb13___bit 13
270 #define reg_pinmux_rw_gio_pb___pb14___lsb 14
271 #define reg_pinmux_rw_gio_pb___pb14___width 1
272 #define reg_pinmux_rw_gio_pb___pb14___bit 14
273 #define reg_pinmux_rw_gio_pb___pb15___lsb 15
274 #define reg_pinmux_rw_gio_pb___pb15___width 1
275 #define reg_pinmux_rw_gio_pb___pb15___bit 15
276 #define reg_pinmux_rw_gio_pb___pb16___lsb 16
277 #define reg_pinmux_rw_gio_pb___pb16___width 1
278 #define reg_pinmux_rw_gio_pb___pb16___bit 16
279 #define reg_pinmux_rw_gio_pb___pb17___lsb 17
280 #define reg_pinmux_rw_gio_pb___pb17___width 1
281 #define reg_pinmux_rw_gio_pb___pb17___bit 17
282 #define reg_pinmux_rw_gio_pb___pb18___lsb 18
283 #define reg_pinmux_rw_gio_pb___pb18___width 1
284 #define reg_pinmux_rw_gio_pb___pb18___bit 18
285 #define reg_pinmux_rw_gio_pb___pb19___lsb 19
286 #define reg_pinmux_rw_gio_pb___pb19___width 1
287 #define reg_pinmux_rw_gio_pb___pb19___bit 19
288 #define reg_pinmux_rw_gio_pb___pb20___lsb 20
289 #define reg_pinmux_rw_gio_pb___pb20___width 1
290 #define reg_pinmux_rw_gio_pb___pb20___bit 20
291 #define reg_pinmux_rw_gio_pb___pb21___lsb 21
292 #define reg_pinmux_rw_gio_pb___pb21___width 1
293 #define reg_pinmux_rw_gio_pb___pb21___bit 21
294 #define reg_pinmux_rw_gio_pb___pb22___lsb 22
295 #define reg_pinmux_rw_gio_pb___pb22___width 1
296 #define reg_pinmux_rw_gio_pb___pb22___bit 22
297 #define reg_pinmux_rw_gio_pb___pb23___lsb 23
298 #define reg_pinmux_rw_gio_pb___pb23___width 1
299 #define reg_pinmux_rw_gio_pb___pb23___bit 23
300 #define reg_pinmux_rw_gio_pb___pb24___lsb 24
301 #define reg_pinmux_rw_gio_pb___pb24___width 1
302 #define reg_pinmux_rw_gio_pb___pb24___bit 24
303 #define reg_pinmux_rw_gio_pb___pb25___lsb 25
304 #define reg_pinmux_rw_gio_pb___pb25___width 1
305 #define reg_pinmux_rw_gio_pb___pb25___bit 25
306 #define reg_pinmux_rw_gio_pb___pb26___lsb 26
307 #define reg_pinmux_rw_gio_pb___pb26___width 1
308 #define reg_pinmux_rw_gio_pb___pb26___bit 26
309 #define reg_pinmux_rw_gio_pb___pb27___lsb 27
310 #define reg_pinmux_rw_gio_pb___pb27___width 1
311 #define reg_pinmux_rw_gio_pb___pb27___bit 27
312 #define reg_pinmux_rw_gio_pb___pb28___lsb 28
313 #define reg_pinmux_rw_gio_pb___pb28___width 1
314 #define reg_pinmux_rw_gio_pb___pb28___bit 28
315 #define reg_pinmux_rw_gio_pb___pb29___lsb 29
316 #define reg_pinmux_rw_gio_pb___pb29___width 1
317 #define reg_pinmux_rw_gio_pb___pb29___bit 29
318 #define reg_pinmux_rw_gio_pb___pb30___lsb 30
319 #define reg_pinmux_rw_gio_pb___pb30___width 1
320 #define reg_pinmux_rw_gio_pb___pb30___bit 30
321 #define reg_pinmux_rw_gio_pb___pb31___lsb 31
322 #define reg_pinmux_rw_gio_pb___pb31___width 1
323 #define reg_pinmux_rw_gio_pb___pb31___bit 31
324 #define reg_pinmux_rw_gio_pb_offset 8
325 
326 /* Register rw_gio_pc, scope pinmux, type rw */
327 #define reg_pinmux_rw_gio_pc___pc0___lsb 0
328 #define reg_pinmux_rw_gio_pc___pc0___width 1
329 #define reg_pinmux_rw_gio_pc___pc0___bit 0
330 #define reg_pinmux_rw_gio_pc___pc1___lsb 1
331 #define reg_pinmux_rw_gio_pc___pc1___width 1
332 #define reg_pinmux_rw_gio_pc___pc1___bit 1
333 #define reg_pinmux_rw_gio_pc___pc2___lsb 2
334 #define reg_pinmux_rw_gio_pc___pc2___width 1
335 #define reg_pinmux_rw_gio_pc___pc2___bit 2
336 #define reg_pinmux_rw_gio_pc___pc3___lsb 3
337 #define reg_pinmux_rw_gio_pc___pc3___width 1
338 #define reg_pinmux_rw_gio_pc___pc3___bit 3
339 #define reg_pinmux_rw_gio_pc___pc4___lsb 4
340 #define reg_pinmux_rw_gio_pc___pc4___width 1
341 #define reg_pinmux_rw_gio_pc___pc4___bit 4
342 #define reg_pinmux_rw_gio_pc___pc5___lsb 5
343 #define reg_pinmux_rw_gio_pc___pc5___width 1
344 #define reg_pinmux_rw_gio_pc___pc5___bit 5
345 #define reg_pinmux_rw_gio_pc___pc6___lsb 6
346 #define reg_pinmux_rw_gio_pc___pc6___width 1
347 #define reg_pinmux_rw_gio_pc___pc6___bit 6
348 #define reg_pinmux_rw_gio_pc___pc7___lsb 7
349 #define reg_pinmux_rw_gio_pc___pc7___width 1
350 #define reg_pinmux_rw_gio_pc___pc7___bit 7
351 #define reg_pinmux_rw_gio_pc___pc8___lsb 8
352 #define reg_pinmux_rw_gio_pc___pc8___width 1
353 #define reg_pinmux_rw_gio_pc___pc8___bit 8
354 #define reg_pinmux_rw_gio_pc___pc9___lsb 9
355 #define reg_pinmux_rw_gio_pc___pc9___width 1
356 #define reg_pinmux_rw_gio_pc___pc9___bit 9
357 #define reg_pinmux_rw_gio_pc___pc10___lsb 10
358 #define reg_pinmux_rw_gio_pc___pc10___width 1
359 #define reg_pinmux_rw_gio_pc___pc10___bit 10
360 #define reg_pinmux_rw_gio_pc___pc11___lsb 11
361 #define reg_pinmux_rw_gio_pc___pc11___width 1
362 #define reg_pinmux_rw_gio_pc___pc11___bit 11
363 #define reg_pinmux_rw_gio_pc___pc12___lsb 12
364 #define reg_pinmux_rw_gio_pc___pc12___width 1
365 #define reg_pinmux_rw_gio_pc___pc12___bit 12
366 #define reg_pinmux_rw_gio_pc___pc13___lsb 13
367 #define reg_pinmux_rw_gio_pc___pc13___width 1
368 #define reg_pinmux_rw_gio_pc___pc13___bit 13
369 #define reg_pinmux_rw_gio_pc___pc14___lsb 14
370 #define reg_pinmux_rw_gio_pc___pc14___width 1
371 #define reg_pinmux_rw_gio_pc___pc14___bit 14
372 #define reg_pinmux_rw_gio_pc___pc15___lsb 15
373 #define reg_pinmux_rw_gio_pc___pc15___width 1
374 #define reg_pinmux_rw_gio_pc___pc15___bit 15
375 #define reg_pinmux_rw_gio_pc_offset 12
376 
377 /* Register rw_iop_pa, scope pinmux, type rw */
378 #define reg_pinmux_rw_iop_pa___pa0___lsb 0
379 #define reg_pinmux_rw_iop_pa___pa0___width 1
380 #define reg_pinmux_rw_iop_pa___pa0___bit 0
381 #define reg_pinmux_rw_iop_pa___pa1___lsb 1
382 #define reg_pinmux_rw_iop_pa___pa1___width 1
383 #define reg_pinmux_rw_iop_pa___pa1___bit 1
384 #define reg_pinmux_rw_iop_pa___pa2___lsb 2
385 #define reg_pinmux_rw_iop_pa___pa2___width 1
386 #define reg_pinmux_rw_iop_pa___pa2___bit 2
387 #define reg_pinmux_rw_iop_pa___pa3___lsb 3
388 #define reg_pinmux_rw_iop_pa___pa3___width 1
389 #define reg_pinmux_rw_iop_pa___pa3___bit 3
390 #define reg_pinmux_rw_iop_pa___pa4___lsb 4
391 #define reg_pinmux_rw_iop_pa___pa4___width 1
392 #define reg_pinmux_rw_iop_pa___pa4___bit 4
393 #define reg_pinmux_rw_iop_pa___pa5___lsb 5
394 #define reg_pinmux_rw_iop_pa___pa5___width 1
395 #define reg_pinmux_rw_iop_pa___pa5___bit 5
396 #define reg_pinmux_rw_iop_pa___pa6___lsb 6
397 #define reg_pinmux_rw_iop_pa___pa6___width 1
398 #define reg_pinmux_rw_iop_pa___pa6___bit 6
399 #define reg_pinmux_rw_iop_pa___pa7___lsb 7
400 #define reg_pinmux_rw_iop_pa___pa7___width 1
401 #define reg_pinmux_rw_iop_pa___pa7___bit 7
402 #define reg_pinmux_rw_iop_pa___pa8___lsb 8
403 #define reg_pinmux_rw_iop_pa___pa8___width 1
404 #define reg_pinmux_rw_iop_pa___pa8___bit 8
405 #define reg_pinmux_rw_iop_pa___pa9___lsb 9
406 #define reg_pinmux_rw_iop_pa___pa9___width 1
407 #define reg_pinmux_rw_iop_pa___pa9___bit 9
408 #define reg_pinmux_rw_iop_pa___pa10___lsb 10
409 #define reg_pinmux_rw_iop_pa___pa10___width 1
410 #define reg_pinmux_rw_iop_pa___pa10___bit 10
411 #define reg_pinmux_rw_iop_pa___pa11___lsb 11
412 #define reg_pinmux_rw_iop_pa___pa11___width 1
413 #define reg_pinmux_rw_iop_pa___pa11___bit 11
414 #define reg_pinmux_rw_iop_pa___pa12___lsb 12
415 #define reg_pinmux_rw_iop_pa___pa12___width 1
416 #define reg_pinmux_rw_iop_pa___pa12___bit 12
417 #define reg_pinmux_rw_iop_pa___pa13___lsb 13
418 #define reg_pinmux_rw_iop_pa___pa13___width 1
419 #define reg_pinmux_rw_iop_pa___pa13___bit 13
420 #define reg_pinmux_rw_iop_pa___pa14___lsb 14
421 #define reg_pinmux_rw_iop_pa___pa14___width 1
422 #define reg_pinmux_rw_iop_pa___pa14___bit 14
423 #define reg_pinmux_rw_iop_pa___pa15___lsb 15
424 #define reg_pinmux_rw_iop_pa___pa15___width 1
425 #define reg_pinmux_rw_iop_pa___pa15___bit 15
426 #define reg_pinmux_rw_iop_pa___pa16___lsb 16
427 #define reg_pinmux_rw_iop_pa___pa16___width 1
428 #define reg_pinmux_rw_iop_pa___pa16___bit 16
429 #define reg_pinmux_rw_iop_pa___pa17___lsb 17
430 #define reg_pinmux_rw_iop_pa___pa17___width 1
431 #define reg_pinmux_rw_iop_pa___pa17___bit 17
432 #define reg_pinmux_rw_iop_pa___pa18___lsb 18
433 #define reg_pinmux_rw_iop_pa___pa18___width 1
434 #define reg_pinmux_rw_iop_pa___pa18___bit 18
435 #define reg_pinmux_rw_iop_pa___pa19___lsb 19
436 #define reg_pinmux_rw_iop_pa___pa19___width 1
437 #define reg_pinmux_rw_iop_pa___pa19___bit 19
438 #define reg_pinmux_rw_iop_pa___pa20___lsb 20
439 #define reg_pinmux_rw_iop_pa___pa20___width 1
440 #define reg_pinmux_rw_iop_pa___pa20___bit 20
441 #define reg_pinmux_rw_iop_pa___pa21___lsb 21
442 #define reg_pinmux_rw_iop_pa___pa21___width 1
443 #define reg_pinmux_rw_iop_pa___pa21___bit 21
444 #define reg_pinmux_rw_iop_pa___pa22___lsb 22
445 #define reg_pinmux_rw_iop_pa___pa22___width 1
446 #define reg_pinmux_rw_iop_pa___pa22___bit 22
447 #define reg_pinmux_rw_iop_pa___pa23___lsb 23
448 #define reg_pinmux_rw_iop_pa___pa23___width 1
449 #define reg_pinmux_rw_iop_pa___pa23___bit 23
450 #define reg_pinmux_rw_iop_pa___pa24___lsb 24
451 #define reg_pinmux_rw_iop_pa___pa24___width 1
452 #define reg_pinmux_rw_iop_pa___pa24___bit 24
453 #define reg_pinmux_rw_iop_pa___pa25___lsb 25
454 #define reg_pinmux_rw_iop_pa___pa25___width 1
455 #define reg_pinmux_rw_iop_pa___pa25___bit 25
456 #define reg_pinmux_rw_iop_pa___pa26___lsb 26
457 #define reg_pinmux_rw_iop_pa___pa26___width 1
458 #define reg_pinmux_rw_iop_pa___pa26___bit 26
459 #define reg_pinmux_rw_iop_pa___pa27___lsb 27
460 #define reg_pinmux_rw_iop_pa___pa27___width 1
461 #define reg_pinmux_rw_iop_pa___pa27___bit 27
462 #define reg_pinmux_rw_iop_pa___pa28___lsb 28
463 #define reg_pinmux_rw_iop_pa___pa28___width 1
464 #define reg_pinmux_rw_iop_pa___pa28___bit 28
465 #define reg_pinmux_rw_iop_pa___pa29___lsb 29
466 #define reg_pinmux_rw_iop_pa___pa29___width 1
467 #define reg_pinmux_rw_iop_pa___pa29___bit 29
468 #define reg_pinmux_rw_iop_pa___pa30___lsb 30
469 #define reg_pinmux_rw_iop_pa___pa30___width 1
470 #define reg_pinmux_rw_iop_pa___pa30___bit 30
471 #define reg_pinmux_rw_iop_pa___pa31___lsb 31
472 #define reg_pinmux_rw_iop_pa___pa31___width 1
473 #define reg_pinmux_rw_iop_pa___pa31___bit 31
474 #define reg_pinmux_rw_iop_pa_offset 16
475 
476 /* Register rw_iop_pb, scope pinmux, type rw */
477 #define reg_pinmux_rw_iop_pb___pb0___lsb 0
478 #define reg_pinmux_rw_iop_pb___pb0___width 1
479 #define reg_pinmux_rw_iop_pb___pb0___bit 0
480 #define reg_pinmux_rw_iop_pb___pb1___lsb 1
481 #define reg_pinmux_rw_iop_pb___pb1___width 1
482 #define reg_pinmux_rw_iop_pb___pb1___bit 1
483 #define reg_pinmux_rw_iop_pb___pb2___lsb 2
484 #define reg_pinmux_rw_iop_pb___pb2___width 1
485 #define reg_pinmux_rw_iop_pb___pb2___bit 2
486 #define reg_pinmux_rw_iop_pb___pb3___lsb 3
487 #define reg_pinmux_rw_iop_pb___pb3___width 1
488 #define reg_pinmux_rw_iop_pb___pb3___bit 3
489 #define reg_pinmux_rw_iop_pb___pb4___lsb 4
490 #define reg_pinmux_rw_iop_pb___pb4___width 1
491 #define reg_pinmux_rw_iop_pb___pb4___bit 4
492 #define reg_pinmux_rw_iop_pb___pb5___lsb 5
493 #define reg_pinmux_rw_iop_pb___pb5___width 1
494 #define reg_pinmux_rw_iop_pb___pb5___bit 5
495 #define reg_pinmux_rw_iop_pb___pb6___lsb 6
496 #define reg_pinmux_rw_iop_pb___pb6___width 1
497 #define reg_pinmux_rw_iop_pb___pb6___bit 6
498 #define reg_pinmux_rw_iop_pb___pb7___lsb 7
499 #define reg_pinmux_rw_iop_pb___pb7___width 1
500 #define reg_pinmux_rw_iop_pb___pb7___bit 7
501 #define reg_pinmux_rw_iop_pb_offset 20
502 
503 /* Register rw_iop_pio, scope pinmux, type rw */
504 #define reg_pinmux_rw_iop_pio___d0___lsb 0
505 #define reg_pinmux_rw_iop_pio___d0___width 1
506 #define reg_pinmux_rw_iop_pio___d0___bit 0
507 #define reg_pinmux_rw_iop_pio___d1___lsb 1
508 #define reg_pinmux_rw_iop_pio___d1___width 1
509 #define reg_pinmux_rw_iop_pio___d1___bit 1
510 #define reg_pinmux_rw_iop_pio___d2___lsb 2
511 #define reg_pinmux_rw_iop_pio___d2___width 1
512 #define reg_pinmux_rw_iop_pio___d2___bit 2
513 #define reg_pinmux_rw_iop_pio___d3___lsb 3
514 #define reg_pinmux_rw_iop_pio___d3___width 1
515 #define reg_pinmux_rw_iop_pio___d3___bit 3
516 #define reg_pinmux_rw_iop_pio___d4___lsb 4
517 #define reg_pinmux_rw_iop_pio___d4___width 1
518 #define reg_pinmux_rw_iop_pio___d4___bit 4
519 #define reg_pinmux_rw_iop_pio___d5___lsb 5
520 #define reg_pinmux_rw_iop_pio___d5___width 1
521 #define reg_pinmux_rw_iop_pio___d5___bit 5
522 #define reg_pinmux_rw_iop_pio___d6___lsb 6
523 #define reg_pinmux_rw_iop_pio___d6___width 1
524 #define reg_pinmux_rw_iop_pio___d6___bit 6
525 #define reg_pinmux_rw_iop_pio___d7___lsb 7
526 #define reg_pinmux_rw_iop_pio___d7___width 1
527 #define reg_pinmux_rw_iop_pio___d7___bit 7
528 #define reg_pinmux_rw_iop_pio___rd_n___lsb 8
529 #define reg_pinmux_rw_iop_pio___rd_n___width 1
530 #define reg_pinmux_rw_iop_pio___rd_n___bit 8
531 #define reg_pinmux_rw_iop_pio___wr_n___lsb 9
532 #define reg_pinmux_rw_iop_pio___wr_n___width 1
533 #define reg_pinmux_rw_iop_pio___wr_n___bit 9
534 #define reg_pinmux_rw_iop_pio___a0___lsb 10
535 #define reg_pinmux_rw_iop_pio___a0___width 1
536 #define reg_pinmux_rw_iop_pio___a0___bit 10
537 #define reg_pinmux_rw_iop_pio___a1___lsb 11
538 #define reg_pinmux_rw_iop_pio___a1___width 1
539 #define reg_pinmux_rw_iop_pio___a1___bit 11
540 #define reg_pinmux_rw_iop_pio___ce0_n___lsb 12
541 #define reg_pinmux_rw_iop_pio___ce0_n___width 1
542 #define reg_pinmux_rw_iop_pio___ce0_n___bit 12
543 #define reg_pinmux_rw_iop_pio___ce1_n___lsb 13
544 #define reg_pinmux_rw_iop_pio___ce1_n___width 1
545 #define reg_pinmux_rw_iop_pio___ce1_n___bit 13
546 #define reg_pinmux_rw_iop_pio___ce2_n___lsb 14
547 #define reg_pinmux_rw_iop_pio___ce2_n___width 1
548 #define reg_pinmux_rw_iop_pio___ce2_n___bit 14
549 #define reg_pinmux_rw_iop_pio___rdy___lsb 15
550 #define reg_pinmux_rw_iop_pio___rdy___width 1
551 #define reg_pinmux_rw_iop_pio___rdy___bit 15
552 #define reg_pinmux_rw_iop_pio_offset 24
553 
554 /* Register rw_iop_usb, scope pinmux, type rw */
555 #define reg_pinmux_rw_iop_usb___usb0___lsb 0
556 #define reg_pinmux_rw_iop_usb___usb0___width 1
557 #define reg_pinmux_rw_iop_usb___usb0___bit 0
558 #define reg_pinmux_rw_iop_usb_offset 28
559 
560 
561 /* Constants */
562 #define regk_pinmux_no 0x00000000
563 #define regk_pinmux_rw_gio_pa_default 0x00000000
564 #define regk_pinmux_rw_gio_pb_default 0x00000000
565 #define regk_pinmux_rw_gio_pc_default 0x00000000
566 #define regk_pinmux_rw_hwprot_default 0x00000000
567 #define regk_pinmux_rw_iop_pa_default 0x00000000
568 #define regk_pinmux_rw_iop_pb_default 0x00000000
569 #define regk_pinmux_rw_iop_pio_default 0x00000000
570 #define regk_pinmux_rw_iop_usb_default 0x00000001
571 #define regk_pinmux_yes 0x00000001
572 #endif /* __pinmux_defs_asm_h */