Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
anomaly.h
Go to the documentation of this file.
1 /*
2  * DO NOT EDIT THIS FILE
3  * This file is under version control at
4  * svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
5  * and can be replaced with that version at any time
6  * DO NOT EDIT THIS FILE
7  *
8  * Copyright 2004-2012 Analog Devices Inc.
9  * Licensed under the Clear BSD license.
10  */
11 
12 /* This file should be up to date with:
13  * - Revision A, 15/06/2012; ADSP-BF609 Blackfin Processor Anomaly List
14  */
15 
16 #if __SILICON_REVISION__ < 0
17 # error will not work on BF609 silicon version
18 #endif
19 
20 #ifndef _MACH_ANOMALY_H_
21 #define _MACH_ANOMALY_H_
22 
23 /* TRU_STAT.ADDRERR and TRU_ERRADDR.ADDR May Not Reflect the Correct Status */
24 #define ANOMALY_16000003 (1)
25 /* The EPPI Data Enable (DEN) Signal is Not Functional */
26 #define ANOMALY_16000004 (1)
27 /* Using L1 Instruction Cache with Parity Enabled is Unreliable */
28 #define ANOMALY_16000005 (1)
29 /* SEQSTAT.SYSNMI Clears Upon Entering the NMI ISR */
30 #define ANOMALY_16000006 (1)
31 /* DDR2 Memory Reads May Fail Intermittently */
32 #define ANOMALY_16000007 (1)
33 /* Instruction Memory Stalls Can Cause IFLUSH to Fail */
34 #define ANOMALY_16000008 (1)
35 /* TestSET Instruction Cannot Be Interrupted */
36 #define ANOMALY_16000009 (1)
37 /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
38 #define ANOMALY_16000010 (1)
39 /* False Hardware Error when RETI Points to Invalid Memory */
40 #define ANOMALY_16000011 (1)
41 /* Speculative Fetches of Indirect-Pointer Instructions Can Cause False Hardware Errors */
42 #define ANOMALY_16000012 (1)
43 /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
44 #define ANOMALY_16000013 (1)
45 /* False Hardware Error from an Access in the Shadow of a Conditional Branch */
46 #define ANOMALY_16000014 (1)
47 /* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
48 #define ANOMALY_16000015 (1)
49 /* Speculative Fetches Can Cause Undesired External FIFO Operations */
50 #define ANOMALY_16000017 (1)
51 /* RSI Boot Cleanup Routine Does Not Clear Registers */
52 #define ANOMALY_16000018 (1)
53 /* SPI Master Boot Device Auto-detection Frequency is Set Incorrectly */
54 #define ANOMALY_16000019 (1)
55 /* rom_SysControl() Fails to Set DDR0_CTL.INIT for Wakeup From Hibernate */
56 #define ANOMALY_16000020 (1)
57 /* rom_SysControl() Fails to Save and Restore DDR0_PHYCTL3 for Hibernate/Wakeup Sequence */
58 #define ANOMALY_16000021 (1)
59 /* Boot Code Fails to Enable Parity Fault Detection */
60 #define ANOMALY_16000022 (1)
61 /* USB DMA interrupt status do not show the DMA channel interrupt in the DMA ISR */
62 #define ANOMALY_16000027 (1)
63 /* Interrupted Core Reads of MMRs May Cause Data Loss */
64 #define ANOMALY_16000030 (1)
65 
66 /* Anomalies that don't exist on this proc */
67 #define ANOMALY_05000158 (0)
68 #define ANOMALY_05000189 (0)
69 #define ANOMALY_05000198 (0)
70 #define ANOMALY_05000220 (0)
71 #define ANOMALY_05000230 (0)
72 #define ANOMALY_05000231 (0)
73 #define ANOMALY_05000244 (0)
74 #define ANOMALY_05000263 (0)
75 #define ANOMALY_05000273 (0)
76 #define ANOMALY_05000274 (0)
77 #define ANOMALY_05000278 (0)
78 #define ANOMALY_05000281 (0)
79 #define ANOMALY_05000287 (0)
80 #define ANOMALY_05000311 (0)
81 #define ANOMALY_05000312 (0)
82 #define ANOMALY_05000323 (0)
83 #define ANOMALY_05000363 (0)
84 #define ANOMALY_05000380 (0)
85 #define ANOMALY_05000448 (0)
86 #define ANOMALY_05000450 (0)
87 #define ANOMALY_05000456 (0)
88 #define ANOMALY_05000480 (0)
89 #define ANOMALY_05000481 (1)
90 
91 /* Reuse BF5xx anomalies IDs for the same anomaly in BF60x */
92 #define ANOMALY_05000491 ANOMALY_16000008
93 #define ANOMALY_05000477 ANOMALY_16000009
94 #define ANOMALY_05000443 ANOMALY_16000010
95 #define ANOMALY_05000461 ANOMALY_16000011
96 #define ANOMALY_05000426 ANOMALY_16000012
97 #define ANOMALY_05000310 ANOMALY_16000013
98 #define ANOMALY_05000245 ANOMALY_16000014
99 #define ANOMALY_05000074 ANOMALY_16000015
100 #define ANOMALY_05000416 ANOMALY_16000017
101 
102 
103 #endif