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mach-gt64120.h
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1 /*
2  * This is a direct copy of the ev96100.h file, with a global
3  * search and replace. The numbers are the same.
4  *
5  * The reason I'm duplicating this is so that the 64120/96100
6  * defines won't be confusing in the source code.
7  */
8 #ifndef __ASM_MIPS_GT64120_H
9 #define __ASM_MIPS_GT64120_H
10 
11 /*
12  * This is the CPU physical memory map of PPMC Board:
13  *
14  * 0x00000000-0x03FFFFFF - 64MB SDRAM (SCS[0]#)
15  * 0x1C000000-0x1C000000 - LED (CS0)
16  * 0x1C800000-0x1C800007 - UART 16550 port (CS1)
17  * 0x1F000000-0x1F000000 - MailBox (CS3)
18  * 0x1FC00000-0x20000000 - 4MB Flash (BOOT CS)
19  */
20 
21 #define WRPPMC_SDRAM_SCS0_BASE 0x00000000
22 #define WRPPMC_SDRAM_SCS0_SIZE 0x04000000
23 
24 #define WRPPMC_UART16550_BASE 0x1C800000
25 #define WRPPMC_UART16550_CLOCK 3686400 /* 3.68MHZ */
26 
27 #define WRPPMC_LED_BASE 0x1C000000
28 #define WRPPMC_MBOX_BASE 0x1F000000
29 
30 #define WRPPMC_BOOTROM_BASE 0x1FC00000
31 #define WRPPMC_BOOTROM_SIZE 0x00400000 /* 4M Flash */
32 
33 #define WRPPMC_MIPS_TIMER_IRQ 7 /* MIPS compare/count timer interrupt */
34 #define WRPPMC_UART16550_IRQ 6
35 #define WRPPMC_PCI_INTA_IRQ 3
36 
37 /*
38  * PCI Bus I/O and Memory resources allocation
39  *
40  * NOTE: We only have PCI_0 hose interface
41  */
42 #define GT_PCI_MEM_BASE 0x13000000UL
43 #define GT_PCI_MEM_SIZE 0x02000000UL
44 #define GT_PCI_IO_BASE 0x11000000UL
45 #define GT_PCI_IO_SIZE 0x02000000UL
46 
47 /*
48  * PCI interrupts will come in on either the INTA or INTD interrupt lines,
49  * which are mapped to the #2 and #5 interrupt pins of the MIPS. On our
50  * boards, they all either come in on IntD or they all come in on IntA, they
51  * aren't mixed. There can be numerous PCI interrupts, so we keep a list of the
52  * "requested" interrupt numbers and go through the list whenever we get an
53  * IntA/D.
54  *
55  * Interrupts < 8 are directly wired to the processor; PCI INTA is 8 and
56  * INTD is 11.
57  */
58 #define GT_TIMER 4
59 #define GT_INTA 2
60 #define GT_INTD 5
61 
62 #ifndef __ASSEMBLY__
63 
64 /*
65  * GT64120 internal register space base address
66  */
67 extern unsigned long gt64120_base;
68 
69 #define GT64120_BASE (gt64120_base)
70 
71 /* define WRPPMC_EARLY_DEBUG to enable early output something to UART */
72 #undef WRPPMC_EARLY_DEBUG
73 
74 #ifdef WRPPMC_EARLY_DEBUG
75 extern void wrppmc_led_on(int mask);
76 extern void wrppmc_led_off(int mask);
77 extern void wrppmc_early_printk(const char *fmt, ...);
78 #else
79 #define wrppmc_early_printk(fmt, ...) do {} while (0)
80 #endif /* WRPPMC_EARLY_DEBUG */
81 
82 #endif /* __ASSEMBLY__ */
83 #endif /* __ASM_MIPS_GT64120_H */