Linux Kernel  3.7.1
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machvec_impl.h
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1 /*
2  * linux/arch/alpha/kernel/machvec_impl.h
3  *
4  * Copyright (C) 1997, 1998 Richard Henderson
5  *
6  * This file has goodies to help simplify instantiation of machine vectors.
7  */
8 
9 #include <asm/pgalloc.h>
10 
11 /* Whee. These systems don't have an HAE:
12  IRONGATE, MARVEL, POLARIS, TSUNAMI, TITAN, WILDFIRE
13  Fix things up for the GENERIC kernel by defining the HAE address
14  to be that of the cache. Now we can read and write it as we like. ;-) */
15 #define IRONGATE_HAE_ADDRESS (&alpha_mv.hae_cache)
16 #define MARVEL_HAE_ADDRESS (&alpha_mv.hae_cache)
17 #define POLARIS_HAE_ADDRESS (&alpha_mv.hae_cache)
18 #define TSUNAMI_HAE_ADDRESS (&alpha_mv.hae_cache)
19 #define TITAN_HAE_ADDRESS (&alpha_mv.hae_cache)
20 #define WILDFIRE_HAE_ADDRESS (&alpha_mv.hae_cache)
21 
22 #ifdef CIA_ONE_HAE_WINDOW
23 #define CIA_HAE_ADDRESS (&alpha_mv.hae_cache)
24 #endif
25 #ifdef MCPCIA_ONE_HAE_WINDOW
26 #define MCPCIA_HAE_ADDRESS (&alpha_mv.hae_cache)
27 #endif
28 #ifdef T2_ONE_HAE_WINDOW
29 #define T2_HAE_ADDRESS (&alpha_mv.hae_cache)
30 #endif
31 
32 /* Only a few systems don't define IACK_SC, handling all interrupts through
33  the SRM console. But splitting out that one case from IO() below
34  seems like such a pain. Define this to get things to compile. */
35 #define JENSEN_IACK_SC 1
36 #define T2_IACK_SC 1
37 #define WILDFIRE_IACK_SC 1 /* FIXME */
38 
39 /*
40  * Some helpful macros for filling in the blanks.
41  */
42 
43 #define CAT1(x,y) x##y
44 #define CAT(x,y) CAT1(x,y)
45 
46 #define DO_DEFAULT_RTC \
47  .rtc_port = 0x70, \
48  .rtc_get_time = common_get_rtc_time, \
49  .rtc_set_time = common_set_rtc_time
50 
51 #define DO_EV4_MMU \
52  .max_asn = EV4_MAX_ASN, \
53  .mv_switch_mm = ev4_switch_mm, \
54  .mv_activate_mm = ev4_activate_mm, \
55  .mv_flush_tlb_current = ev4_flush_tlb_current, \
56  .mv_flush_tlb_current_page = ev4_flush_tlb_current_page
57 
58 #define DO_EV5_MMU \
59  .max_asn = EV5_MAX_ASN, \
60  .mv_switch_mm = ev5_switch_mm, \
61  .mv_activate_mm = ev5_activate_mm, \
62  .mv_flush_tlb_current = ev5_flush_tlb_current, \
63  .mv_flush_tlb_current_page = ev5_flush_tlb_current_page
64 
65 #define DO_EV6_MMU \
66  .max_asn = EV6_MAX_ASN, \
67  .mv_switch_mm = ev5_switch_mm, \
68  .mv_activate_mm = ev5_activate_mm, \
69  .mv_flush_tlb_current = ev5_flush_tlb_current, \
70  .mv_flush_tlb_current_page = ev5_flush_tlb_current_page
71 
72 #define DO_EV7_MMU \
73  .max_asn = EV6_MAX_ASN, \
74  .mv_switch_mm = ev5_switch_mm, \
75  .mv_activate_mm = ev5_activate_mm, \
76  .mv_flush_tlb_current = ev5_flush_tlb_current, \
77  .mv_flush_tlb_current_page = ev5_flush_tlb_current_page
78 
79 #define IO_LITE(UP,low) \
80  .hae_register = (unsigned long *) CAT(UP,_HAE_ADDRESS), \
81  .iack_sc = CAT(UP,_IACK_SC), \
82  .mv_ioread8 = CAT(low,_ioread8), \
83  .mv_ioread16 = CAT(low,_ioread16), \
84  .mv_ioread32 = CAT(low,_ioread32), \
85  .mv_iowrite8 = CAT(low,_iowrite8), \
86  .mv_iowrite16 = CAT(low,_iowrite16), \
87  .mv_iowrite32 = CAT(low,_iowrite32), \
88  .mv_readb = CAT(low,_readb), \
89  .mv_readw = CAT(low,_readw), \
90  .mv_readl = CAT(low,_readl), \
91  .mv_readq = CAT(low,_readq), \
92  .mv_writeb = CAT(low,_writeb), \
93  .mv_writew = CAT(low,_writew), \
94  .mv_writel = CAT(low,_writel), \
95  .mv_writeq = CAT(low,_writeq), \
96  .mv_ioportmap = CAT(low,_ioportmap), \
97  .mv_ioremap = CAT(low,_ioremap), \
98  .mv_iounmap = CAT(low,_iounmap), \
99  .mv_is_ioaddr = CAT(low,_is_ioaddr), \
100  .mv_is_mmio = CAT(low,_is_mmio) \
101 
102 #define IO(UP,low) \
103  IO_LITE(UP,low), \
104  .pci_ops = &CAT(low,_pci_ops), \
105  .mv_pci_tbi = CAT(low,_pci_tbi)
106 
107 #define DO_APECS_IO IO(APECS,apecs)
108 #define DO_CIA_IO IO(CIA,cia)
109 #define DO_IRONGATE_IO IO(IRONGATE,irongate)
110 #define DO_LCA_IO IO(LCA,lca)
111 #define DO_MARVEL_IO IO(MARVEL,marvel)
112 #define DO_MCPCIA_IO IO(MCPCIA,mcpcia)
113 #define DO_POLARIS_IO IO(POLARIS,polaris)
114 #define DO_T2_IO IO(T2,t2)
115 #define DO_TSUNAMI_IO IO(TSUNAMI,tsunami)
116 #define DO_TITAN_IO IO(TITAN,titan)
117 #define DO_WILDFIRE_IO IO(WILDFIRE,wildfire)
118 
119 #define DO_PYXIS_IO IO_LITE(CIA,cia_bwx), \
120  .pci_ops = &cia_pci_ops, \
121  .mv_pci_tbi = cia_pci_tbi
122 
123 /*
124  * In a GENERIC kernel, we have lots of these vectors floating about,
125  * all but one of which we want to go away. In a non-GENERIC kernel,
126  * we want only one, ever.
127  *
128  * Accomplish this in the GENERIC kernel by putting all of the vectors
129  * in the .init.data section where they'll go away. We'll copy the
130  * one we want to the real alpha_mv vector in setup_arch.
131  *
132  * Accomplish this in a non-GENERIC kernel by ifdef'ing out all but
133  * one of the vectors, which will not reside in .init.data. We then
134  * alias this one vector to alpha_mv, so no copy is needed.
135  *
136  * Upshot: set __initdata to nothing for non-GENERIC kernels.
137  */
138 
139 #ifdef CONFIG_ALPHA_GENERIC
140 #define __initmv __initdata
141 #define ALIAS_MV(x)
142 #else
143 #define __initmv __initdata_refok
144 
145 /* GCC actually has a syntax for defining aliases, but is under some
146  delusion that you shouldn't be able to declare it extern somewhere
147  else beforehand. Fine. We'll do it ourselves. */
148 #if 0
149 #define ALIAS_MV(system) \
150  struct alpha_machine_vector alpha_mv __attribute__((alias(#system "_mv")));
151 #else
152 #define ALIAS_MV(system) \
153  asm(".global alpha_mv\nalpha_mv = " #system "_mv");
154 #endif
155 #endif /* GENERIC */