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mgag200_reg.h
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1 /*
2  * MGA Millennium (MGA2064W) functions
3  * MGA Mystique (MGA1064SG) functions
4  *
5  * Copyright 1996 The XFree86 Project, Inc.
6  *
7  * Authors
8  * Dirk Hohndel
10  * David Dawes
12  * Contributors:
13  * Guy DESBIEF, Aix-en-provence, France
15  * MGA1064SG Mystique register file
16  */
17 
18 
19 #ifndef _MGA_REG_H_
20 #define _MGA_REG_H_
21 
22 #define MGAREG_DWGCTL 0x1c00
23 #define MGAREG_MACCESS 0x1c04
24 /* the following is a mystique only register */
25 #define MGAREG_MCTLWTST 0x1c08
26 #define MGAREG_ZORG 0x1c0c
27 
28 #define MGAREG_PAT0 0x1c10
29 #define MGAREG_PAT1 0x1c14
30 #define MGAREG_PLNWT 0x1c1c
31 
32 #define MGAREG_BCOL 0x1c20
33 #define MGAREG_FCOL 0x1c24
34 
35 #define MGAREG_SRC0 0x1c30
36 #define MGAREG_SRC1 0x1c34
37 #define MGAREG_SRC2 0x1c38
38 #define MGAREG_SRC3 0x1c3c
39 
40 #define MGAREG_XYSTRT 0x1c40
41 #define MGAREG_XYEND 0x1c44
42 
43 #define MGAREG_SHIFT 0x1c50
44 /* the following is a mystique only register */
45 #define MGAREG_DMAPAD 0x1c54
46 #define MGAREG_SGN 0x1c58
47 #define MGAREG_LEN 0x1c5c
48 
49 #define MGAREG_AR0 0x1c60
50 #define MGAREG_AR1 0x1c64
51 #define MGAREG_AR2 0x1c68
52 #define MGAREG_AR3 0x1c6c
53 #define MGAREG_AR4 0x1c70
54 #define MGAREG_AR5 0x1c74
55 #define MGAREG_AR6 0x1c78
56 
57 #define MGAREG_CXBNDRY 0x1c80
58 #define MGAREG_FXBNDRY 0x1c84
59 #define MGAREG_YDSTLEN 0x1c88
60 #define MGAREG_PITCH 0x1c8c
61 
62 #define MGAREG_YDST 0x1c90
63 #define MGAREG_YDSTORG 0x1c94
64 #define MGAREG_YTOP 0x1c98
65 #define MGAREG_YBOT 0x1c9c
66 
67 #define MGAREG_CXLEFT 0x1ca0
68 #define MGAREG_CXRIGHT 0x1ca4
69 #define MGAREG_FXLEFT 0x1ca8
70 #define MGAREG_FXRIGHT 0x1cac
71 
72 #define MGAREG_XDST 0x1cb0
73 
74 #define MGAREG_DR0 0x1cc0
75 #define MGAREG_DR1 0x1cc4
76 #define MGAREG_DR2 0x1cc8
77 #define MGAREG_DR3 0x1ccc
78 
79 #define MGAREG_DR4 0x1cd0
80 #define MGAREG_DR5 0x1cd4
81 #define MGAREG_DR6 0x1cd8
82 #define MGAREG_DR7 0x1cdc
83 
84 #define MGAREG_DR8 0x1ce0
85 #define MGAREG_DR9 0x1ce4
86 #define MGAREG_DR10 0x1ce8
87 #define MGAREG_DR11 0x1cec
88 
89 #define MGAREG_DR12 0x1cf0
90 #define MGAREG_DR13 0x1cf4
91 #define MGAREG_DR14 0x1cf8
92 #define MGAREG_DR15 0x1cfc
93 
94 #define MGAREG_SRCORG 0x2cb4
95 #define MGAREG_DSTORG 0x2cb8
96 
97 /* add or or this to one of the previous "power registers" to start
98  the drawing engine */
99 
100 #define MGAREG_EXEC 0x0100
101 
102 #define MGAREG_FIFOSTATUS 0x1e10
103 #define MGAREG_Status 0x1e14
104 #define MGAREG_CACHEFLUSH 0x1fff
105 #define MGAREG_ICLEAR 0x1e18
106 #define MGAREG_IEN 0x1e1c
107 
108 #define MGAREG_VCOUNT 0x1e20
109 
110 #define MGAREG_Reset 0x1e40
111 
112 #define MGAREG_OPMODE 0x1e54
113 
114 /* Warp Registers */
115 #define MGAREG_WIADDR 0x1dc0
116 #define MGAREG_WIADDR2 0x1dd8
117 #define MGAREG_WGETMSB 0x1dc8
118 #define MGAREG_WVRTXSZ 0x1dcc
119 #define MGAREG_WACCEPTSEQ 0x1dd4
120 #define MGAREG_WMISC 0x1e70
121 
122 #define MGAREG_MEMCTL 0x2e08
123 
124 /* OPMODE register additives */
125 
126 #define MGAOPM_DMA_GENERAL (0x00 << 2)
127 #define MGAOPM_DMA_BLIT (0x01 << 2)
128 #define MGAOPM_DMA_VECTOR (0x10 << 2)
129 
130 /* MACCESS register additives */
131 #define MGAMAC_PW8 0x00
132 #define MGAMAC_PW16 0x01
133 #define MGAMAC_PW24 0x03 /* not a typo */
134 #define MGAMAC_PW32 0x02 /* not a typo */
135 #define MGAMAC_BYPASS332 0x10000000
136 #define MGAMAC_NODITHER 0x40000000
137 #define MGAMAC_DIT555 0x80000000
138 
139 /* DWGCTL register additives */
140 
141 /* Lines */
142 
143 #define MGADWG_LINE_OPEN 0x00
144 #define MGADWG_AUTOLINE_OPEN 0x01
145 #define MGADWG_LINE_CLOSE 0x02
146 #define MGADWG_AUTOLINE_CLOSE 0x03
147 
148 /* Trapezoids */
149 #define MGADWG_TRAP 0x04
150 #define MGADWG_TEXTURE_TRAP 0x06
151 
152 /* BitBlts */
153 
154 #define MGADWG_BITBLT 0x08
155 #define MGADWG_FBITBLT 0x0c
156 #define MGADWG_ILOAD 0x09
157 #define MGADWG_ILOAD_SCALE 0x0d
158 #define MGADWG_ILOAD_FILTER 0x0f
159 #define MGADWG_ILOAD_HIQH 0x07
160 #define MGADWG_ILOAD_HIQHV 0x0e
161 #define MGADWG_IDUMP 0x0a
162 
163 /* atype access to WRAM */
164 
165 #define MGADWG_RPL ( 0x00 << 4 )
166 #define MGADWG_RSTR ( 0x01 << 4 )
167 #define MGADWG_ZI ( 0x03 << 4 )
168 #define MGADWG_BLK ( 0x04 << 4 )
169 #define MGADWG_I ( 0x07 << 4 )
170 
171 /* specifies whether bit blits are linear or xy */
172 #define MGADWG_LINEAR ( 0x01 << 7 )
173 
174 /* z drawing mode. use MGADWG_NOZCMP for always */
175 
176 #define MGADWG_NOZCMP ( 0x00 << 8 )
177 #define MGADWG_ZE ( 0x02 << 8 )
178 #define MGADWG_ZNE ( 0x03 << 8 )
179 #define MGADWG_ZLT ( 0x04 << 8 )
180 #define MGADWG_ZLTE ( 0x05 << 8 )
181 #define MGADWG_GT ( 0x06 << 8 )
182 #define MGADWG_GTE ( 0x07 << 8 )
183 
184 /* use this to force colour expansion circuitry to do its stuff */
185 
186 #define MGADWG_SOLID ( 0x01 << 11 )
187 
188 /* ar register at zero */
189 
190 #define MGADWG_ARZERO ( 0x01 << 12 )
191 
192 #define MGADWG_SGNZERO ( 0x01 << 13 )
193 
194 #define MGADWG_SHIFTZERO ( 0x01 << 14 )
195 
196 /* See table on 4-43 for bop ALU operations */
197 
198 /* See table on 4-44 for translucidity masks */
199 
200 #define MGADWG_BMONOLEF ( 0x00 << 25 )
201 #define MGADWG_BMONOWF ( 0x04 << 25 )
202 #define MGADWG_BPLAN ( 0x01 << 25 )
203 
204 /* note that if bfcol is specified and you're doing a bitblt, it causes
205  a fbitblt to be performed, so check that you obey the fbitblt rules */
206 
207 #define MGADWG_BFCOL ( 0x02 << 25 )
208 #define MGADWG_BUYUV ( 0x0e << 25 )
209 #define MGADWG_BU32BGR ( 0x03 << 25 )
210 #define MGADWG_BU32RGB ( 0x07 << 25 )
211 #define MGADWG_BU24BGR ( 0x0b << 25 )
212 #define MGADWG_BU24RGB ( 0x0f << 25 )
213 
214 #define MGADWG_PATTERN ( 0x01 << 29 )
215 #define MGADWG_TRANSC ( 0x01 << 30 )
216 #define MGAREG_MISC_WRITE 0x3c2
217 #define MGAREG_MISC_READ 0x3cc
218 #define MGAREG_MEM_MISC_WRITE 0x1fc2
219 #define MGAREG_MEM_MISC_READ 0x1fcc
220 
221 #define MGAREG_MISC_IOADSEL (0x1 << 0)
222 #define MGAREG_MISC_RAMMAPEN (0x1 << 1)
223 #define MGAREG_MISC_CLK_SEL_VGA25 (0x0 << 2)
224 #define MGAREG_MISC_CLK_SEL_VGA28 (0x1 << 2)
225 #define MGAREG_MISC_CLK_SEL_MGA_PIX (0x2 << 2)
226 #define MGAREG_MISC_CLK_SEL_MGA_MSK (0x3 << 2)
227 #define MGAREG_MISC_VIDEO_DIS (0x1 << 4)
228 #define MGAREG_MISC_HIGH_PG_SEL (0x1 << 5)
229 
230 /* MMIO VGA registers */
231 #define MGAREG_SEQ_INDEX 0x1fc4
232 #define MGAREG_SEQ_DATA 0x1fc5
233 #define MGAREG_CRTC_INDEX 0x1fd4
234 #define MGAREG_CRTC_DATA 0x1fd5
235 #define MGAREG_CRTCEXT_INDEX 0x1fde
236 #define MGAREG_CRTCEXT_DATA 0x1fdf
237 
238 
239 
240 /* MGA bits for registers PCI_OPTION_REG */
241 #define MGA1064_OPT_SYS_CLK_PCI ( 0x00 << 0 )
242 #define MGA1064_OPT_SYS_CLK_PLL ( 0x01 << 0 )
243 #define MGA1064_OPT_SYS_CLK_EXT ( 0x02 << 0 )
244 #define MGA1064_OPT_SYS_CLK_MSK ( 0x03 << 0 )
245 
246 #define MGA1064_OPT_SYS_CLK_DIS ( 0x01 << 2 )
247 #define MGA1064_OPT_G_CLK_DIV_1 ( 0x01 << 3 )
248 #define MGA1064_OPT_M_CLK_DIV_1 ( 0x01 << 4 )
249 
250 #define MGA1064_OPT_SYS_PLL_PDN ( 0x01 << 5 )
251 #define MGA1064_OPT_VGA_ION ( 0x01 << 8 )
252 
253 /* MGA registers in PCI config space */
254 #define PCI_MGA_INDEX 0x44
255 #define PCI_MGA_DATA 0x48
256 #define PCI_MGA_OPTION 0x40
257 #define PCI_MGA_OPTION2 0x50
258 #define PCI_MGA_OPTION3 0x54
259 
260 #define RAMDAC_OFFSET 0x3c00
261 
262 /* TVP3026 direct registers */
263 
264 #define TVP3026_INDEX 0x00
265 #define TVP3026_WADR_PAL 0x00
266 #define TVP3026_COL_PAL 0x01
267 #define TVP3026_PIX_RD_MSK 0x02
268 #define TVP3026_RADR_PAL 0x03
269 #define TVP3026_CUR_COL_ADDR 0x04
270 #define TVP3026_CUR_COL_DATA 0x05
271 #define TVP3026_DATA 0x0a
272 #define TVP3026_CUR_RAM 0x0b
273 #define TVP3026_CUR_XLOW 0x0c
274 #define TVP3026_CUR_XHI 0x0d
275 #define TVP3026_CUR_YLOW 0x0e
276 #define TVP3026_CUR_YHI 0x0f
277 
278 /* TVP3026 indirect registers */
279 
280 #define TVP3026_SILICON_REV 0x01
281 #define TVP3026_CURSOR_CTL 0x06
282 #define TVP3026_LATCH_CTL 0x0f
283 #define TVP3026_TRUE_COLOR_CTL 0x18
284 #define TVP3026_MUX_CTL 0x19
285 #define TVP3026_CLK_SEL 0x1a
286 #define TVP3026_PAL_PAGE 0x1c
287 #define TVP3026_GEN_CTL 0x1d
288 #define TVP3026_MISC_CTL 0x1e
289 #define TVP3026_GEN_IO_CTL 0x2a
290 #define TVP3026_GEN_IO_DATA 0x2b
291 #define TVP3026_PLL_ADDR 0x2c
292 #define TVP3026_PIX_CLK_DATA 0x2d
293 #define TVP3026_MEM_CLK_DATA 0x2e
294 #define TVP3026_LOAD_CLK_DATA 0x2f
295 #define TVP3026_KEY_RED_LOW 0x32
296 #define TVP3026_KEY_RED_HI 0x33
297 #define TVP3026_KEY_GREEN_LOW 0x34
298 #define TVP3026_KEY_GREEN_HI 0x35
299 #define TVP3026_KEY_BLUE_LOW 0x36
300 #define TVP3026_KEY_BLUE_HI 0x37
301 #define TVP3026_KEY_CTL 0x38
302 #define TVP3026_MCLK_CTL 0x39
303 #define TVP3026_SENSE_TEST 0x3a
304 #define TVP3026_TEST_DATA 0x3b
305 #define TVP3026_CRC_LSB 0x3c
306 #define TVP3026_CRC_MSB 0x3d
307 #define TVP3026_CRC_CTL 0x3e
308 #define TVP3026_ID 0x3f
309 #define TVP3026_RESET 0xff
310 
311 
312 /* MGA1064 DAC Register file */
313 /* MGA1064 direct registers */
314 
315 #define MGA1064_INDEX 0x00
316 #define MGA1064_WADR_PAL 0x00
317 #define MGA1064_SPAREREG 0x00
318 #define MGA1064_COL_PAL 0x01
319 #define MGA1064_PIX_RD_MSK 0x02
320 #define MGA1064_RADR_PAL 0x03
321 #define MGA1064_DATA 0x0a
322 
323 #define MGA1064_CUR_XLOW 0x0c
324 #define MGA1064_CUR_XHI 0x0d
325 #define MGA1064_CUR_YLOW 0x0e
326 #define MGA1064_CUR_YHI 0x0f
327 
328 /* MGA1064 indirect registers */
329 #define MGA1064_DVI_PIPE_CTL 0x03
330 #define MGA1064_CURSOR_BASE_ADR_LOW 0x04
331 #define MGA1064_CURSOR_BASE_ADR_HI 0x05
332 #define MGA1064_CURSOR_CTL 0x06
333 #define MGA1064_CURSOR_COL0_RED 0x08
334 #define MGA1064_CURSOR_COL0_GREEN 0x09
335 #define MGA1064_CURSOR_COL0_BLUE 0x0a
336 
337 #define MGA1064_CURSOR_COL1_RED 0x0c
338 #define MGA1064_CURSOR_COL1_GREEN 0x0d
339 #define MGA1064_CURSOR_COL1_BLUE 0x0e
340 
341 #define MGA1064_CURSOR_COL2_RED 0x010
342 #define MGA1064_CURSOR_COL2_GREEN 0x011
343 #define MGA1064_CURSOR_COL2_BLUE 0x012
344 
345 #define MGA1064_VREF_CTL 0x018
346 
347 #define MGA1064_MUL_CTL 0x19
348 #define MGA1064_MUL_CTL_8bits 0x0
349 #define MGA1064_MUL_CTL_15bits 0x01
350 #define MGA1064_MUL_CTL_16bits 0x02
351 #define MGA1064_MUL_CTL_24bits 0x03
352 #define MGA1064_MUL_CTL_32bits 0x04
353 #define MGA1064_MUL_CTL_2G8V16bits 0x05
354 #define MGA1064_MUL_CTL_G16V16bits 0x06
355 #define MGA1064_MUL_CTL_32_24bits 0x07
356 
357 #define MGA1064_PIX_CLK_CTL 0x1a
358 #define MGA1064_PIX_CLK_CTL_CLK_DIS ( 0x01 << 2 )
359 #define MGA1064_PIX_CLK_CTL_CLK_POW_DOWN ( 0x01 << 3 )
360 #define MGA1064_PIX_CLK_CTL_SEL_PCI ( 0x00 << 0 )
361 #define MGA1064_PIX_CLK_CTL_SEL_PLL ( 0x01 << 0 )
362 #define MGA1064_PIX_CLK_CTL_SEL_EXT ( 0x02 << 0 )
363 #define MGA1064_PIX_CLK_CTL_SEL_MSK ( 0x03 << 0 )
364 
365 #define MGA1064_GEN_CTL 0x1d
366 #define MGA1064_GEN_CTL_SYNC_ON_GREEN_DIS (0x01 << 5)
367 #define MGA1064_MISC_CTL 0x1e
368 #define MGA1064_MISC_CTL_DAC_EN ( 0x01 << 0 )
369 #define MGA1064_MISC_CTL_VGA ( 0x01 << 1 )
370 #define MGA1064_MISC_CTL_DIS_CON ( 0x03 << 1 )
371 #define MGA1064_MISC_CTL_MAFC ( 0x02 << 1 )
372 #define MGA1064_MISC_CTL_VGA8 ( 0x01 << 3 )
373 #define MGA1064_MISC_CTL_DAC_RAM_CS ( 0x01 << 4 )
374 
375 #define MGA1064_GEN_IO_CTL2 0x29
376 #define MGA1064_GEN_IO_CTL 0x2a
377 #define MGA1064_GEN_IO_DATA 0x2b
378 #define MGA1064_SYS_PLL_M 0x2c
379 #define MGA1064_SYS_PLL_N 0x2d
380 #define MGA1064_SYS_PLL_P 0x2e
381 #define MGA1064_SYS_PLL_STAT 0x2f
382 
383 #define MGA1064_REMHEADCTL 0x30
384 #define MGA1064_REMHEADCTL_CLKDIS ( 0x01 << 0 )
385 #define MGA1064_REMHEADCTL_CLKSL_OFF ( 0x00 << 1 )
386 #define MGA1064_REMHEADCTL_CLKSL_PLL ( 0x01 << 1 )
387 #define MGA1064_REMHEADCTL_CLKSL_PCI ( 0x02 << 1 )
388 #define MGA1064_REMHEADCTL_CLKSL_MSK ( 0x03 << 1 )
389 
390 #define MGA1064_REMHEADCTL2 0x31
391 
392 #define MGA1064_ZOOM_CTL 0x38
393 #define MGA1064_SENSE_TST 0x3a
394 
395 #define MGA1064_CRC_LSB 0x3c
396 #define MGA1064_CRC_MSB 0x3d
397 #define MGA1064_CRC_CTL 0x3e
398 #define MGA1064_COL_KEY_MSK_LSB 0x40
399 #define MGA1064_COL_KEY_MSK_MSB 0x41
400 #define MGA1064_COL_KEY_LSB 0x42
401 #define MGA1064_COL_KEY_MSB 0x43
402 #define MGA1064_PIX_PLLA_M 0x44
403 #define MGA1064_PIX_PLLA_N 0x45
404 #define MGA1064_PIX_PLLA_P 0x46
405 #define MGA1064_PIX_PLLB_M 0x48
406 #define MGA1064_PIX_PLLB_N 0x49
407 #define MGA1064_PIX_PLLB_P 0x4a
408 #define MGA1064_PIX_PLLC_M 0x4c
409 #define MGA1064_PIX_PLLC_N 0x4d
410 #define MGA1064_PIX_PLLC_P 0x4e
411 
412 #define MGA1064_PIX_PLL_STAT 0x4f
413 
414 /*Added for G450 dual head*/
415 
416 #define MGA1064_VID_PLL_STAT 0x8c
417 #define MGA1064_VID_PLL_P 0x8D
418 #define MGA1064_VID_PLL_M 0x8E
419 #define MGA1064_VID_PLL_N 0x8F
420 
421 /* Modified PLL for G200 Winbond (G200WB) */
422 #define MGA1064_WB_PIX_PLLC_M 0xb7
423 #define MGA1064_WB_PIX_PLLC_N 0xb6
424 #define MGA1064_WB_PIX_PLLC_P 0xb8
425 
426 /* Modified PLL for G200 Maxim (G200EV) */
427 #define MGA1064_EV_PIX_PLLC_M 0xb6
428 #define MGA1064_EV_PIX_PLLC_N 0xb7
429 #define MGA1064_EV_PIX_PLLC_P 0xb8
430 
431 /* Modified PLL for G200 EH */
432 #define MGA1064_EH_PIX_PLLC_M 0xb6
433 #define MGA1064_EH_PIX_PLLC_N 0xb7
434 #define MGA1064_EH_PIX_PLLC_P 0xb8
435 
436 /* Modified PLL for G200 Maxim (G200ER) */
437 #define MGA1064_ER_PIX_PLLC_M 0xb7
438 #define MGA1064_ER_PIX_PLLC_N 0xb6
439 #define MGA1064_ER_PIX_PLLC_P 0xb8
440 
441 #define MGA1064_DISP_CTL 0x8a
442 #define MGA1064_DISP_CTL_DAC1OUTSEL_MASK 0x01
443 #define MGA1064_DISP_CTL_DAC1OUTSEL_DIS 0x00
444 #define MGA1064_DISP_CTL_DAC1OUTSEL_EN 0x01
445 #define MGA1064_DISP_CTL_DAC2OUTSEL_MASK (0x03 << 2)
446 #define MGA1064_DISP_CTL_DAC2OUTSEL_DIS 0x00
447 #define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC1 (0x01 << 2)
448 #define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC2 (0x02 << 2)
449 #define MGA1064_DISP_CTL_DAC2OUTSEL_TVE (0x03 << 2)
450 #define MGA1064_DISP_CTL_PANOUTSEL_MASK (0x03 << 5)
451 #define MGA1064_DISP_CTL_PANOUTSEL_DIS 0x00
452 #define MGA1064_DISP_CTL_PANOUTSEL_CRTC1 (0x01 << 5)
453 #define MGA1064_DISP_CTL_PANOUTSEL_CRTC2RGB (0x02 << 5)
454 #define MGA1064_DISP_CTL_PANOUTSEL_CRTC2656 (0x03 << 5)
455 
456 #define MGA1064_SYNC_CTL 0x8b
457 
458 #define MGA1064_PWR_CTL 0xa0
459 #define MGA1064_PWR_CTL_DAC2_EN (0x01 << 0)
460 #define MGA1064_PWR_CTL_VID_PLL_EN (0x01 << 1)
461 #define MGA1064_PWR_CTL_PANEL_EN (0x01 << 2)
462 #define MGA1064_PWR_CTL_RFIFO_EN (0x01 << 3)
463 #define MGA1064_PWR_CTL_CFIFO_EN (0x01 << 4)
464 
465 #define MGA1064_PAN_CTL 0xa2
466 
467 /* Using crtc2 */
468 #define MGAREG2_C2CTL 0x10
469 #define MGAREG2_C2HPARAM 0x14
470 #define MGAREG2_C2HSYNC 0x18
471 #define MGAREG2_C2VPARAM 0x1c
472 #define MGAREG2_C2VSYNC 0x20
473 #define MGAREG2_C2STARTADD0 0x28
474 
475 #define MGAREG2_C2OFFSET 0x40
476 #define MGAREG2_C2DATACTL 0x4c
477 
478 #define MGAREG_C2CTL 0x3c10
479 #define MGAREG_C2CTL_C2_EN 0x01
480 
481 #define MGAREG_C2_HIPRILVL_M (0x07 << 4)
482 #define MGAREG_C2_MAXHIPRI_M (0x07 << 8)
483 
484 #define MGAREG_C2CTL_PIXCLKSEL_MASK (0x03 << 1)
485 #define MGAREG_C2CTL_PIXCLKSELH_MASK (0x01 << 14)
486 #define MGAREG_C2CTL_PIXCLKSEL_PCICLK 0x00
487 #define MGAREG_C2CTL_PIXCLKSEL_VDOCLK (0x01 << 1)
488 #define MGAREG_C2CTL_PIXCLKSEL_PIXELPLL (0x02 << 1)
489 #define MGAREG_C2CTL_PIXCLKSEL_VIDEOPLL (0x03 << 1)
490 #define MGAREG_C2CTL_PIXCLKSEL_VDCLK (0x01 << 14)
491 
492 #define MGAREG_C2CTL_PIXCLKSEL_CRISTAL (0x01 << 1) | (0x01 << 14)
493 #define MGAREG_C2CTL_PIXCLKSEL_SYSTEMPLL (0x02 << 1) | (0x01 << 14)
494 
495 #define MGAREG_C2CTL_PIXCLKDIS_MASK (0x01 << 3)
496 #define MGAREG_C2CTL_PIXCLKDIS_DISABLE (0x01 << 3)
497 
498 #define MGAREG_C2CTL_CRTCDACSEL_MASK (0x01 << 20)
499 #define MGAREG_C2CTL_CRTCDACSEL_CRTC1 0x00
500 #define MGAREG_C2CTL_CRTCDACSEL_CRTC2 (0x01 << 20)
501 
502 #define MGAREG_C2HPARAM 0x3c14
503 #define MGAREG_C2HSYNC 0x3c18
504 #define MGAREG_C2VPARAM 0x3c1c
505 #define MGAREG_C2VSYNC 0x3c20
506 #define MGAREG_C2STARTADD0 0x3c28
507 
508 #define MGAREG_C2OFFSET 0x3c40
509 #define MGAREG_C2DATACTL 0x3c4c
510 
511 /* video register */
512 
513 #define MGAREG_BESA1C3ORG 0x3d60
514 #define MGAREG_BESA1CORG 0x3d10
515 #define MGAREG_BESA1ORG 0x3d00
516 #define MGAREG_BESCTL 0x3d20
517 #define MGAREG_BESGLOBCTL 0x3dc0
518 #define MGAREG_BESHCOORD 0x3d28
519 #define MGAREG_BESHISCAL 0x3d30
520 #define MGAREG_BESHSRCEND 0x3d3c
521 #define MGAREG_BESHSRCLST 0x3d50
522 #define MGAREG_BESHSRCST 0x3d38
523 #define MGAREG_BESLUMACTL 0x3d40
524 #define MGAREG_BESPITCH 0x3d24
525 #define MGAREG_BESV1SRCLST 0x3d54
526 #define MGAREG_BESV1WGHT 0x3d48
527 #define MGAREG_BESVCOORD 0x3d2c
528 #define MGAREG_BESVISCAL 0x3d34
529 
530 /* texture engine registers */
531 
532 #define MGAREG_TMR0 0x2c00
533 #define MGAREG_TMR1 0x2c04
534 #define MGAREG_TMR2 0x2c08
535 #define MGAREG_TMR3 0x2c0c
536 #define MGAREG_TMR4 0x2c10
537 #define MGAREG_TMR5 0x2c14
538 #define MGAREG_TMR6 0x2c18
539 #define MGAREG_TMR7 0x2c1c
540 #define MGAREG_TMR8 0x2c20
541 #define MGAREG_TEXORG 0x2c24
542 #define MGAREG_TEXWIDTH 0x2c28
543 #define MGAREG_TEXHEIGHT 0x2c2c
544 #define MGAREG_TEXCTL 0x2c30
545 # define MGA_TW4 (0x00000000)
546 # define MGA_TW8 (0x00000001)
547 # define MGA_TW15 (0x00000002)
548 # define MGA_TW16 (0x00000003)
549 # define MGA_TW12 (0x00000004)
550 # define MGA_TW32 (0x00000006)
551 # define MGA_TW8A (0x00000007)
552 # define MGA_TW8AL (0x00000008)
553 # define MGA_TW422 (0x0000000A)
554 # define MGA_TW422UYVY (0x0000000B)
555 # define MGA_PITCHLIN (0x00000100)
556 # define MGA_NOPERSPECTIVE (0x00200000)
557 # define MGA_TAKEY (0x02000000)
558 # define MGA_TAMASK (0x04000000)
559 # define MGA_CLAMPUV (0x18000000)
560 # define MGA_TEXMODULATE (0x20000000)
561 #define MGAREG_TEXCTL2 0x2c3c
562 # define MGA_G400_TC2_MAGIC (0x00008000)
563 # define MGA_TC2_DECALBLEND (0x00000001)
564 # define MGA_TC2_IDECAL (0x00000002)
565 # define MGA_TC2_DECALDIS (0x00000004)
566 # define MGA_TC2_CKSTRANSDIS (0x00000010)
567 # define MGA_TC2_BORDEREN (0x00000020)
568 # define MGA_TC2_SPECEN (0x00000040)
569 # define MGA_TC2_DUALTEX (0x00000080)
570 # define MGA_TC2_TABLEFOG (0x00000100)
571 # define MGA_TC2_BUMPMAP (0x00000200)
572 # define MGA_TC2_SELECT_TMU1 (0x80000000)
573 #define MGAREG_TEXTRANS 0x2c34
574 #define MGAREG_TEXTRANSHIGH 0x2c38
575 #define MGAREG_TEXFILTER 0x2c58
576 # define MGA_MIN_NRST (0x00000000)
577 # define MGA_MIN_BILIN (0x00000002)
578 # define MGA_MIN_ANISO (0x0000000D)
579 # define MGA_MAG_NRST (0x00000000)
580 # define MGA_MAG_BILIN (0x00000020)
581 # define MGA_FILTERALPHA (0x00100000)
582 #define MGAREG_ALPHASTART 0x2c70
583 #define MGAREG_ALPHAXINC 0x2c74
584 #define MGAREG_ALPHAYINC 0x2c78
585 #define MGAREG_ALPHACTRL 0x2c7c
586 # define MGA_SRC_ZERO (0x00000000)
587 # define MGA_SRC_ONE (0x00000001)
588 # define MGA_SRC_DST_COLOR (0x00000002)
589 # define MGA_SRC_ONE_MINUS_DST_COLOR (0x00000003)
590 # define MGA_SRC_ALPHA (0x00000004)
591 # define MGA_SRC_ONE_MINUS_SRC_ALPHA (0x00000005)
592 # define MGA_SRC_DST_ALPHA (0x00000006)
593 # define MGA_SRC_ONE_MINUS_DST_ALPHA (0x00000007)
594 # define MGA_SRC_SRC_ALPHA_SATURATE (0x00000008)
595 # define MGA_SRC_BLEND_MASK (0x0000000f)
596 # define MGA_DST_ZERO (0x00000000)
597 # define MGA_DST_ONE (0x00000010)
598 # define MGA_DST_SRC_COLOR (0x00000020)
599 # define MGA_DST_ONE_MINUS_SRC_COLOR (0x00000030)
600 # define MGA_DST_SRC_ALPHA (0x00000040)
601 # define MGA_DST_ONE_MINUS_SRC_ALPHA (0x00000050)
602 # define MGA_DST_DST_ALPHA (0x00000060)
603 # define MGA_DST_ONE_MINUS_DST_ALPHA (0x00000070)
604 # define MGA_DST_BLEND_MASK (0x00000070)
605 # define MGA_ALPHACHANNEL (0x00000100)
606 # define MGA_VIDEOALPHA (0x00000200)
607 # define MGA_DIFFUSEDALPHA (0x01000000)
608 # define MGA_MODULATEDALPHA (0x02000000)
609 #define MGAREG_TDUALSTAGE0 (0x2CF8)
610 #define MGAREG_TDUALSTAGE1 (0x2CFC)
611 # define MGA_TDS_COLOR_ARG2_DIFFUSE (0x00000000)
612 # define MGA_TDS_COLOR_ARG2_SPECULAR (0x00000001)
613 # define MGA_TDS_COLOR_ARG2_FCOL (0x00000002)
614 # define MGA_TDS_COLOR_ARG2_PREVSTAGE (0x00000003)
615 # define MGA_TDS_COLOR_ALPHA_DIFFUSE (0x00000000)
616 # define MGA_TDS_COLOR_ALPHA_FCOL (0x00000004)
617 # define MGA_TDS_COLOR_ALPHA_CURRTEX (0x00000008)
618 # define MGA_TDS_COLOR_ALPHA_PREVTEX (0x0000000c)
619 # define MGA_TDS_COLOR_ALPHA_PREVSTAGE (0x00000010)
620 # define MGA_TDS_COLOR_ARG1_REPLICATEALPHA (0x00000020)
621 # define MGA_TDS_COLOR_ARG1_INV (0x00000040)
622 # define MGA_TDS_COLOR_ARG2_REPLICATEALPHA (0x00000080)
623 # define MGA_TDS_COLOR_ARG2_INV (0x00000100)
624 # define MGA_TDS_COLOR_ALPHA1INV (0x00000200)
625 # define MGA_TDS_COLOR_ALPHA2INV (0x00000400)
626 # define MGA_TDS_COLOR_ARG1MUL_ALPHA1 (0x00000800)
627 # define MGA_TDS_COLOR_ARG2MUL_ALPHA2 (0x00001000)
628 # define MGA_TDS_COLOR_ARG1ADD_MULOUT (0x00002000)
629 # define MGA_TDS_COLOR_ARG2ADD_MULOUT (0x00004000)
630 # define MGA_TDS_COLOR_MODBRIGHT_2X (0x00008000)
631 # define MGA_TDS_COLOR_MODBRIGHT_4X (0x00010000)
632 # define MGA_TDS_COLOR_ADD_SUB (0x00000000)
633 # define MGA_TDS_COLOR_ADD_ADD (0x00020000)
634 # define MGA_TDS_COLOR_ADD2X (0x00040000)
635 # define MGA_TDS_COLOR_ADDBIAS (0x00080000)
636 # define MGA_TDS_COLOR_BLEND (0x00100000)
637 # define MGA_TDS_COLOR_SEL_ARG1 (0x00000000)
638 # define MGA_TDS_COLOR_SEL_ARG2 (0x00200000)
639 # define MGA_TDS_COLOR_SEL_ADD (0x00400000)
640 # define MGA_TDS_COLOR_SEL_MUL (0x00600000)
641 # define MGA_TDS_ALPHA_ARG1_INV (0x00800000)
642 # define MGA_TDS_ALPHA_ARG2_DIFFUSE (0x00000000)
643 # define MGA_TDS_ALPHA_ARG2_FCOL (0x01000000)
644 # define MGA_TDS_ALPHA_ARG2_PREVTEX (0x02000000)
645 # define MGA_TDS_ALPHA_ARG2_PREVSTAGE (0x03000000)
646 # define MGA_TDS_ALPHA_ARG2_INV (0x04000000)
647 # define MGA_TDS_ALPHA_ADD (0x08000000)
648 # define MGA_TDS_ALPHA_ADDBIAS (0x10000000)
649 # define MGA_TDS_ALPHA_ADD2X (0x20000000)
650 # define MGA_TDS_ALPHA_SEL_ARG1 (0x00000000)
651 # define MGA_TDS_ALPHA_SEL_ARG2 (0x40000000)
652 # define MGA_TDS_ALPHA_SEL_ADD (0x80000000)
653 # define MGA_TDS_ALPHA_SEL_MUL (0xc0000000)
654 
655 #define MGAREG_DWGSYNC 0x2c4c
656 
657 #define MGAREG_AGP_PLL 0x1e4c
658 #define MGA_AGP2XPLL_ENABLE 0x1
659 #define MGA_AGP2XPLL_DISABLE 0x0
660 
661 #endif