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22 #ifndef __PNX8550_CM_H
23 #define __PNX8550_CM_H
25 #define PNX8550_CM_BASE 0xBBE47000
27 #define PNX8550_CM_PLL0_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x000)
28 #define PNX8550_CM_PLL1_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x004)
29 #define PNX8550_CM_PLL2_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x008)
30 #define PNX8550_CM_PLL3_CTL *(volatile unsigned long *)(PNX8550_CM_BASE + 0x00C)
34 #define PNX8550_CM_PLL_BLOCKED_MASK 0x80000000
35 #define PNX8550_CM_PLL_LOCK_MASK 0x40000000
36 #define PNX8550_CM_PLL_CURRENT_ADJ_MASK 0x3c000000
37 #define PNX8550_CM_PLL_N_MASK 0x01ff0000
38 #define PNX8550_CM_PLL_M_MASK 0x00003f00
39 #define PNX8550_CM_PLL_P_MASK 0x0000000c
40 #define PNX8550_CM_PLL_PD_MASK 0x00000002