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msm_iomap-7x00.h
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1 /* arch/arm/mach-msm/include/mach/msm_iomap.h
2  *
3  * Copyright (C) 2007 Google, Inc.
4  * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
5  * Author: Brian Swetland <[email protected]>
6  *
7  * This software is licensed under the terms of the GNU General Public
8  * License version 2, as published by the Free Software Foundation, and
9  * may be copied, distributed, and modified under those terms.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  *
17  * The MSM peripherals are spread all over across 768MB of physical
18  * space, which makes just having a simple IO_ADDRESS macro to slide
19  * them into the right virtual location rough. Instead, we will
20  * provide a master phys->virt mapping for peripherals here.
21  *
22  */
23 
24 #ifndef __ASM_ARCH_MSM_IOMAP_7X00_H
25 #define __ASM_ARCH_MSM_IOMAP_7X00_H
26 
27 #include <asm/sizes.h>
28 
29 /* Physical base address and size of peripherals.
30  * Ordered by the virtual base addresses they will be mapped at.
31  *
32  * MSM_VIC_BASE must be an value that can be loaded via a "mov"
33  * instruction, otherwise entry-macro.S will not compile.
34  *
35  * If you add or remove entries here, you'll want to edit the
36  * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
37  * changes.
38  *
39  */
40 
41 #define MSM_VIC_BASE IOMEM(0xE0000000)
42 #define MSM_VIC_PHYS 0xC0000000
43 #define MSM_VIC_SIZE SZ_4K
44 
45 #define MSM7X00_CSR_PHYS 0xC0100000
46 #define MSM7X00_CSR_SIZE SZ_4K
47 
48 #define MSM_DMOV_BASE IOMEM(0xE0002000)
49 #define MSM_DMOV_PHYS 0xA9700000
50 #define MSM_DMOV_SIZE SZ_4K
51 
52 #define MSM7X00_GPIO1_PHYS 0xA9200000
53 #define MSM7X00_GPIO1_SIZE SZ_4K
54 
55 #define MSM7X00_GPIO2_PHYS 0xA9300000
56 #define MSM7X00_GPIO2_SIZE SZ_4K
57 
58 #define MSM_CLK_CTL_BASE IOMEM(0xE0005000)
59 #define MSM_CLK_CTL_PHYS 0xA8600000
60 #define MSM_CLK_CTL_SIZE SZ_4K
61 
62 #define MSM_SHARED_RAM_BASE IOMEM(0xE0100000)
63 #define MSM_SHARED_RAM_PHYS 0x01F00000
64 #define MSM_SHARED_RAM_SIZE SZ_1M
65 
66 #define MSM_UART1_PHYS 0xA9A00000
67 #define MSM_UART1_SIZE SZ_4K
68 
69 #define MSM_UART2_PHYS 0xA9B00000
70 #define MSM_UART2_SIZE SZ_4K
71 
72 #define MSM_UART3_PHYS 0xA9C00000
73 #define MSM_UART3_SIZE SZ_4K
74 
75 #define MSM_SDC1_PHYS 0xA0400000
76 #define MSM_SDC1_SIZE SZ_4K
77 
78 #define MSM_SDC2_PHYS 0xA0500000
79 #define MSM_SDC2_SIZE SZ_4K
80 
81 #define MSM_SDC3_PHYS 0xA0600000
82 #define MSM_SDC3_SIZE SZ_4K
83 
84 #define MSM_SDC4_PHYS 0xA0700000
85 #define MSM_SDC4_SIZE SZ_4K
86 
87 #define MSM_I2C_PHYS 0xA9900000
88 #define MSM_I2C_SIZE SZ_4K
89 
90 #define MSM_HSUSB_PHYS 0xA0800000
91 #define MSM_HSUSB_SIZE SZ_4K
92 
93 #define MSM_PMDH_PHYS 0xAA600000
94 #define MSM_PMDH_SIZE SZ_4K
95 
96 #define MSM_EMDH_PHYS 0xAA700000
97 #define MSM_EMDH_SIZE SZ_4K
98 
99 #define MSM_MDP_PHYS 0xAA200000
100 #define MSM_MDP_SIZE 0x000F0000
101 
102 #define MSM_MDC_PHYS 0xAA500000
103 #define MSM_MDC_SIZE SZ_1M
104 
105 #define MSM_AD5_PHYS 0xAC000000
106 #define MSM_AD5_SIZE (SZ_1M*13)
107 
108 #endif