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ni52.h
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1 /*
2  * Intel i82586 Ethernet definitions
3  *
4  * This is an extension to the Linux operating system, and is covered by the
5  * same GNU General Public License that covers that work.
6  *
7  * copyrights (c) 1994 by Michael Hipp ([email protected])
8  *
9  * I have done a look in the following sources:
10  * crynwr-packet-driver by Russ Nelson
11  * Garret A. Wollman's i82586-driver for BSD
12  */
13 
14 
15 #define NI52_RESET 0 /* writing to this address, resets the i82586 */
16 #define NI52_ATTENTION 1 /* channel attention, kick the 586 */
17 #define NI52_TENA 3 /* 2-5 possibly wrong, Xmit enable */
18 #define NI52_TDIS 2 /* Xmit disable */
19 #define NI52_INTENA 5 /* Interrupt enable */
20 #define NI52_INTDIS 4 /* Interrupt disable */
21 #define NI52_MAGIC1 6 /* dunno exact function */
22 #define NI52_MAGIC2 7 /* dunno exact function */
23 
24 #define NI52_MAGICVAL1 0x00 /* magic-values for ni5210 card */
25 #define NI52_MAGICVAL2 0x55
26 
27 /*
28  * where to find the System Configuration Pointer (SCP)
29  */
30 #define SCP_DEFAULT_ADDRESS 0xfffff4
31 
32 
33 /*
34  * System Configuration Pointer Struct
35  */
36 
37 struct scp_struct
38 {
39  u16 zero_dum0; /* has to be zero */
40  u8 sysbus; /* 0=16Bit,1=8Bit */
41  u8 zero_dum1; /* has to be zero for 586 */
44  u32 iscp; /* pointer to the iscp-block */
45 };
46 
47 
48 /*
49  * Intermediate System Configuration Pointer (ISCP)
50  */
52 {
53  u8 busy; /* 586 clears after successful init */
54  u8 zero_dummy; /* has to be zero */
55  u16 scb_offset; /* pointeroffset to the scb_base */
56  u32 scb_base; /* base-address of all 16-bit offsets */
57 };
58 
59 /*
60  * System Control Block (SCB)
61  */
62 struct scb_struct
63 {
66  u8 cmd_ruc; /* command word: RU part */
67  u8 cmd_cuc; /* command word: CU part & ACK */
68  u16 cbl_offset; /* pointeroffset, command block list */
69  u16 rfa_offset; /* pointeroffset, receive frame area */
70  u16 crc_errs; /* CRC-Error counter */
71  u16 aln_errs; /* alignmenterror counter */
72  u16 rsc_errs; /* Resourceerror counter */
73  u16 ovrn_errs; /* OVerrunerror counter */
74 };
75 
76 /*
77  * possible command values for the command word
78  */
79 #define RUC_MASK 0x0070 /* mask for RU commands */
80 #define RUC_NOP 0x0000 /* NOP-command */
81 #define RUC_START 0x0010 /* start RU */
82 #define RUC_RESUME 0x0020 /* resume RU after suspend */
83 #define RUC_SUSPEND 0x0030 /* suspend RU */
84 #define RUC_ABORT 0x0040 /* abort receiver operation immediately */
85 
86 #define CUC_MASK 0x07 /* mask for CU command */
87 #define CUC_NOP 0x00 /* NOP-command */
88 #define CUC_START 0x01 /* start execution of 1. cmd on the CBL */
89 #define CUC_RESUME 0x02 /* resume after suspend */
90 #define CUC_SUSPEND 0x03 /* Suspend CU */
91 #define CUC_ABORT 0x04 /* abort command operation immediately */
92 
93 #define ACK_MASK 0xf0 /* mask for ACK command */
94 #define ACK_CX 0x80 /* acknowledges STAT_CX */
95 #define ACK_FR 0x40 /* ack. STAT_FR */
96 #define ACK_CNA 0x20 /* ack. STAT_CNA */
97 #define ACK_RNR 0x10 /* ack. STAT_RNR */
98 
99 /*
100  * possible status values for the status word
101  */
102 #define STAT_MASK 0xf0 /* mask for cause of interrupt */
103 #define STAT_CX 0x80 /* CU finished cmd with its I bit set */
104 #define STAT_FR 0x40 /* RU finished receiving a frame */
105 #define STAT_CNA 0x20 /* CU left active state */
106 #define STAT_RNR 0x10 /* RU left ready state */
107 
108 #define CU_STATUS 0x7 /* CU status, 0=idle */
109 #define CU_SUSPEND 0x1 /* CU is suspended */
110 #define CU_ACTIVE 0x2 /* CU is active */
111 
112 #define RU_STATUS 0x70 /* RU status, 0=idle */
113 #define RU_SUSPEND 0x10 /* RU suspended */
114 #define RU_NOSPACE 0x20 /* RU no resources */
115 #define RU_READY 0x40 /* RU is ready */
116 
117 /*
118  * Receive Frame Descriptor (RFD)
119  */
121 {
122  u8 stat_low; /* status word */
123  u8 stat_high; /* status word */
124  u8 rfd_sf; /* 82596 mode only */
125  u8 last; /* Bit15,Last Frame on List / Bit14,suspend */
126  u16 next; /* linkoffset to next RFD */
127  u16 rbd_offset; /* pointeroffset to RBD-buffer */
128  u8 dest[6]; /* ethernet-address, destination */
129  u8 source[6]; /* ethernet-address, source */
130  u16 length; /* 802.3 frame-length */
131  u16 zero_dummy; /* dummy */
132 };
133 
134 #define RFD_LAST 0x80 /* last: last rfd in the list */
135 #define RFD_SUSP 0x40 /* last: suspend RU after */
136 #define RFD_COMPL 0x80
137 #define RFD_OK 0x20
138 #define RFD_BUSY 0x40
139 #define RFD_ERR_LEN 0x10 /* Length error (if enabled length-checking */
140 #define RFD_ERR_CRC 0x08 /* CRC error */
141 #define RFD_ERR_ALGN 0x04 /* Alignment error */
142 #define RFD_ERR_RNR 0x02 /* status: receiver out of resources */
143 #define RFD_ERR_OVR 0x01 /* DMA Overrun! */
144 
145 #define RFD_ERR_FTS 0x0080 /* Frame to short */
146 #define RFD_ERR_NEOP 0x0040 /* No EOP flag (for bitstuffing only) */
147 #define RFD_ERR_TRUN 0x0020 /* (82596 only/SF mode) indicates truncated frame */
148 #define RFD_MATCHADD 0x0002 /* status: Destinationaddress !matches IA (only 82596) */
149 #define RFD_COLLDET 0x0001 /* Detected collision during reception */
150 
151 /*
152  * Receive Buffer Descriptor (RBD)
153  */
155 {
156  u16 status; /* status word,number of used bytes in buff */
157  u16 next; /* pointeroffset to next RBD */
158  u32 buffer; /* receive buffer address pointer */
159  u16 size; /* size of this buffer */
160  u16 zero_dummy; /* dummy */
161 };
162 
163 #define RBD_LAST 0x8000 /* last buffer */
164 #define RBD_USED 0x4000 /* this buffer has data */
165 #define RBD_MASK 0x3fff /* size-mask for length */
166 
167 /*
168  * Statusvalues for Commands/RFD
169  */
170 #define STAT_COMPL 0x8000 /* status: frame/command is complete */
171 #define STAT_BUSY 0x4000 /* status: frame/command is busy */
172 #define STAT_OK 0x2000 /* status: frame/command is ok */
173 
174 /*
175  * Action-Commands
176  */
177 #define CMD_NOP 0x0000 /* NOP */
178 #define CMD_IASETUP 0x0001 /* initial address setup command */
179 #define CMD_CONFIGURE 0x0002 /* configure command */
180 #define CMD_MCSETUP 0x0003 /* MC setup command */
181 #define CMD_XMIT 0x0004 /* transmit command */
182 #define CMD_TDR 0x0005 /* time domain reflectometer (TDR) command */
183 #define CMD_DUMP 0x0006 /* dump command */
184 #define CMD_DIAGNOSE 0x0007 /* diagnose command */
185 
186 /*
187  * Action command bits
188  */
189 #define CMD_LAST 0x8000 /* indicates last command in the CBL */
190 #define CMD_SUSPEND 0x4000 /* suspend CU after this CB */
191 #define CMD_INT 0x2000 /* generate interrupt after execution */
192 
193 /*
194  * NOP - command
195  */
197 {
198  u16 cmd_status; /* status of this command */
199  u16 cmd_cmd; /* the command itself (+bits) */
200  u16 cmd_link; /* offsetpointer to next command */
201 };
202 
203 /*
204  * IA Setup command
205  */
207 {
211  u8 iaddr[6];
212 };
213 
214 /*
215  * Configure command
216  */
218 {
222  u8 byte_cnt; /* size of the config-cmd */
223  u8 fifo; /* fifo/recv monitor */
224  u8 sav_bf; /* save bad frames (bit7=1)*/
225  u8 adr_len; /* adr_len(0-2),al_loc(3),pream(4-5),loopbak(6-7)*/
226  u8 priority; /* lin_prio(0-2),exp_prio(4-6),bof_metd(7) */
227  u8 ifs; /* inter frame spacing */
228  u8 time_low; /* slot time low */
229  u8 time_high; /* slot time high(0-2) and max. retries(4-7) */
230  u8 promisc; /* promisc-mode(0) , et al (1-7) */
231  u8 carr_coll; /* carrier(0-3)/collision(4-7) stuff */
232  u8 fram_len; /* minimal frame len */
233  u8 dummy; /* dummy */
234 };
235 
236 /*
237  * Multicast Setup command
238  */
240 {
244  u16 mc_cnt; /* number of bytes in the MC-List */
245  u8 mc_list[0][6]; /* pointer to 6 bytes entries */
246 };
247 
248 /*
249  * DUMP command
250  */
252 {
256  u16 dump_offset; /* pointeroffset to DUMP space */
257 };
258 
259 /*
260  * transmit command
261  */
263 {
267  u16 tbd_offset; /* pointeroffset to TBD */
268  u8 dest[6]; /* destination address of the frame */
269  u16 length; /* user defined: 802.3 length / Ether type */
270 };
271 
272 #define TCMD_ERRMASK 0x0fa0
273 #define TCMD_MAXCOLLMASK 0x000f
274 #define TCMD_MAXCOLL 0x0020
275 #define TCMD_HEARTBEAT 0x0040
276 #define TCMD_DEFERRED 0x0080
277 #define TCMD_UNDERRUN 0x0100
278 #define TCMD_LOSTCTS 0x0200
279 #define TCMD_NOCARRIER 0x0400
280 #define TCMD_LATECOLL 0x0800
281 
283 {
288 };
289 
290 #define TDR_LNK_OK 0x8000 /* No link problem identified */
291 #define TDR_XCVR_PRB 0x4000 /* indicates a transceiver problem */
292 #define TDR_ET_OPN 0x2000 /* open, no correct termination */
293 #define TDR_ET_SRT 0x1000 /* TDR detected a short circuit */
294 #define TDR_TIMEMASK 0x07ff /* mask for the time field */
295 
296 /*
297  * Transmit Buffer Descriptor (TBD)
298  */
300 {
301  u16 size; /* size + EOF-Flag(15) */
302  u16 next; /* pointeroffset to next TBD */
303  u32 buffer; /* pointer to buffer */
304 };
305 
306 #define TBD_LAST 0x8000 /* EOF-Flag, indicates last buffer in list */
307 
308 
309 
310